From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x22b.google.com (mail-wm0-x22b.google.com [IPv6:2a00:1450:400c:c09::22b]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B6C321A1E3A for ; Mon, 5 Sep 2016 02:17:50 -0700 (PDT) Received: by mail-wm0-x22b.google.com with SMTP id w207so25390552wmw.1 for ; Mon, 05 Sep 2016 02:17:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lchwSqji1L8ydabvlNa7+kJOSnLtvj1SF9pKxe56RQI=; b=hxPs3OZyAfq7b0iynq4jTZZiFxu3UyKPf9eU5iP4rVlmBzurPyOHFFeW+CuOxkXfnd risZ/RoEzYs83lL3iCx0WjYp94WUWeV0L/z3Sd7TlkV/8xFYMT6Ddx4TEIpDDZHVbQVj V0ONy1ZZxVfIcLyKPSJaMvrTbsPhg/3qygXRw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lchwSqji1L8ydabvlNa7+kJOSnLtvj1SF9pKxe56RQI=; b=ZS3mCx7Q2YVwiDuZcTOcqNdDD161YiuhOgck696fFeKZAHPlUhWvV6iyEuD75OWqjV dHV4BDNTCJ75rA9w/uuRPeK8z2xOVTyuPINXL9tqu0zM+vql3DKCCWe8gnnfqRFsUfWH Mhndt68Pn8yeloUITV0gCFuVk6G6/BGBoYnLdTONoelR3gTz8xyuVOPKsEp4YvPKjna5 1DaRaHhVLtVicMuovh0Bfjla/64oTrhd3RKvCJ7V+6ZgFUN3GD7BDqUPnIqdM8mSiBkI svmV7WYZ5xtqJFaO5RkZCCcT5e1d4bpKbRl7060JAq7n2qDxjzb+qcJvsES2qbsz/wto 4RTQ== X-Gm-Message-State: AE9vXwPvh7sB86bUJ8W8dNuiyI0XBpYBnuyuXBV0rcuSzs2EUm4rIcJZ67I+DA8QtMNHnd0z X-Received: by 10.28.132.71 with SMTP id g68mr1821228wmd.20.1473067069368; Mon, 05 Sep 2016 02:17:49 -0700 (PDT) Received: from localhost.localdomain ([197.130.133.164]) by smtp.gmail.com with ESMTPSA id m133sm10157457wmg.0.2016.09.05.02.17.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 Sep 2016 02:17:48 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, feng.tian@intel.com, star.zeng@intel.com, liming.gao@intel.com Cc: lersek@redhat.com, leif.lindholm@linaro.org, Ard Biesheuvel Date: Mon, 5 Sep 2016 10:17:25 +0100 Message-Id: <1473067049-16252-4-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1473067049-16252-1-git-send-email-ard.biesheuvel@linaro.org> References: <1473067049-16252-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [PATCH 3/7] MdeModulePkg/NvmExpressDxe: enable 64-bit PCI DMA X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Sep 2016 09:17:51 -0000 PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the controller supports 64-bit DMA addressing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c index a173504cdf4d..51cff3c96c29 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c @@ -863,6 +863,19 @@ NvmeControllerInit ( } // + // Enable 64-bit DMA support in the PCI layer. + // + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationEnable, + EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE, + NULL + ); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_WARN, "NvmeControllerInit: failed to enable 64-bit DMA (%r)\n", Status)); + } + + // // Read the Controller Capabilities register and verify that the NVM command set is supported // Status = ReadNvmeControllerCapabilities (Private, &Private->Cap); -- 2.7.4