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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: edk2-devel@lists.01.org, feng.tian@intel.com,
	star.zeng@intel.com, liming.gao@intel.com
Cc: lersek@redhat.com, leif.lindholm@linaro.org,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH 6/7] MdeModulePkg/PciHostBridgeDxe: restrict 64-bit DMA to devices that support it
Date: Mon,  5 Sep 2016 10:17:28 +0100	[thread overview]
Message-ID: <1473067049-16252-7-git-send-email-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <1473067049-16252-1-git-send-email-ard.biesheuvel@linaro.org>

Currently, the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute is completely
ignored by the PCI host bridge driver, which means that, on an implementation
that supports DMA above 4 GB, allocations above 4 GB may be provided to
devices that have not expressed support for it.

So in addition to checking 'RootBridge->DmaAbove4G' to establish whether the
root bridge itself supports DMA above 4 GB, we must also take into account
the operation type (EfiPciOperationBusMaster{Read|Write|CommBuffer}64),
and the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute, when mapping and
allocating DMA memory, respectively.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
index b2d76d67afa2..8af131b0af37 100644
--- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -1073,10 +1073,15 @@ RootBridgeIoMap (
   RootBridge = ROOT_BRIDGE_FROM_THIS (This);
 
   PhysicalAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress;
-  if (!RootBridge->DmaAbove4G && ((PhysicalAddress + *NumberOfBytes) > SIZE_4GB)) {
+  if ((!RootBridge->DmaAbove4G ||
+       (Operation != EfiPciOperationBusMasterRead64 &&
+        Operation != EfiPciOperationBusMasterWrite64 &&
+        Operation != EfiPciOperationBusMasterCommonBuffer64)) &&
+      ((PhysicalAddress + *NumberOfBytes) > SIZE_4GB)) {
+
     //
-    // If the root bridge can not handle performing DMA above 4GB but
-    // any part of the DMA transfer being mapped is above 4GB, then
+    // If the root bridge or the device cannot handle performing DMA above
+    // 4GB but any part of the DMA transfer being mapped is above 4GB, then
     // map the DMA transfer to a buffer below 4GB.
     //
 
@@ -1308,7 +1313,8 @@ RootBridgeIoAllocateBuffer (
   RootBridge = ROOT_BRIDGE_FROM_THIS (This);
 
   AllocateType = AllocateAnyPages;
-  if (!RootBridge->DmaAbove4G) {
+  if (!RootBridge->DmaAbove4G ||
+      (Attributes & EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE) == 0) {
     //
     // Limit allocations to memory below 4GB
     //
-- 
2.7.4



  parent reply	other threads:[~2016-09-05  9:17 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-05  9:17 [PATCH 0/7] MdeModulePkg ArmVirtPkg: fixes for 64-bit PCI DMA Ard Biesheuvel
2016-09-05  9:17 ` [PATCH 1/7] MdeModulePkg/AtaAtapiPassThru: enable " Ard Biesheuvel
2016-09-05  9:17 ` [PATCH 2/7] MdeModulePkg/EhciDxe: " Ard Biesheuvel
2016-09-05 12:19   ` Laszlo Ersek
2016-09-05 12:44     ` Ard Biesheuvel
2016-09-05 13:06       ` Laszlo Ersek
2016-09-05  9:17 ` [PATCH 3/7] MdeModulePkg/NvmExpressDxe: " Ard Biesheuvel
2016-09-05  9:17 ` [PATCH 4/7] MdeModulePkg/SdMmcPciHcDxe: " Ard Biesheuvel
2016-09-05  9:17 ` [PATCH 5/7] MdeModulePkg/XhciDxe: " Ard Biesheuvel
2016-09-05 12:14   ` Laszlo Ersek
2016-09-05  9:17 ` Ard Biesheuvel [this message]
2016-09-05 12:04   ` [PATCH 6/7] MdeModulePkg/PciHostBridgeDxe: restrict 64-bit DMA to devices that support it Laszlo Ersek
2016-09-05  9:17 ` [PATCH 7/7] ArmVirtPkg/FdtPciHostBridgeLib: enable 64-bit PCI DMA Ard Biesheuvel
2016-09-05 12:04   ` Laszlo Ersek
2016-09-06  7:48 ` [PATCH 0/7] MdeModulePkg ArmVirtPkg: fixes for " Ard Biesheuvel
2016-09-06  8:04   ` Zeng, Star
2016-09-06  8:54   ` Ni, Ruiyu
2016-09-06 10:36     ` Ard Biesheuvel
2016-09-06 12:41       ` Tian, Feng
2016-09-06 14:48         ` Ard Biesheuvel

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