From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x236.google.com (mail-wm0-x236.google.com [IPv6:2a00:1450:400c:c09::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3492F1A1E4F for ; Fri, 9 Sep 2016 01:07:11 -0700 (PDT) Received: by mail-wm0-x236.google.com with SMTP id 1so18256675wmz.1 for ; Fri, 09 Sep 2016 01:07:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=rQ6p+csGv15Tpw1ZVBkhK4PTDKrfsFRBqM62JCHfunI=; b=DXrtu21Ybr1qBwVS4PtWjQmxUVEMXymjcTEsqDtXUY+BkQMKpzD+AFUxrAgJQSjI9Y IFxn2lpvP1ldxYQMFToaUKl1xIksJky6lJFNsGTwwD9SX7sUxFd+ssI/rpcPskP9Swk6 linz1lkfSrYHfMIqCUdpycDtxkwtDJ1h/rG0A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=rQ6p+csGv15Tpw1ZVBkhK4PTDKrfsFRBqM62JCHfunI=; b=jcru2uSRpmojCIPUstF5rgpT4ym/bGC0YaLs7EAA45D5/nTHCGr327NxUDi7VgBIEQ Haz2bA+MQSRkcYFfdRbt1w/VgTnqfvO0G7Dw+HQwT/6wkMhKb3XlTSVKdnqx5hUSQ4Qp h/5IvPQikErKnBwieX8nCD+Av86mm79LoErOynt53yKAOtWXXLAM6GxrPJZWp4Opgm86 AubaeJpje2v1WhvKsUbE/Kf/dCuhIIGcnQAvMSqinEMLwTM0J4HvNRGxgT4kZrVF4bOT KZkYZ+WialrZFTJDjWU+XOWYWFhatO7KRnwWADgIsNsqiOoVRmPe9Y1LLfuRYiPoPEFe l7EQ== X-Gm-Message-State: AE9vXwNIMM5Edd3WJQG/ju68q2VQknPVD++4f1aIaf1up/liUdkmdqTYSr0pCEGAns9Sggby X-Received: by 10.28.144.5 with SMTP id s5mr1677685wmd.39.1473408429584; Fri, 09 Sep 2016 01:07:09 -0700 (PDT) Received: from localhost.localdomain ([197.253.216.206]) by smtp.gmail.com with ESMTPSA id kk6sm2076846wjb.44.2016.09.09.01.07.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Sep 2016 01:07:08 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, eugene@hp.com Cc: Ard Biesheuvel Date: Fri, 9 Sep 2016 09:07:04 +0100 Message-Id: <1473408424-17833-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 Subject: [PATCH] ArmPkg/ArmMmuLib: base page table VA size on GCD memory map size X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Sep 2016 08:07:11 -0000 As reported by Eugene, the practice of sizing the address space in the virtual memory system based on the maximum address in the table passed to ArmConfigureMmu() is problematic, since it fails to take into account the fact that the GCD memory space may be extended at a later time, both for memory and for MMIO. So instead, choose the VA size identical to the GCD memory map size, which is based on PcdPrePiCpuMemorySize on ARM systems. Reported-by: Eugene Cohen Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 14 ++------------ ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf | 4 ++++ ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf | 4 ++++ 3 files changed, 10 insertions(+), 12 deletions(-) diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c index 6e05e6085011..b5900a761f80 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -582,9 +582,7 @@ ArmConfigureMmu ( VOID* TranslationTable; UINTN TranslationTablePageCount; UINT32 TranslationTableAttribute; - ARM_MEMORY_REGION_DESCRIPTOR *MemoryTableEntry; UINT64 MaxAddress; - UINT64 TopAddress; UINTN T0SZ; UINTN RootTableEntryCount; UINT64 TCR; @@ -595,16 +593,8 @@ ArmConfigureMmu ( return RETURN_INVALID_PARAMETER; } - // Identify the highest address of the memory table - MaxAddress = MemoryTable->PhysicalBase + MemoryTable->Length - 1; - MemoryTableEntry = MemoryTable; - while (MemoryTableEntry->Length != 0) { - TopAddress = MemoryTableEntry->PhysicalBase + MemoryTableEntry->Length - 1; - if (TopAddress > MaxAddress) { - MaxAddress = TopAddress; - } - MemoryTableEntry++; - } + // Cover the entire GCD memory space + MaxAddress = (1UL << PcdGet8 (PcdPrePiCpuMemorySize)) - 1; // Lookup the Table Level to get the information LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount); diff --git a/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf b/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf index 1533c2944e8e..b9f264de8d26 100644 --- a/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf +++ b/ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf @@ -32,6 +32,7 @@ [Sources.ARM] [Packages] ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec [LibraryClasses] @@ -39,5 +40,8 @@ [LibraryClasses] CacheMaintenanceLib MemoryAllocationLib +[Pcd.AARCH64] + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize + [Pcd.ARM] gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride diff --git a/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf b/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf index 14ebf8de673d..ecf13f790734 100644 --- a/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf +++ b/ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf @@ -28,9 +28,13 @@ [Sources.AARCH64] [Packages] ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec [LibraryClasses] ArmLib CacheMaintenanceLib MemoryAllocationLib + +[Pcd.AARCH64] + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize -- 2.7.4