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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: edk2-devel@lists.01.org, leif.lindholm@linaro.org
Cc: eugene@hp.com, Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH 1/2] Platforms/AMD/Styx: limit VA space to 40 bits
Date: Fri,  9 Sep 2016 09:15:38 +0100	[thread overview]
Message-ID: <1473408939-18044-1-git-send-email-ard.biesheuvel@linaro.org> (raw)

We can cover the entire MMIO range and 512 GB of memory starting at
0x80_0000_0000 using 40 bits of VA space, both in the page tables and
in the GCD memory map.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc         | 5 +++++
 Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
index 8a100e0d9a3c..0a987cc3b118 100644
--- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
+++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
@@ -375,6 +375,11 @@ DEFINE DO_KCS    = 0
   # Size of the region used by UEFI in permanent memory (Reserved 64MB)
   gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
 
+  # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the
+  # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below
+  # that)
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
+
   #
   # ARM PrimeCell
   #
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
index 38c3309dcff1..72ceb8b6994e 100644
--- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
@@ -382,6 +382,11 @@ DEFINE DO_KCS       = 1
   # Size of the region used by UEFI in permanent memory (Reserved 64MB)
   gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
 
+  # 40 bits of VA space is sufficient to support up to 512 GB of RAM in the
+  # range 0x80_0000_0000 - 0xFF_FFFF_FFFF (all platform and PCI MMIO is below
+  # that)
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40
+
   #
   # ARM PrimeCell
   #
-- 
2.7.4



             reply	other threads:[~2016-09-09  8:15 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-09  8:15 Ard Biesheuvel [this message]
2016-09-09  8:15 ` [PATCH 2/2] Platforms/ARM/FVP: limit VA range to 36 bits Ard Biesheuvel
2016-09-13 10:43   ` Leif Lindholm
2016-09-13 10:43 ` [PATCH 1/2] Platforms/AMD/Styx: limit VA space to 40 bits Leif Lindholm

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