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From: Dandan Bi <dandan.bi@intel.com>
To: edk2-devel@lists.01.org
Cc: Jordan Justen <jordan.l.justen@intel.com>,
 Laszlo Ersek <lersek@redhat.com>, Liming Gao <liming.gao@intel.com>
Date: Thu, 22 Sep 2016 09:21:38 +0800
Message-Id: <1474507298-106676-1-git-send-email-dandan.bi@intel.com>
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Subject: [PATCH v2] OvmfPkg: Fix VS toolchain build failure
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V2: add the assert codes.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
---
 OvmfPkg/VirtioGpuDxe/Commands.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/OvmfPkg/VirtioGpuDxe/Commands.c b/OvmfPkg/VirtioGpuDxe/Commands.c
index b369dc3..962087c 100644
--- a/OvmfPkg/VirtioGpuDxe/Commands.c
+++ b/OvmfPkg/VirtioGpuDxe/Commands.c
@@ -282,16 +282,17 @@ VirtioGpuSendCommand (
   }
   Header->CtxId     = 0;
   Header->Padding   = 0;
 
   ASSERT (RequestSize >= sizeof *Header);
+  ASSERT (RequestSize <= MAX_UINT32);
 
   //
   // Compose the descriptor chain.
   //
   VirtioPrepare (&VgpuDev->Ring, &Indices);
-  VirtioAppendDesc (&VgpuDev->Ring, (UINTN)Header, RequestSize,
+  VirtioAppendDesc (&VgpuDev->Ring, (UINTN)Header, (UINT32)RequestSize,
     VRING_DESC_F_NEXT, &Indices);
   VirtioAppendDesc (&VgpuDev->Ring, (UINTN)&Response, sizeof Response,
     VRING_DESC_F_WRITE, &Indices);
 
   //
-- 
1.9.5.msysgit.1