[PATCH] ArmVirtPkg: Drop the nonsense ASSERT() statement

[PATCH] ArmVirtPkg: Drop the nonsense ASSERT() statement

[Dennis Chen]

Since All the GIC base address variables now are 64-bit, given
that a UNIT64 var cannot exceed MAX_UNIT64, it doesn't make sense
to continue keep them in the codes, so this patch just simply drop
those ASSERT() statements as it should be.

Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Dennis Chen <dennis.chen@arm.com>
---
 ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
index 64afc4d..7a312e5 100644
--- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
+++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
@@ -79,11 +79,9 @@ ArmVirtGicArchLibConstructor (
 
     // RegProp[0..1] == { GICD base, GICD size }
     DistBase = SwapBytes64 (Reg[0]);
-    ASSERT (DistBase < MAX_UINT32);
 
     // RegProp[2..3] == { GICR base, GICR size }
     RedistBase = SwapBytes64 (Reg[2]);
-    ASSERT (RedistBase < MAX_UINT32);
 
     PcdSet64 (PcdGicDistributorBase, DistBase);
     PcdSet64 (PcdGicRedistributorsBase, RedistBase);
@@ -117,8 +115,6 @@ ArmVirtGicArchLibConstructor (
 
     DistBase = SwapBytes64 (Reg[0]);
     CpuBase  = SwapBytes64 (Reg[2]);
-    ASSERT (DistBase < MAX_UINT32);
-    ASSERT (CpuBase < MAX_UINT32);
 
     PcdSet64 (PcdGicDistributorBase, DistBase);
     PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase);
-- 
2.7.4

Re: [PATCH] ArmVirtPkg: Drop the nonsense ASSERT() statement

[Laszlo Ersek]

On 10/17/16 10:54, Dennis Chen wrote:
> Since All the GIC base address variables now are 64-bit, given
> that a UNIT64 var cannot exceed MAX_UNIT64, it doesn't make sense
> to continue keep them in the codes, so this patch just simply drop
> those ASSERT() statements as it should be.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: Leif Lindholm <leif.lindholm@linaro.org>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Signed-off-by: Dennis Chen <dennis.chen@arm.com>
> ---
>  ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c | 4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
> index 64afc4d..7a312e5 100644
> --- a/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
> +++ b/ArmVirtPkg/Library/ArmVirtGicArchLib/ArmVirtGicArchLib.c
> @@ -79,11 +79,9 @@ ArmVirtGicArchLibConstructor (
>  
>      // RegProp[0..1] == { GICD base, GICD size }
>      DistBase = SwapBytes64 (Reg[0]);
> -    ASSERT (DistBase < MAX_UINT32);
>  
>      // RegProp[2..3] == { GICR base, GICR size }
>      RedistBase = SwapBytes64 (Reg[2]);
> -    ASSERT (RedistBase < MAX_UINT32);
>  
>      PcdSet64 (PcdGicDistributorBase, DistBase);
>      PcdSet64 (PcdGicRedistributorsBase, RedistBase);
> @@ -117,8 +115,6 @@ ArmVirtGicArchLibConstructor (
>  
>      DistBase = SwapBytes64 (Reg[0]);
>      CpuBase  = SwapBytes64 (Reg[2]);
> -    ASSERT (DistBase < MAX_UINT32);
> -    ASSERT (CpuBase < MAX_UINT32);
>  
>      PcdSet64 (PcdGicDistributorBase, DistBase);
>      PcdSet64 (PcdGicInterruptInterfaceBase, CpuBase);
> 

Is this a continuation of your

commit 8a1f2378d74390ddfe35c70f68e0c8b03bf84089
Author: Dennis Chen <dennis.chen@arm.com>
Date:   Mon Sep 5 19:38:20 2016 +0800

    ArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-up

?

I think I'll let Ard review this one. :)

Thanks
Laszlo