From: Dennis Chen <dennis.chen@arm.com>
To: <edk2-devel@lists.01.org>
Cc: <nd@arm.com>, Dennis Chen <dennis.chen@arm.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Leif Lindholm <leif.lindholm@linaro.org>,
Laszlo Ersek <lersek@redhat.com>
Subject: [PATCH] ARMPkg: Unified the GIC base address variables as 64-bit width
Date: Mon, 24 Oct 2016 11:04:56 +0800 [thread overview]
Message-ID: <1477278296-24809-1-git-send-email-dennis.chen@arm.com> (raw)
Since ACPI spec defines the GIC base addresses (CPU interface,
Distributor and Redistributor*GICv3 only*) as 64-bit, so we should
define these corresponding base address variables as 64-bit instead of
32-bit. This patch redefines them according to the ACPI spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Dennis Chen <dennis.chen@arm.com>
---
ArmPkg/Drivers/ArmGic/ArmGicLib.c | 64 ++++++++++----------
ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c | 2 +-
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 4 +-
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c | 6 +-
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c | 4 +-
ArmPkg/Include/Library/ArmGicLib.h | 78 ++++++++++++-------------
6 files changed, 79 insertions(+), 79 deletions(-)
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
index e658e9b..733488c 100644
--- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c
+++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
@@ -41,18 +41,18 @@ SourceIsSpi (
* @retval Base address of the associated GIC Redistributor
*/
STATIC
-UINTN
+UINT64
GicGetCpuRedistributorBase (
- IN UINTN GicRedistributorBase,
- IN ARM_GIC_ARCH_REVISION Revision
+ IN UINT64 GicRedistributorBase,
+ IN ARM_GIC_ARCH_REVISION Revision
)
{
- UINTN Index;
- UINTN MpId;
- UINTN CpuAffinity;
- UINTN Affinity;
- UINTN GicRedistributorGranularity;
- UINTN GicCpuRedistributorBase;
+ UINTN Index;
+ UINTN MpId;
+ UINTN CpuAffinity;
+ UINTN Affinity;
+ UINTN GicRedistributorGranularity;
+ UINT64 GicCpuRedistributorBase;
MpId = ArmReadMpidr ();
// Define CPU affinity as Affinity0[0:8], Affinity1[9:15], Affinity2[16:23], Affinity3[24:32]
@@ -87,7 +87,7 @@ GicGetCpuRedistributorBase (
UINTN
EFIAPI
ArmGicGetInterfaceIdentification (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
)
{
// Read the GIC Identification Register
@@ -97,7 +97,7 @@ ArmGicGetInterfaceIdentification (
UINTN
EFIAPI
ArmGicGetMaxNumInterrupts (
- IN INTN GicDistributorBase
+ IN UINT64 GicDistributorBase
)
{
return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1);
@@ -106,10 +106,10 @@ ArmGicGetMaxNumInterrupts (
VOID
EFIAPI
ArmGicSendSgiTo (
- IN INTN GicDistributorBase,
- IN INTN TargetListFilter,
- IN INTN CPUTargetList,
- IN INTN SgiId
+ IN UINT64 GicDistributorBase,
+ IN UINTN TargetListFilter,
+ IN UINTN CPUTargetList,
+ IN UINTN SgiId
)
{
MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId);
@@ -131,8 +131,8 @@ ArmGicSendSgiTo (
UINTN
EFIAPI
ArmGicAcknowledgeInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- OUT UINTN *InterruptId
+ IN UINT64 GicInterruptInterfaceBase,
+ OUT UINTN *InterruptId
)
{
UINTN Value;
@@ -162,8 +162,8 @@ ArmGicAcknowledgeInterrupt (
VOID
EFIAPI
ArmGicEndOfInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- IN UINTN Source
+ IN UINT64 GicInterruptInterfaceBase,
+ IN UINTN Source
)
{
ARM_GIC_ARCH_REVISION Revision;
@@ -181,9 +181,9 @@ ArmGicEndOfInterrupt (
VOID
EFIAPI
ArmGicEnableInterrupt (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
+ IN UINT64 GicDistributorBase,
+ IN UINT64 GicRedistributorBase,
+ IN UINTN Source
)
{
UINT32 RegOffset;
@@ -216,9 +216,9 @@ ArmGicEnableInterrupt (
VOID
EFIAPI
ArmGicDisableInterrupt (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
+ IN UINT64 GicDistributorBase,
+ IN UINT64 GicRedistributorBase,
+ IN UINTN Source
)
{
UINT32 RegOffset;
@@ -250,15 +250,15 @@ ArmGicDisableInterrupt (
BOOLEAN
EFIAPI
ArmGicIsInterruptEnabled (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
+ IN UINT64 GicDistributorBase,
+ IN UINT64 GicRedistributorBase,
+ IN UINTN Source
)
{
UINT32 RegOffset;
UINTN RegShift;
ARM_GIC_ARCH_REVISION Revision;
- UINTN GicCpuRedistributorBase;
+ UINT64 GicCpuRedistributorBase;
UINT32 Interrupts;
// Calculate enable register offset and bit position
@@ -286,7 +286,7 @@ ArmGicIsInterruptEnabled (
VOID
EFIAPI
ArmGicDisableDistributor (
- IN INTN GicDistributorBase
+ IN UINT64 GicDistributorBase
)
{
// Disable Gic Distributor
@@ -296,7 +296,7 @@ ArmGicDisableDistributor (
VOID
EFIAPI
ArmGicEnableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
)
{
ARM_GIC_ARCH_REVISION Revision;
@@ -314,7 +314,7 @@ ArmGicEnableInterruptInterface (
VOID
EFIAPI
ArmGicDisableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
)
{
ARM_GIC_ARCH_REVISION Revision;
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c b/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c
index f90391b..bc01db9 100644
--- a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c
+++ b/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c
@@ -19,7 +19,7 @@
VOID
EFIAPI
ArmGicEnableDistributor (
- IN INTN GicDistributorBase
+ IN UINT64 GicDistributorBase
)
{
ARM_GIC_ARCH_REVISION Revision;
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
index b9ecd55..c7c5af1 100644
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
+++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
@@ -30,8 +30,8 @@ Abstract:
extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol;
-STATIC UINT32 mGicInterruptInterfaceBase;
-STATIC UINT32 mGicDistributorBase;
+STATIC UINT64 mGicInterruptInterfaceBase;
+STATIC UINT64 mGicDistributorBase;
/**
Enable interrupt source Source.
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
index 5ac1d89..669ec99 100644
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
+++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
@@ -18,7 +18,7 @@
UINTN
EFIAPI
ArmGicV2AcknowledgeInterrupt (
- IN UINTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
)
{
// Read the Interrupt Acknowledge Register
@@ -28,8 +28,8 @@ ArmGicV2AcknowledgeInterrupt (
VOID
EFIAPI
ArmGicV2EndOfInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- IN UINTN Source
+ IN UINT64 GicInterruptInterfaceBase,
+ IN UINTN Source
)
{
MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source);
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c
index 92b764f..a7adbaf 100644
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c
+++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c
@@ -20,7 +20,7 @@
VOID
EFIAPI
ArmGicV2EnableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
)
{
/*
@@ -33,7 +33,7 @@ ArmGicV2EnableInterruptInterface (
VOID
EFIAPI
ArmGicV2DisableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
)
{
// Disable Gic Interface
diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h
index 4364f3f..bf6405c 100644
--- a/ArmPkg/Include/Library/ArmGicLib.h
+++ b/ArmPkg/Include/Library/ArmGicLib.h
@@ -101,7 +101,7 @@
UINTN
EFIAPI
ArmGicGetInterfaceIdentification (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
);
//
@@ -110,56 +110,56 @@ ArmGicGetInterfaceIdentification (
VOID
EFIAPI
ArmGicSetupNonSecure (
- IN UINTN MpId,
- IN INTN GicDistributorBase,
- IN INTN GicInterruptInterfaceBase
+ IN UINTN MpId,
+ IN UINT64 GicDistributorBase,
+ IN UINT64 GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicSetSecureInterrupts (
- IN UINTN GicDistributorBase,
- IN UINTN* GicSecureInterruptMask,
- IN UINTN GicSecureInterruptMaskSize
+ IN UINT64 GicDistributorBase,
+ IN UINTN* GicSecureInterruptMask,
+ IN UINTN GicSecureInterruptMaskSize
);
VOID
EFIAPI
ArmGicEnableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicDisableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicEnableDistributor (
- IN INTN GicDistributorBase
+ IN UINT64 GicDistributorBase
);
VOID
EFIAPI
ArmGicDisableDistributor (
- IN INTN GicDistributorBase
+ IN UINT64 GicDistributorBase
);
UINTN
EFIAPI
ArmGicGetMaxNumInterrupts (
- IN INTN GicDistributorBase
+ IN UINT64 GicDistributorBase
);
VOID
EFIAPI
ArmGicSendSgiTo (
- IN INTN GicDistributorBase,
- IN INTN TargetListFilter,
- IN INTN CPUTargetList,
- IN INTN SgiId
+ IN UINT64 GicDistributorBase,
+ IN UINTN TargetListFilter,
+ IN UINTN CPUTargetList,
+ IN UINTN SgiId
);
/*
@@ -178,46 +178,46 @@ ArmGicSendSgiTo (
UINTN
EFIAPI
ArmGicAcknowledgeInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- OUT UINTN *InterruptId
+ IN UINT64 GicInterruptInterfaceBase,
+ OUT UINTN *InterruptId
);
VOID
EFIAPI
ArmGicEndOfInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- IN UINTN Source
+ IN UINT64 GicInterruptInterfaceBase,
+ IN UINTN Source
);
UINTN
EFIAPI
ArmGicSetPriorityMask (
- IN INTN GicInterruptInterfaceBase,
- IN INTN PriorityMask
+ IN UINT64 GicInterruptInterfaceBase,
+ IN UINTN PriorityMask
);
VOID
EFIAPI
ArmGicEnableInterrupt (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
+ IN UINT64 GicDistributorBase,
+ IN UINT64 GicRedistributorBase,
+ IN UINTN Source
);
VOID
EFIAPI
ArmGicDisableInterrupt (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
+ IN UINT64 GicDistributorBase,
+ IN UINT64 GicRedistributorBase,
+ IN UINTN Source
);
BOOLEAN
EFIAPI
ArmGicIsInterruptEnabled (
- IN UINTN GicDistributorBase,
- IN UINTN GicRedistributorBase,
- IN UINTN Source
+ IN UINT64 GicDistributorBase,
+ IN UINT64 GicRedistributorBase,
+ IN UINTN Source
);
//
@@ -230,34 +230,34 @@ ArmGicIsInterruptEnabled (
VOID
EFIAPI
ArmGicV2SetupNonSecure (
- IN UINTN MpId,
- IN INTN GicDistributorBase,
- IN INTN GicInterruptInterfaceBase
+ IN UINTN MpId,
+ IN UINT64 GicDistributorBase,
+ IN UINT64 GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicV2EnableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicV2DisableInterruptInterface (
- IN INTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
);
UINTN
EFIAPI
ArmGicV2AcknowledgeInterrupt (
- IN UINTN GicInterruptInterfaceBase
+ IN UINT64 GicInterruptInterfaceBase
);
VOID
EFIAPI
ArmGicV2EndOfInterrupt (
- IN UINTN GicInterruptInterfaceBase,
- IN UINTN Source
+ IN UINT64 GicInterruptInterfaceBase,
+ IN UINTN Source
);
//
--
2.7.4
next reply other threads:[~2016-10-24 3:05 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-24 3:04 Dennis Chen [this message]
2016-10-24 11:47 ` [PATCH] ARMPkg: Unified the GIC base address variables as 64-bit width Ryan Harkin
2016-10-24 16:16 ` Ard Biesheuvel
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