From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from eu-smtp-delivery-143.mimecast.com (eu-smtp-delivery-143.mimecast.com [146.101.78.143]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 50C171A1DEF for ; Sun, 23 Oct 2016 20:05:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=Vf3sLhNGUjw3mnd0F9Ggvcj+6YsZ3qiGJZN6scebxwk=; b=Dhf9eUs/p09f+2NJN9po1EemHd+9uMdG66y/xu/BIJ+22x/s07NDO3QA2nNkApqX3ZFgq0AHOYZw3gnCaIekulD3LzQCHKmIMsx7/B3X9A6izCljdW18hsyJfXGF5qFMG1Tpk5moVMClHlOWvdlTV3tPu/HM6jP223qawOoR7/4= Received: from EUR02-VE1-obe.outbound.protection.outlook.com (mail-ve1eur02lp0054.outbound.protection.outlook.com [213.199.154.54]) (Using TLS) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-63-YNyJm5HfMGuM8UklH9Jeww-1; Mon, 24 Oct 2016 04:05:25 +0100 Received: from VI1PR08CA0033.eurprd08.prod.outlook.com (10.164.95.43) by VI1PR08MB0623.eurprd08.prod.outlook.com (10.163.169.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.669.12; Mon, 24 Oct 2016 03:05:22 +0000 Received: from DB3FFO11FD028.protection.gbl (2a01:111:f400:7e04::148) by VI1PR08CA0033.outlook.office365.com (2a01:111:e400:597a::43) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.679.12 via Frontend Transport; Mon, 24 Oct 2016 03:05:22 +0000 Received: from nebula.arm.com (217.140.96.140) by DB3FFO11FD028.mail.protection.outlook.com (10.47.217.59) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA_P384) id 15.1.669.7 via Frontend Transport; Mon, 24 Oct 2016 03:05:22 +0000 Received: from dennis-ws.asiapac.arm.com (10.1.2.79) by mail.arm.com (10.1.106.66) with Microsoft SMTP Server id 14.3.294.0; Mon, 24 Oct 2016 04:05:20 +0100 From: Dennis Chen To: CC: , Dennis Chen , Ard Biesheuvel , Leif Lindholm , Laszlo Ersek Date: Mon, 24 Oct 2016 11:04:56 +0800 Message-ID: <1477278296-24809-1-git-send-email-dennis.chen@arm.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:217.140.96.140; IPV:CAL; SCL:-1; CTRY:GB; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(7916002)(2980300002)(438002)(189002)(199003)(2906002)(586003)(87936001)(189998001)(77096005)(4326007)(104016004)(92566002)(6666003)(36756003)(8676002)(246002)(47776003)(8936002)(50226002)(5003940100001)(11100500001)(33646002)(626004)(50986999)(2351001)(5660300001)(106466001)(356003)(110136003)(86362001)(6916009)(26826002)(50466002)(229853001)(48376002)(19580405001)(19580395003)(7846002)(305945005)(19627235001); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR08MB0623; H:nebula.arm.com; FPR:; SPF:Pass; PTR:fw-tnat.cambridge.arm.com; MX:1; A:1; LANG:en; X-Microsoft-Exchange-Diagnostics: 1; DB3FFO11FD028; 1:eh9Qki7lZsgLyeWxoOEX7nczQrtICe5EggVYQ0tO/duvfazjOHQ/x1fEqLsnYN9z5SsCF7GUSaoaEUmsgDOeQALpaUwOrFDy/8NizdfYLpAVUdgvv6x4eitLJaqDHmARXFgHFqe3AzWJhYUmSfaFCL35fSwwH67UE7OA0DITSYczdeuRN0+/EhJ5eB3CFE2kUc2gYUL2t4xt3MBQ127aVU6UL14YcM246MiPzBdQxOgkelCM7pyiR4iyasdrYVidvDQq2pUfSpIQEmhQkgOkJIC2f9I/BK0WF4hODjhmrszu3+iXQF8WYCWVVCQEOonCVvPUMTS5OU4YVFkZIZbZzHqv/1MYiymax0GxK1JRJJT0w02h63t5UwzgH5EljBUQPxYo924Lbb5navOuBpO7rjFaWgterxwFmzVn/SJhgb4rp/u4a5zehAazMh0AqfCvJKaxZSSg9yYs0LpmVtIsUbglrPLqADT/38Nfw6Hha/to0TR6YuU2BB29yeMRgb+fr/66AyrVeYfLjP7UFQN3Ae6fgDI2jpP0r/NdS7MRvDZWW3oDs9CP9V/Nhg0M0qS6jnctlpg2lwKcQSWcavt/f9UEHzT5GXYKVbGbKxxVp+8= X-MS-Office365-Filtering-Correlation-Id: 8c545c5b-20df-4c6f-7dec-08d3fbba983c X-Microsoft-Exchange-Diagnostics: 1; VI1PR08MB0623; 2:e2nGcrxtMk2nCWXAZ85P0bR0ROrAculMajsmIF7bSSDfTRE0JJqQV7wCPP+uaLyTmAlRIavVqqoVVFlE/jIQoKrz764t79lS1C9VDJ6Il6HidcGbynJX89R7O0mcJfmYE0ZJnejq3PPNJCMEj7LQlayWnYiehepyK4RiHLM3xmoJr9g21WoisyvD5UjjDbY12PX/FJYraloO+Uh1xBCk5g==; 3:L4dnCwxWvZg9w2oJ3oY0vU+geV/FBi94Qon7K7XTYOPK0CcfSAUgZleTxw1dN5vcajsBg1EThDYutC7pmir6IU2w/8FJPvAztyxXbP9xipZ8oXJHtuIILGMcMWyM1tIZ+OWblaudm+e+/GbkQ/5s5T8+zinoOZysEatJTVuuSQb/8YhvwPsvsDDg9KMT52wPW+lbmjIVtvtUkKCpCmkp89A2oFHf72fZhlGfwosiK4QYWoBSjfQjS73dRmWuzQe0AgCB/Ec5oux3HBxTNOcC89u8hmmgaKv5uxdPcyEV72E=; 25:rb/sev41Yr9+DD5vEIQ6hKvcdjeluouOwLDGNpMrOdZR8q4aij7KVkNe2q8WF7p2ohkocKkCvMiF//hyKL39Swv2GUW/7XNhtsnh+kTv/OTaQxw8PmaB0XDsZXi0pBtHWk409I7ip69I6q7UB9rXo1ATfetq47llXBrtHCEvcSwarwrgKkRa8Kvz3UUtd6B5a8xHWwKCk/7pACC+MonNbBILE7RDqKKhTXO5PXSCCIbN1lpLS6H4Dwl9aKIST2+cRtHMUkxyRUPfZaAmQoEH9LdtHB2VnZTdngPPyl5Tu133kF+6bIHW2VRmvqUb1TRVxcgD6xiI3esb0hi9mf+PJQd16aMUmDPSg3nWXjHmI3Tq/s14uY0rOVWl1eoHNMfQPrLXr+nEUzserQrN+pmXGVidYt3OF3cjlpzwmC3bpqT0i2HQL8G1io33fMFB1Uqr X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(8251501002); SRVR:VI1PR08MB0623; X-LD-Processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr X-Microsoft-Exchange-Diagnostics: 1; VI1PR08MB0623; 31:c1dtvWyfBiv7aKSRLvoIv5NVl23c2JNfkUQugVGPgNO8TyWYO1n7k8TnigdEXHNeHGSpmZ/f/p2WrO5yKv1A5OD5yIF5Tu+P3jse3MxfZ46UQHxIAyz3g5NYP16xIBlsw1HSIzOy8QTV8aUkTdz5mceHa2H5FyMLF1aiqR/lC7YoYONpvTyfFFDWe6F32s9zCvUBsJzw5N4KJOO9TaBaOzGI0XcBN8D9bglh8NKSFWgtBxRYSbkIF/nYzCck3wdg; 20:Wjv3pdsRxrc7UgnaMJ0uxmwf76PpWgIknSegcopeD2QpzKcHpmYrSKBjI6cJVgiOIbUCui6WeIwDQC+DXz4nIi5B+GiHCaURII0gduFKPHOK0RAgwRXPRQV0O5RLfd+R7FzCahLvpspE3tFU9g1bc4y0B1/3V1kMCnm9cyKwdFkBzP+0KUQq5kVH0y9PAbdrZX6mCLFaWPgMDSxqesM7T4JgM0CG672w4flLfdmyrcjtqYO41aH42j+jF/zORoRz NoDisclaimer: True X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(180628864354917); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(6040176)(601004)(2401047)(13023025)(13013025)(13020025)(13024025)(8121501046)(5005006)(10201501046)(3002001)(6055026); SRVR:VI1PR08MB0623; BCL:0; PCL:0; RULEID:; SRVR:VI1PR08MB0623; X-Microsoft-Exchange-Diagnostics: 1; VI1PR08MB0623; 4:bz01YIqHRsnzEFffiOd4F3X5AL6wKM459fyyk+vb/S+ZgfgQPSR+2xRAB02TCQYS2KkByT/8YIGruazRgHegtSYoAdx6RLCmxoqxXodkV3vMR63S4qOQjIV2ARRhcp1FldPro3jUqT5KfpTXCTfbVTFgdMEZ0EqqdMQs84p2KFYy/vO0WcWhorHOqiudTvBX5zq5vBbk5MqUR8vlDNcbjF3DBmk32IIKw+0Wsj1YvmONF+OJUkjJbavll4MFJzjizu2+GSY8hVWjR8TTFP9LAeH9HIzXUkKnUxAEfLJZP5o+TaOfdy0H+xdQdf10qJl0XPC8SIocZ/pOwWHy0p5It+jPVUBcb4gntAbPFhp6ENvcqOxvCFxQ0HNNzJx2L+1HnYtf3Bb77bsDv4A0ZIl1dm3TeWHewZ/rLDZbJzqZ+k6Wx28/BQYRyMUAKHe74/GiOTpHPlEK68keC/mAqS1k544qR1KnAOkJSdBe6n/heCQfDzezYOHCJVuf9/ICBsG3D+ocltsyEWpaZ6p472LFOsqu8ws6gCUjtNuyavLOIuY= X-Forefront-PRVS: 0105DAA385 X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; VI1PR08MB0623; 23:K5qhIzLFJsg1eAF7jIJ2AwB9W9D/U2lfh6STq02UM?= =?us-ascii?Q?xjTWwpmXIAUPwGQ15QxmU43s3zuQ4M2ueLsLt/CIFZT8qymhE1wfIOxnqiGq?= =?us-ascii?Q?XQUY2FZH3XnPxLU1NtmpVW3PaV376Wo2QdYdNjBLHXmfklpH689Oiuir7CjK?= =?us-ascii?Q?tB+HMSs6KtjOGscd3RRnmONM8pFqitMKmz2UjyM7PwpUVsi9EfJST9VY836G?= =?us-ascii?Q?wmS6wy38poTtCOL7WV8K555DkmEKRZCj/1HbfxnSYPOuKODb7UKit1ZX+Fpu?= =?us-ascii?Q?4iutO9JiDyo45O8JSNzEpdzVS1akwcMaTW/SlgTFnyw53tch9fH8Q9D01g0C?= =?us-ascii?Q?yE4dgFfc9ISqL/Ea8VijjNAg8nD7lbDFis9V4aCQbD84eqB5AI2uEAkQrqrB?= =?us-ascii?Q?PeoUPYR+DbUp9BVH6lJ0Fy0KXBhRYiKb62gtq/4+qNujSCW0SWNeKeRpwOa/?= =?us-ascii?Q?He0jtTmQl0cwZkEDJD+M8jc2WUcQquxLtqsdXS0gnOLL9D6rzaqT+3h96R8W?= =?us-ascii?Q?ciOkyeM0YKrtCZspWBqKTQdIrkFDeYL35OrNgLIa+PGSLOJjg/msf0/0T+ad?= =?us-ascii?Q?sZ77RNUoUdj3X4ikFuL/T0KReDmGunXQDihrpfvbkMKn/0EVvzkyFxNgVV/m?= =?us-ascii?Q?U8HwZw8DdMJobc7+Sb242JyyQzivHxjiiFIWlox3heyOxU7osT5IXtjADnOg?= =?us-ascii?Q?46d1b1JLTCZB5Era6DKbkcFixhYSBVEkNr8eeEYqRLeCEEgJUSBaVxkaLuum?= =?us-ascii?Q?1urEdhP9lSj1AZa5kzEakCKr/w8wXjsgz3V9H6M9ua25r7ldSetwvxxbj0hd?= =?us-ascii?Q?bwvjgG04D99O4H0nG9JW6mcEtGfOULKR4mYAV9Dx/ick2mt+YzHc9KpRCEfB?= =?us-ascii?Q?BwR631BZf3jyT2V0aWGmQP2+Ea6rsy9Xrsh9gOPcZfEwZvkLYBlF2klQL/bW?= =?us-ascii?Q?odd6j6bF861nq23+6BVOcJ+Ijk0eexnPKr2eI0reGDGq2T/kFlpwk5qIc/Bp?= =?us-ascii?Q?JxBl/+pkVr0mmttiT86PP/6AdImvN6z/+7+l/ETWWn8YUbFcelOKrJEbGNAv?= =?us-ascii?Q?UGFrcY=3D?= X-Microsoft-Exchange-Diagnostics: 1; VI1PR08MB0623; 6:8q3CcZ+OOrpt/7kdrEPTP/vAw3e8IZWni4s1PlCSOkhp9ozq0hMcKnnZvIUi+3eL12geGyAyEx4ny+2chWuublrHZ3TrCkcpAdU3zpLRFlLDs+rlwyT+24m+EoIDDyeDKvjgehZ/tn6lF1hgGEYvvlOcVCEDyeuaDHBw1uEY3sAxDDnw5DfMRRN2Dg0xVU5xqAPRAcRX7C83KtxE3PHMucnhlXOiwlaybP3rFARa4NEDXxugLW/u7SagBKpFzxvkWMvxX1t4S+UHorl6tI04hz1yfs74U4t/rdwPm7EnZp1VsNCujaRiJJ9VJqI4N5xTU62hDYKy5F1edbSzF+Ah9u0MXnVv5cUQEl1bUlcNsfc=; 5:jEGAi6GqYi5cOwsmd7jdVngqs1tIbp/McY+zgngA6cA6Bcx2mgDQHJMINP66tq2H8ofeiQG7+BnbVs3+Ij5NyIJY9RAE9tp7hdrkUWy4a2RkHjNUBhczPPj66l6OzFWmaGDUKGLp69FMgtIlOx6MtA==; 24:+NapdGDQhkFtJN9CvcmCkpCxRywsWVNYPKUUHXh9GIVSn3904RUAKj0S5Sk0QQMsSKVOMXRQg78ng2lHFOJp8vGryDqOMnGUWWkBPvE2qWw= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; VI1PR08MB0623; 7:EwLK+RD6cmMt7PB94bKBIq8b3783sdraGu66eE3DFQzCiLaFvClWZQXWx8WTxJSd54GAfZfYEmHZEKtlQmj6fio9K8SsnldT+b5gCMdC7YXkrHIFTKdXa+7g9YjX+07sMZugG+Y0OYJZE3CyOrczGZFhRcqyuHdQluayhNOHMROl/FEttTeoUs3F5rzXku4rOy+rdu1kBO7I1uXst5cVP50f5+Lm0ViC4rh/Dc09Ug74UxeM4zzznGNk5Z1YKjzCDs7b3juFVBrT5Z0E6CdOsYr2Sa6xXRd8XhVFYhOcDcW7tgRwfg2A7DbFJyUvU1owQ1wlBVM+b1JTP+SpeKJjMwakgRDwF/SrbavM7KoE3Kk= X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Oct 2016 03:05:22.3465 (UTC) X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[217.140.96.140]; Helo=[nebula.arm.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR08MB0623 X-MC-Unique: YNyJm5HfMGuM8UklH9Jeww-1 Subject: [PATCH] ARMPkg: Unified the GIC base address variables as 64-bit width X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 24 Oct 2016 03:05:30 -0000 Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Since ACPI spec defines the GIC base addresses (CPU interface, Distributor and Redistributor*GICv3 only*) as 64-bit, so we should define these corresponding base address variables as 64-bit instead of 32-bit. This patch redefines them according to the ACPI spec. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Ard Biesheuvel Cc: Leif Lindholm Cc: Laszlo Ersek Signed-off-by: Dennis Chen --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 64 ++++++++++---------- ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c | 2 +- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 4 +- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c | 6 +- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c | 4 +- ArmPkg/Include/Library/ArmGicLib.h | 78 ++++++++++++---------= ---- 6 files changed, 79 insertions(+), 79 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index e658e9b..733488c 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -41,18 +41,18 @@ SourceIsSpi ( * @retval Base address of the associated GIC Redistributor */ STATIC -UINTN +UINT64 GicGetCpuRedistributorBase ( - IN UINTN GicRedistributorBase, - IN ARM_GIC_ARCH_REVISION Revision + IN UINT64 GicRedistributorBase, + IN ARM_GIC_ARCH_REVISION Revision ) { - UINTN Index; - UINTN MpId; - UINTN CpuAffinity; - UINTN Affinity; - UINTN GicRedistributorGranularity; - UINTN GicCpuRedistributorBase; + UINTN Index; + UINTN MpId; + UINTN CpuAffinity; + UINTN Affinity; + UINTN GicRedistributorGranularity; + UINT64 GicCpuRedistributorBase; =20 MpId =3D ArmReadMpidr (); // Define CPU affinity as Affinity0[0:8], Affinity1[9:15], Affinity2[16:= 23], Affinity3[24:32] @@ -87,7 +87,7 @@ GicGetCpuRedistributorBase ( UINTN EFIAPI ArmGicGetInterfaceIdentification ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ) { // Read the GIC Identification Register @@ -97,7 +97,7 @@ ArmGicGetInterfaceIdentification ( UINTN EFIAPI ArmGicGetMaxNumInterrupts ( - IN INTN GicDistributorBase + IN UINT64 GicDistributorBase ) { return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) = + 1); @@ -106,10 +106,10 @@ ArmGicGetMaxNumInterrupts ( VOID EFIAPI ArmGicSendSgiTo ( - IN INTN GicDistributorBase, - IN INTN TargetListFilter, - IN INTN CPUTargetList, - IN INTN SgiId + IN UINT64 GicDistributorBase, + IN UINTN TargetListFilter, + IN UINTN CPUTargetList, + IN UINTN SgiId ) { MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & = 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId); @@ -131,8 +131,8 @@ ArmGicSendSgiTo ( UINTN EFIAPI ArmGicAcknowledgeInterrupt ( - IN UINTN GicInterruptInterfaceBase, - OUT UINTN *InterruptId + IN UINT64 GicInterruptInterfaceBase, + OUT UINTN *InterruptId ) { UINTN Value; @@ -162,8 +162,8 @@ ArmGicAcknowledgeInterrupt ( VOID EFIAPI ArmGicEndOfInterrupt ( - IN UINTN GicInterruptInterfaceBase, - IN UINTN Source + IN UINT64 GicInterruptInterfaceBase, + IN UINTN Source ) { ARM_GIC_ARCH_REVISION Revision; @@ -181,9 +181,9 @@ ArmGicEndOfInterrupt ( VOID EFIAPI ArmGicEnableInterrupt ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source + IN UINT64 GicDistributorBase, + IN UINT64 GicRedistributorBase, + IN UINTN Source ) { UINT32 RegOffset; @@ -216,9 +216,9 @@ ArmGicEnableInterrupt ( VOID EFIAPI ArmGicDisableInterrupt ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source + IN UINT64 GicDistributorBase, + IN UINT64 GicRedistributorBase, + IN UINTN Source ) { UINT32 RegOffset; @@ -250,15 +250,15 @@ ArmGicDisableInterrupt ( BOOLEAN EFIAPI ArmGicIsInterruptEnabled ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source + IN UINT64 GicDistributorBase, + IN UINT64 GicRedistributorBase, + IN UINTN Source ) { UINT32 RegOffset; UINTN RegShift; ARM_GIC_ARCH_REVISION Revision; - UINTN GicCpuRedistributorBase; + UINT64 GicCpuRedistributorBase; UINT32 Interrupts; =20 // Calculate enable register offset and bit position @@ -286,7 +286,7 @@ ArmGicIsInterruptEnabled ( VOID EFIAPI ArmGicDisableDistributor ( - IN INTN GicDistributorBase + IN UINT64 GicDistributorBase ) { // Disable Gic Distributor @@ -296,7 +296,7 @@ ArmGicDisableDistributor ( VOID EFIAPI ArmGicEnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ) { ARM_GIC_ARCH_REVISION Revision; @@ -314,7 +314,7 @@ ArmGicEnableInterruptInterface ( VOID EFIAPI ArmGicDisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ) { ARM_GIC_ARCH_REVISION Revision; diff --git a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c b/ArmPkg/Drivers/ArmGi= c/ArmGicNonSecLib.c index f90391b..bc01db9 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c @@ -19,7 +19,7 @@ VOID EFIAPI ArmGicEnableDistributor ( - IN INTN GicDistributorBase + IN UINT64 GicDistributorBase ) { ARM_GIC_ARCH_REVISION Revision; diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/Arm= Gic/GicV2/ArmGicV2Dxe.c index b9ecd55..c7c5af1 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c @@ -30,8 +30,8 @@ Abstract: =20 extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol; =20 -STATIC UINT32 mGicInterruptInterfaceBase; -STATIC UINT32 mGicDistributorBase; +STATIC UINT64 mGicInterruptInterfaceBase; +STATIC UINT64 mGicDistributorBase; =20 /** Enable interrupt source Source. diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/ArmPkg/Drivers/Arm= Gic/GicV2/ArmGicV2Lib.c index 5ac1d89..669ec99 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c @@ -18,7 +18,7 @@ UINTN EFIAPI ArmGicV2AcknowledgeInterrupt ( - IN UINTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ) { // Read the Interrupt Acknowledge Register @@ -28,8 +28,8 @@ ArmGicV2AcknowledgeInterrupt ( VOID EFIAPI ArmGicV2EndOfInterrupt ( - IN UINTN GicInterruptInterfaceBase, - IN UINTN Source + IN UINT64 GicInterruptInterfaceBase, + IN UINTN Source ) { MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source); diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c b/ArmPkg/Drive= rs/ArmGic/GicV2/ArmGicV2NonSecLib.c index 92b764f..a7adbaf 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c @@ -20,7 +20,7 @@ VOID EFIAPI ArmGicV2EnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ) { /* @@ -33,7 +33,7 @@ ArmGicV2EnableInterruptInterface ( VOID EFIAPI ArmGicV2DisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ) { // Disable Gic Interface diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/Ar= mGicLib.h index 4364f3f..bf6405c 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -101,7 +101,7 @@ UINTN EFIAPI ArmGicGetInterfaceIdentification ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ); =20 // @@ -110,56 +110,56 @@ ArmGicGetInterfaceIdentification ( VOID EFIAPI ArmGicSetupNonSecure ( - IN UINTN MpId, - IN INTN GicDistributorBase, - IN INTN GicInterruptInterfaceBase + IN UINTN MpId, + IN UINT64 GicDistributorBase, + IN UINT64 GicInterruptInterfaceBase ); =20 VOID EFIAPI ArmGicSetSecureInterrupts ( - IN UINTN GicDistributorBase, - IN UINTN* GicSecureInterruptMask, - IN UINTN GicSecureInterruptMaskSize + IN UINT64 GicDistributorBase, + IN UINTN* GicSecureInterruptMask, + IN UINTN GicSecureInterruptMaskSize ); =20 VOID EFIAPI ArmGicEnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ); =20 VOID EFIAPI ArmGicDisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ); =20 VOID EFIAPI ArmGicEnableDistributor ( - IN INTN GicDistributorBase + IN UINT64 GicDistributorBase ); =20 VOID EFIAPI ArmGicDisableDistributor ( - IN INTN GicDistributorBase + IN UINT64 GicDistributorBase ); =20 UINTN EFIAPI ArmGicGetMaxNumInterrupts ( - IN INTN GicDistributorBase + IN UINT64 GicDistributorBase ); =20 VOID EFIAPI ArmGicSendSgiTo ( - IN INTN GicDistributorBase, - IN INTN TargetListFilter, - IN INTN CPUTargetList, - IN INTN SgiId + IN UINT64 GicDistributorBase, + IN UINTN TargetListFilter, + IN UINTN CPUTargetList, + IN UINTN SgiId ); =20 /* @@ -178,46 +178,46 @@ ArmGicSendSgiTo ( UINTN EFIAPI ArmGicAcknowledgeInterrupt ( - IN UINTN GicInterruptInterfaceBase, - OUT UINTN *InterruptId + IN UINT64 GicInterruptInterfaceBase, + OUT UINTN *InterruptId ); =20 VOID EFIAPI ArmGicEndOfInterrupt ( - IN UINTN GicInterruptInterfaceBase, - IN UINTN Source + IN UINT64 GicInterruptInterfaceBase, + IN UINTN Source ); =20 UINTN EFIAPI ArmGicSetPriorityMask ( - IN INTN GicInterruptInterfaceBase, - IN INTN PriorityMask + IN UINT64 GicInterruptInterfaceBase, + IN UINTN PriorityMask ); =20 VOID EFIAPI ArmGicEnableInterrupt ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source + IN UINT64 GicDistributorBase, + IN UINT64 GicRedistributorBase, + IN UINTN Source ); =20 VOID EFIAPI ArmGicDisableInterrupt ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source + IN UINT64 GicDistributorBase, + IN UINT64 GicRedistributorBase, + IN UINTN Source ); =20 BOOLEAN EFIAPI ArmGicIsInterruptEnabled ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source + IN UINT64 GicDistributorBase, + IN UINT64 GicRedistributorBase, + IN UINTN Source ); =20 // @@ -230,34 +230,34 @@ ArmGicIsInterruptEnabled ( VOID EFIAPI ArmGicV2SetupNonSecure ( - IN UINTN MpId, - IN INTN GicDistributorBase, - IN INTN GicInterruptInterfaceBase + IN UINTN MpId, + IN UINT64 GicDistributorBase, + IN UINT64 GicInterruptInterfaceBase ); =20 VOID EFIAPI ArmGicV2EnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ); =20 VOID EFIAPI ArmGicV2DisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ); =20 UINTN EFIAPI ArmGicV2AcknowledgeInterrupt ( - IN UINTN GicInterruptInterfaceBase + IN UINT64 GicInterruptInterfaceBase ); =20 VOID EFIAPI ArmGicV2EndOfInterrupt ( - IN UINTN GicInterruptInterfaceBase, - IN UINTN Source + IN UINT64 GicInterruptInterfaceBase, + IN UINTN Source ); =20 // --=20 2.7.4