From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x231.google.com (mail-wm0-x231.google.com [IPv6:2a00:1450:400c:c09::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 33C7281D5E for ; Thu, 3 Nov 2016 04:41:59 -0700 (PDT) Received: by mail-wm0-x231.google.com with SMTP id t79so94888259wmt.0 for ; Thu, 03 Nov 2016 04:42:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=V7TVSSfI55cOpcpiM3P7PsAKqEF2DYd0wSUtAmjmkJQ=; b=J1LBOC2UukD5kML+Tf91Irs77LoG2GErBbL5EfeODFSiz1obR0EvFtmxKQyMvZ2+z8 X6Ao5lA4hva+SHUcHnvnBBALeOe10ChFFDxVK4/ysilZDuvNt1EcCc8T80pMfO/b/qYZ NGVFlGNxB7oiMPDRTOjXr6w452EpqhXS3rIXo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=V7TVSSfI55cOpcpiM3P7PsAKqEF2DYd0wSUtAmjmkJQ=; b=gqm1u4lssqpULESo6ybjVpfk1KvukHcSoPqy0Wb4NuHeESTfg6otzpJv8eOYBAcmxA ukKtog4mwjtTmHAtTo0WAA1/lxgz+OiIoDLufhz57kRFO8KRjNwe1Ksnr0T2ig5qlBfk IDepiN9o71961+tNR1s6/TX2O6DCH/rG2ReMLEQogbcHCB7sq779zFOJhippEkzKt7qK DKMtcGX75xb64gEn92kjq33kylBSx+QoETjoN53Sr4LRrQZeQYRrMcnU8fq8pNR0yByc XVXbghUbEUEohPHtvKLTALnmwYJptU+iW7u9JDmFT4xu63fUSqcqQrrPy0RvhtLn4ofx B9cw== X-Gm-Message-State: ABUngvdSa/G6G8DHCoM6iWVNz7Fd+smKSWYJnFWXBHV5RGEAUXNFIzyB5hX8Ad2tAdFiICuZ X-Received: by 10.28.107.129 with SMTP id a1mr1509344wmi.90.1478173319059; Thu, 03 Nov 2016 04:41:59 -0700 (PDT) Received: from localhost.localdomain ([105.151.153.127]) by smtp.gmail.com with ESMTPSA id za1sm8108371wjb.8.2016.11.03.04.41.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 03 Nov 2016 04:41:58 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, michael.d.kinney@intel.com, afish@apple.com Cc: mw@semihalf.com, feng.tian@intel.com, star.zeng@intel.com, Ard Biesheuvel Date: Thu, 3 Nov 2016 11:41:42 +0000 Message-Id: <1478173302-22349-5-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1478173302-22349-1-git-send-email-ard.biesheuvel@linaro.org> References: <1478173302-22349-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [PATCH v2 5/5] Omap35xxPkg/PciEmulation: port to new non-discoverable device infrastructure X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 03 Nov 2016 11:41:59 -0000 Move to the new non-discoverable device protocols for wiring the PCI based EHCI controller driver to the non-discoverable EHCI controller found on the OMAP 3530. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- BeagleBoardPkg/BeagleBoardPkg.dsc | 2 + BeagleBoardPkg/BeagleBoardPkg.fdf | 1 + Omap35xxPkg/Omap35xxPkg.dsc | 2 +- Omap35xxPkg/PciEmulation/PciEmulation.c | 571 +------------------- Omap35xxPkg/PciEmulation/PciEmulation.h | 292 ---------- Omap35xxPkg/PciEmulation/PciEmulation.inf | 16 +- Omap35xxPkg/PciEmulation/PciRootBridgeIo.c | 306 ----------- 7 files changed, 27 insertions(+), 1163 deletions(-) diff --git a/BeagleBoardPkg/BeagleBoardPkg.dsc b/BeagleBoardPkg/BeagleBoardPkg.dsc index 1e2ecdc21ad9..d6ed5e9865f9 100644 --- a/BeagleBoardPkg/BeagleBoardPkg.dsc +++ b/BeagleBoardPkg/BeagleBoardPkg.dsc @@ -184,6 +184,7 @@ [LibraryClasses.common.DXE_DRIVER] DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf [LibraryClasses.common.UEFI_APPLICATION] ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf @@ -449,6 +450,7 @@ [Components.common] # USB # Omap35xxPkg/PciEmulation/PciEmulation.inf + MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf { diff --git a/BeagleBoardPkg/BeagleBoardPkg.fdf b/BeagleBoardPkg/BeagleBoardPkg.fdf index fcaf44abb5cf..23696e122656 100644 --- a/BeagleBoardPkg/BeagleBoardPkg.fdf +++ b/BeagleBoardPkg/BeagleBoardPkg.fdf @@ -167,6 +167,7 @@ [FV.FvMain] # INF Omap35xxPkg/PciEmulation/PciEmulation.inf + INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf diff --git a/Omap35xxPkg/Omap35xxPkg.dsc b/Omap35xxPkg/Omap35xxPkg.dsc index 4a3317f255f6..89a407049f31 100644 --- a/Omap35xxPkg/Omap35xxPkg.dsc +++ b/Omap35xxPkg/Omap35xxPkg.dsc @@ -79,7 +79,7 @@ [LibraryClasses.common] [LibraryClasses.common.DXE_DRIVER] DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf - + NonDiscoverableDeviceRegistrationLib|MdeModulePkg/Library/NonDiscoverableDeviceRegistrationLib/NonDiscoverableDeviceRegistrationLib.inf [LibraryClasses.ARM] NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf diff --git a/Omap35xxPkg/PciEmulation/PciEmulation.c b/Omap35xxPkg/PciEmulation/PciEmulation.c index 17ea03ccf486..5f9359bfb378 100644 --- a/Omap35xxPkg/PciEmulation/PciEmulation.c +++ b/Omap35xxPkg/PciEmulation/PciEmulation.c @@ -1,6 +1,7 @@ /** @file Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+ Copyright (c) 2016, Linaro, Ltd. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -12,49 +13,27 @@ **/ -#include "PciEmulation.h" +#include -EMBEDDED_EXTERNAL_DEVICE *gTPS65950; - -#define HOST_CONTROLLER_OPERATION_REG_SIZE 0x44 +#include +#include +#include +#include +#include -typedef struct { - ACPI_HID_DEVICE_PATH AcpiDevicePath; - PCI_DEVICE_PATH PciDevicePath; - EFI_DEVICE_PATH_PROTOCOL EndDevicePath; -} EFI_PCI_IO_DEVICE_PATH; +#include -typedef struct { - UINT32 Signature; - EFI_PCI_IO_DEVICE_PATH DevicePath; - EFI_PCI_IO_PROTOCOL PciIoProtocol; - PCI_TYPE00 *ConfigSpace; - PCI_ROOT_BRIDGE RootBridge; - UINTN Segment; -} EFI_PCI_IO_PRIVATE_DATA; +#include +#include -#define EFI_PCI_IO_PRIVATE_DATA_SIGNATURE SIGNATURE_32('p', 'c', 'i', 'o') -#define EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(a) CR(a, EFI_PCI_IO_PRIVATE_DATA, PciIoProtocol, EFI_PCI_IO_PRIVATE_DATA_SIGNATURE) +EMBEDDED_EXTERNAL_DEVICE *gTPS65950; -EFI_PCI_IO_DEVICE_PATH PciIoDevicePathTemplate = -{ - { - { ACPI_DEVICE_PATH, ACPI_DP, { sizeof (ACPI_HID_DEVICE_PATH), 0 } }, - EISA_PNP_ID(0x0A03), // HID - 0 // UID - }, - { - { HARDWARE_DEVICE_PATH, HW_PCI_DP, { sizeof (PCI_DEVICE_PATH), 0 } }, - 0, - 0 - }, - { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0} } -}; +#define HOST_CONTROLLER_OPERATION_REG_SIZE 0x44 STATIC -VOID +EFI_STATUS ConfigureUSBHost ( - VOID + NON_DISCOVERABLE_DEVICE *Device ) { EFI_STATUS Status; @@ -103,454 +82,10 @@ ConfigureUSBHost ( Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data); ASSERT_EFI_ERROR (Status); -} - - -EFI_STATUS -PciIoPollMem ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoPollIo ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoMemRead ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This); - - return PciRootBridgeIoMemRead (&Private->RootBridge.Io, - (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, - Private->ConfigSpace->Device.Bar[BarIndex] + Offset, - Count, - Buffer - ); -} - -EFI_STATUS -PciIoMemWrite ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This); - - return PciRootBridgeIoMemWrite (&Private->RootBridge.Io, - (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, - Private->ConfigSpace->Device.Bar[BarIndex] + Offset, - Count, - Buffer - ); -} - -EFI_STATUS -PciIoIoRead ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoIoWrite ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -/** - Enable a PCI driver to read PCI controller registers in PCI configuration space. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. - @param[in] Width Signifies the width of the memory operations. - @param[in] Offset The offset within the PCI configuration space for - the PCI controller. - @param[in] Count The number of PCI configuration operations to - perform. Bytes moved is Width size * Count, - starting at Offset. - - @param[in out] Buffer The destination buffer to store the results. - - @retval EFI_SUCCESS The data was read from the PCI controller. - @retval EFI_INVALID_PARAMETER "Width" is invalid. - @retval EFI_INVALID_PARAMETER "Buffer" is NULL. - -**/ -EFI_STATUS -PciIoPciRead ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT32 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This); - EFI_STATUS Status; - - if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) { - return EFI_INVALID_PARAMETER; - } - - Status = PciRootBridgeIoMemRW ( - (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width, - Count, - TRUE, - (PTR)(UINTN)Buffer, - TRUE, - (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset) //Fix me ConfigSpace - ); - - return Status; -} - -/** - Enable a PCI driver to write PCI controller registers in PCI configuration space. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. - @param[in] Width Signifies the width of the memory operations. - @param[in] Offset The offset within the PCI configuration space for - the PCI controller. - @param[in] Count The number of PCI configuration operations to - perform. Bytes moved is Width size * Count, - starting at Offset. - - @param[in out] Buffer The source buffer to write data from. - - @retval EFI_SUCCESS The data was read from the PCI controller. - @retval EFI_INVALID_PARAMETER "Width" is invalid. - @retval EFI_INVALID_PARAMETER "Buffer" is NULL. - -**/ -EFI_STATUS -PciIoPciWrite ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT32 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This); - - if ((Width < 0) || (Width >= EfiPciIoWidthMaximum) || (Buffer == NULL)) { - return EFI_INVALID_PARAMETER; - } - - return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, - Count, - TRUE, - (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset), - TRUE, - (PTR)(UINTN)Buffer - ); -} - -EFI_STATUS -PciIoCopyMem ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 DestBarIndex, - IN UINT64 DestOffset, - IN UINT8 SrcBarIndex, - IN UINT64 SrcOffset, - IN UINTN Count - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoMap ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_OPERATION Operation, - IN VOID *HostAddress, - IN OUT UINTN *NumberOfBytes, - OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, - OUT VOID **Mapping - ) -{ - DMA_MAP_OPERATION DmaOperation; - - if (Operation == EfiPciIoOperationBusMasterRead) { - DmaOperation = MapOperationBusMasterRead; - } else if (Operation == EfiPciIoOperationBusMasterWrite) { - DmaOperation = MapOperationBusMasterWrite; - } else if (Operation == EfiPciIoOperationBusMasterCommonBuffer) { - DmaOperation = MapOperationBusMasterCommonBuffer; - } else { - return EFI_INVALID_PARAMETER; - } - return DmaMap (DmaOperation, HostAddress, NumberOfBytes, DeviceAddress, Mapping); -} -EFI_STATUS -PciIoUnmap ( - IN EFI_PCI_IO_PROTOCOL *This, - IN VOID *Mapping - ) -{ - return DmaUnmap (Mapping); -} - -/** - Allocate pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer - mapping. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. - @param[in] Type This parameter is not used and must be ignored. - @param[in] MemoryType The type of memory to allocate, EfiBootServicesData or - EfiRuntimeServicesData. - @param[in] Pages The number of pages to allocate. - @param[out] HostAddress A pointer to store the base system memory address of - the allocated range. - @param[in] Attributes The requested bit mask of attributes for the allocated - range. Only the attributes, - EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE and - EFI_PCI_ATTRIBUTE_MEMORY_CACHED may be used with this - function. If any other bits are set, then EFI_UNSUPPORTED - is returned. This function ignores this bit mask. - - @retval EFI_SUCCESS The requested memory pages were allocated. - @retval EFI_INVALID_PARAMETER HostAddress is NULL. - @retval EFI_INVALID_PARAMETER MemoryType is invalid. - @retval EFI_UNSUPPORTED Attributes is unsupported. - @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. - -**/ -EFI_STATUS -PciIoAllocateBuffer ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_ALLOCATE_TYPE Type, - IN EFI_MEMORY_TYPE MemoryType, - IN UINTN Pages, - OUT VOID **HostAddress, - IN UINT64 Attributes - ) -{ - if (Attributes & - (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | - EFI_PCI_ATTRIBUTE_MEMORY_CACHED ))) { - return EFI_UNSUPPORTED; - } - - return DmaAllocateBuffer (MemoryType, Pages, HostAddress); -} - - -EFI_STATUS -PciIoFreeBuffer ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINTN Pages, - IN VOID *HostAddress - ) -{ - return DmaFreeBuffer (Pages, HostAddress); -} - - -EFI_STATUS -PciIoFlush ( - IN EFI_PCI_IO_PROTOCOL *This - ) -{ return EFI_SUCCESS; } -/** - Retrieves this PCI controller's current PCI bus number, device number, and function number. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. - @param[out] SegmentNumber The PCI controller's current PCI segment number. - @param[out] BusNumber The PCI controller's current PCI bus number. - @param[out] DeviceNumber The PCI controller's current PCI device number. - @param[out] FunctionNumber The PCI controller's current PCI function number. - - @retval EFI_SUCCESS The PCI controller location was returned. - @retval EFI_INVALID_PARAMETER At least one out of the four output parameters is - a NULL pointer. -**/ -EFI_STATUS -PciIoGetLocation ( - IN EFI_PCI_IO_PROTOCOL *This, - OUT UINTN *SegmentNumber, - OUT UINTN *BusNumber, - OUT UINTN *DeviceNumber, - OUT UINTN *FunctionNumber - ) -{ - EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS (This); - - if ((SegmentNumber == NULL) || (BusNumber == NULL) || - (DeviceNumber == NULL) || (FunctionNumber == NULL) ) { - return EFI_INVALID_PARAMETER; - } - - *SegmentNumber = Private->Segment; - *BusNumber = 0xff; - *DeviceNumber = 0; - *FunctionNumber = 0; - - return EFI_SUCCESS; -} - -/** - Performs an operation on the attributes that this PCI controller supports. - - The operations include getting the set of supported attributes, retrieving - the current attributes, setting the current attributes, enabling attributes, - and disabling attributes. - - @param[in] This A pointer to the EFI_PCI_IO_PROTOCOL instance. - @param[in] Operation The operation to perform on the attributes for this - PCI controller. - @param[in] Attributes The mask of attributes that are used for Set, - Enable and Disable operations. - @param[out] Result A pointer to the result mask of attributes that are - returned for the Get and Supported operations. This - is an optional parameter that may be NULL for the - Set, Enable, and Disable operations. - - @retval EFI_SUCCESS The operation on the PCI controller's - attributes was completed. If the operation - was Get or Supported, then the attribute mask - is returned in Result. - @retval EFI_INVALID_PARAMETER Operation is greater than or equal to - EfiPciIoAttributeOperationMaximum. - @retval EFI_INVALID_PARAMETER Operation is Get and Result is NULL. - @retval EFI_INVALID_PARAMETER Operation is Supported and Result is NULL. - -**/ -EFI_STATUS -PciIoAttributes ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, - IN UINT64 Attributes, - OUT UINT64 *Result OPTIONAL - ) -{ - switch (Operation) { - case EfiPciIoAttributeOperationGet: - case EfiPciIoAttributeOperationSupported: - if (Result == NULL) { - return EFI_INVALID_PARAMETER; - } - // - // We are not a real PCI device so just say things we kind of do - // - *Result = EFI_PCI_DEVICE_ENABLE; - break; - - case EfiPciIoAttributeOperationSet: - case EfiPciIoAttributeOperationEnable: - case EfiPciIoAttributeOperationDisable: - if (Attributes & (~EFI_PCI_DEVICE_ENABLE)) { - return EFI_UNSUPPORTED; - } - // Since we are not a real PCI device no enable/set or disable operations exist. - return EFI_SUCCESS; - - default: - return EFI_INVALID_PARAMETER; - }; - return EFI_SUCCESS; -} - -EFI_STATUS -PciIoGetBarAttributes ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINT8 BarIndex, - OUT UINT64 *Supports, OPTIONAL - OUT VOID **Resources OPTIONAL - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -PciIoSetBarAttributes ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINT64 Attributes, - IN UINT8 BarIndex, - IN OUT UINT64 *Offset, - IN OUT UINT64 *Length - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_PCI_IO_PROTOCOL PciIoTemplate = -{ - PciIoPollMem, - PciIoPollIo, - { PciIoMemRead, PciIoMemWrite }, - { PciIoIoRead, PciIoIoWrite }, - { PciIoPciRead, PciIoPciWrite }, - PciIoCopyMem, - PciIoMap, - PciIoUnmap, - PciIoAllocateBuffer, - PciIoFreeBuffer, - PciIoFlush, - PciIoGetLocation, - PciIoAttributes, - PciIoGetBarAttributes, - PciIoSetBarAttributes, - 0, - 0 -}; - EFI_STATUS EFIAPI PciEmulationEntryPoint ( @@ -558,76 +93,10 @@ PciEmulationEntryPoint ( IN EFI_SYSTEM_TABLE *SystemTable ) { - EFI_STATUS Status; - EFI_HANDLE Handle; - EFI_PCI_IO_PRIVATE_DATA *Private; - UINT8 CapabilityLength; - UINT8 PhysicalPorts; - UINTN Count; - - - //Configure USB host for OMAP3530. - ConfigureUSBHost(); - - // Create a private structure - Private = AllocatePool(sizeof(EFI_PCI_IO_PRIVATE_DATA)); - if (Private == NULL) { - Status = EFI_OUT_OF_RESOURCES; - return Status; - } - - Private->Signature = EFI_PCI_IO_PRIVATE_DATA_SIGNATURE; // Fill in signature - Private->RootBridge.Signature = PCI_ROOT_BRIDGE_SIGNATURE; // Fake Root Bridge structure needs a signature too - Private->RootBridge.MemoryStart = USB_EHCI_HCCAPBASE; // Get the USB capability register base - Private->Segment = 0; // Default to segment zero - - // Find out the capability register length and number of physical ports. - CapabilityLength = MmioRead8(Private->RootBridge.MemoryStart); - PhysicalPorts = (MmioRead32 (Private->RootBridge.MemoryStart + 0x4)) & 0x0000000F; - - // Calculate the total size of the USB registers. - Private->RootBridge.MemorySize = CapabilityLength + (HOST_CONTROLLER_OPERATION_REG_SIZE + ((4 * PhysicalPorts) - 1)); - - // Enable Port Power bit in Port status and control registers in EHCI register space. - // Port Power Control (PPC) bit in the HCSPARAMS register is already set which indicates - // host controller implementation includes port power control. - for (Count = 0; Count < PhysicalPorts; Count++) { - MmioOr32 ((Private->RootBridge.MemoryStart + CapabilityLength + HOST_CONTROLLER_OPERATION_REG_SIZE + 4*Count), 0x00001000); - } - - // Create fake PCI config space. - Private->ConfigSpace = AllocateZeroPool(sizeof(PCI_TYPE00)); - if (Private->ConfigSpace == NULL) { - Status = EFI_OUT_OF_RESOURCES; - FreePool(Private); - return Status; - } - - // Configure PCI config space - Private->ConfigSpace->Hdr.VendorId = 0xFFFF; // Invalid vendor Id as it is not an actual device. - Private->ConfigSpace->Hdr.DeviceId = 0x0000; // Not relevant as the vendor id is not valid. - Private->ConfigSpace->Hdr.ClassCode[0] = 0x20; - Private->ConfigSpace->Hdr.ClassCode[1] = 0x03; - Private->ConfigSpace->Hdr.ClassCode[2] = 0x0C; - Private->ConfigSpace->Device.Bar[0] = Private->RootBridge.MemoryStart; - - Handle = NULL; - - // Unique device path. - CopyMem(&Private->DevicePath, &PciIoDevicePathTemplate, sizeof(PciIoDevicePathTemplate)); - Private->DevicePath.AcpiDevicePath.UID = 0; - - // Copy protocol structure - CopyMem(&Private->PciIoProtocol, &PciIoTemplate, sizeof(PciIoTemplate)); - - Status = gBS->InstallMultipleProtocolInterfaces(&Handle, - &gEfiPciIoProtocolGuid, &Private->PciIoProtocol, - &gEfiDevicePathProtocolGuid, &Private->DevicePath, - NULL); - if (EFI_ERROR(Status)) { - DEBUG((EFI_D_ERROR, "PciEmulationEntryPoint InstallMultipleProtocolInterfaces() failed.\n")); - } - - return Status; + return RegisterNonDiscoverableDevice ( + USB_EHCI_HCCAPBASE, + NonDiscoverableDeviceTypeEhci, + NonDiscoverableDeviceDmaTypeNonCoherent, + ConfigureUSBHost, + NULL); } - diff --git a/Omap35xxPkg/PciEmulation/PciEmulation.h b/Omap35xxPkg/PciEmulation/PciEmulation.h deleted file mode 100644 index d5ee04318939..000000000000 --- a/Omap35xxPkg/PciEmulation/PciEmulation.h +++ /dev/null @@ -1,292 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef _PCI_ROOT_BRIDGE_H_ -#define _PCI_ROOT_BRIDGE_H_ - -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include - -#include - - - -#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL -#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL -#define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL - - -typedef struct { - ACPI_HID_DEVICE_PATH AcpiDevicePath; - EFI_DEVICE_PATH_PROTOCOL EndDevicePath; -} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH; - - -#define ACPI_CONFIG_IO 0 -#define ACPI_CONFIG_MMIO 1 -#define ACPI_CONFIG_BUS 2 - -typedef struct { - EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Desc[3]; - EFI_ACPI_END_TAG_DESCRIPTOR EndDesc; -} ACPI_CONFIG_INFO; - - -#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32 ('P', 'c', 'i', 'F') - -typedef struct { - UINT32 Signature; - EFI_HANDLE Handle; - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io; - EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath; - - UINT8 StartBus; - UINT8 EndBus; - UINT16 Type; - UINT32 MemoryStart; - UINT32 MemorySize; - UINTN IoOffset; - UINT32 IoStart; - UINT32 IoSize; - UINT64 PciAttributes; - - ACPI_CONFIG_INFO *Config; - -} PCI_ROOT_BRIDGE; - - -#define INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) CR (a, PCI_ROOT_BRIDGE, Io, PCI_ROOT_BRIDGE_SIGNATURE) - - -typedef union { - UINT8 volatile *buf; - UINT8 volatile *ui8; - UINT16 volatile *ui16; - UINT32 volatile *ui32; - UINT64 volatile *ui64; - UINTN volatile ui; -} PTR; - - - -EFI_STATUS -EFIAPI -PciRootBridgeIoPollMem ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoPollIo ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoMemRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoMemWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoIoRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 UserAddress, - IN UINTN Count, - IN OUT VOID *UserBuffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoIoWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 UserAddress, - IN UINTN Count, - IN OUT VOID *UserBuffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoCopyMem ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 DestAddress, - IN UINT64 SrcAddress, - IN UINTN Count - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoPciRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoPciWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoMap ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation, - IN VOID *HostAddress, - IN OUT UINTN *NumberOfBytes, - OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, - OUT VOID **Mapping - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoUnmap ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN VOID *Mapping - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoAllocateBuffer ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_ALLOCATE_TYPE Type, - IN EFI_MEMORY_TYPE MemoryType, - IN UINTN Pages, - OUT VOID **HostAddress, - IN UINT64 Attributes - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoFreeBuffer ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN UINTN Pages, - OUT VOID *HostAddress - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoFlush ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoGetAttributes ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - OUT UINT64 *Supported, - OUT UINT64 *Attributes - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoSetAttributes ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN UINT64 Attributes, - IN OUT UINT64 *ResourceBase, - IN OUT UINT64 *ResourceLength - ); - -EFI_STATUS -EFIAPI -PciRootBridgeIoConfiguration ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - OUT VOID **Resources - ); - -// -// Private Function Prototypes -// -EFI_STATUS -EFIAPI -PciRootBridgeIoMemRW ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINTN Count, - IN BOOLEAN InStrideFlag, - IN PTR In, - IN BOOLEAN OutStrideFlag, - OUT PTR Out - ); - -BOOLEAN -PciIoMemAddressValid ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINT64 Address - ); - -EFI_STATUS -EmulatePciIoForEhci ( - INTN MvPciIfMaxIf - ); - -#endif - diff --git a/Omap35xxPkg/PciEmulation/PciEmulation.inf b/Omap35xxPkg/PciEmulation/PciEmulation.inf index 2180bb49898d..4df9c505e8cd 100644 --- a/Omap35xxPkg/PciEmulation/PciEmulation.inf +++ b/Omap35xxPkg/PciEmulation/PciEmulation.inf @@ -22,33 +22,23 @@ [Defines] ENTRY_POINT = PciEmulationEntryPoint [Sources.common] - PciRootBridgeIo.c PciEmulation.c [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec - IntelFrameworkPkg/IntelFrameworkPkg.dec - ArmPkg/ArmPkg.dec EmbeddedPkg/EmbeddedPkg.dec Omap35xxPkg/Omap35xxPkg.dec [LibraryClasses] BaseLib - DxeServicesTableLib - UefiLib + DebugLib + IoLib + NonDiscoverableDeviceRegistrationLib UefiBootServicesTableLib UefiDriverEntryPoint - UefiRuntimeServicesTableLib - IoLib - OmapDmaLib - DmaLib [Protocols] - gEfiPciRootBridgeIoProtocolGuid - gEfiDevicePathProtocolGuid - gEfiPciHostBridgeResourceAllocationProtocolGuid - gEfiPciIoProtocolGuid gEmbeddedExternalDeviceProtocolGuid [Depex] diff --git a/Omap35xxPkg/PciEmulation/PciRootBridgeIo.c b/Omap35xxPkg/PciEmulation/PciRootBridgeIo.c deleted file mode 100644 index e8635ed88d91..000000000000 --- a/Omap35xxPkg/PciEmulation/PciRootBridgeIo.c +++ /dev/null @@ -1,306 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "PciEmulation.h" - -BOOLEAN -PciRootBridgeMemAddressValid ( - IN PCI_ROOT_BRIDGE *Private, - IN UINT64 Address - ) -{ - if ((Address >= Private->MemoryStart) && (Address < (Private->MemoryStart + Private->MemorySize))) { - return TRUE; - } - - return FALSE; -} - - -EFI_STATUS -PciRootBridgeIoMemRW ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINTN Count, - IN BOOLEAN InStrideFlag, - IN PTR In, - IN BOOLEAN OutStrideFlag, - OUT PTR Out - ) -{ - UINTN Stride; - UINTN InStride; - UINTN OutStride; - - - Width = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03); - Stride = (UINTN)1 << Width; - InStride = InStrideFlag ? Stride : 0; - OutStride = OutStrideFlag ? Stride : 0; - - // - // Loop for each iteration and move the data - // - switch (Width) { - case EfiPciWidthUint8: - for (;Count > 0; Count--, In.buf += InStride, Out.buf += OutStride) { - *In.ui8 = *Out.ui8; - } - break; - case EfiPciWidthUint16: - for (;Count > 0; Count--, In.buf += InStride, Out.buf += OutStride) { - *In.ui16 = *Out.ui16; - } - break; - case EfiPciWidthUint32: - for (;Count > 0; Count--, In.buf += InStride, Out.buf += OutStride) { - *In.ui32 = *Out.ui32; - } - break; - default: - return EFI_INVALID_PARAMETER; - } - - return EFI_SUCCESS; -} - -EFI_STATUS -PciRootBridgeIoPciRW ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN BOOLEAN Write, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 UserAddress, - IN UINTN Count, - IN OUT VOID *UserBuffer - ) -{ - return EFI_SUCCESS; -} - -/** - Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. - - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. - @param Width Signifies the width of the memory operations. - @param Address The base address of the memory operations. - @param Count The number of memory operations to perform. - @param Buffer For read operations, the destination buffer to store the results. For write - operations, the source buffer to write data from. - - @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. - -**/ -EFI_STATUS -EFIAPI -PciRootBridgeIoMemRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - PCI_ROOT_BRIDGE *Private; - UINTN AlignMask; - PTR In; - PTR Out; - - if ( Buffer == NULL ) { - return EFI_INVALID_PARAMETER; - } - - Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This); - - if (!PciRootBridgeMemAddressValid (Private, Address)) { - return EFI_INVALID_PARAMETER; - } - - AlignMask = (1 << (Width & 0x03)) - 1; - if (Address & AlignMask) { - return EFI_INVALID_PARAMETER; - } - - In.buf = Buffer; - Out.buf = (VOID *)(UINTN) Address; - - switch (Width) { - case EfiPciWidthUint8: - case EfiPciWidthUint16: - case EfiPciWidthUint32: - case EfiPciWidthUint64: - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out); - - case EfiPciWidthFifoUint8: - case EfiPciWidthFifoUint16: - case EfiPciWidthFifoUint32: - case EfiPciWidthFifoUint64: - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out); - - case EfiPciWidthFillUint8: - case EfiPciWidthFillUint16: - case EfiPciWidthFillUint32: - case EfiPciWidthFillUint64: - return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out); - - default: - break; - } - - return EFI_INVALID_PARAMETER; -} - - - -/** - Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. - - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. - @param Width Signifies the width of the memory operations. - @param Address The base address of the memory operations. - @param Count The number of memory operations to perform. - @param Buffer For read operations, the destination buffer to store the results. For write - operations, the source buffer to write data from. - - @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. - -**/ -EFI_STATUS -EFIAPI -PciRootBridgeIoMemWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - PCI_ROOT_BRIDGE *Private; - UINTN AlignMask; - PTR In; - PTR Out; - - if ( Buffer == NULL ) { - return EFI_INVALID_PARAMETER; - } - - Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This); - - if (!PciRootBridgeMemAddressValid (Private, Address)) { - return EFI_INVALID_PARAMETER; - } - - AlignMask = (1 << (Width & 0x03)) - 1; - if (Address & AlignMask) { - return EFI_INVALID_PARAMETER; - } - - In.buf = (VOID *)(UINTN) Address; - Out.buf = Buffer; - - switch (Width) { - case EfiPciWidthUint8: - case EfiPciWidthUint16: - case EfiPciWidthUint32: - case EfiPciWidthUint64: - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out); - - case EfiPciWidthFifoUint8: - case EfiPciWidthFifoUint16: - case EfiPciWidthFifoUint32: - case EfiPciWidthFifoUint64: - return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out); - - case EfiPciWidthFillUint8: - case EfiPciWidthFillUint16: - case EfiPciWidthFillUint32: - case EfiPciWidthFillUint64: - return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out); - - default: - break; - } - - return EFI_INVALID_PARAMETER; -} - -/** - Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. - - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. - @param Width Signifies the width of the memory operations. - @param Address The base address of the memory operations. - @param Count The number of memory operations to perform. - @param Buffer For read operations, the destination buffer to store the results. For write - operations, the source buffer to write data from. - - @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. - -**/ -EFI_STATUS -EFIAPI -PciRootBridgeIoPciRead ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - if (Buffer == NULL) { - return EFI_INVALID_PARAMETER; - } - - return PciRootBridgeIoPciRW (This, FALSE, Width, Address, Count, Buffer); -} - - - -/** - Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. - - @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. - @param Width Signifies the width of the memory operations. - @param Address The base address of the memory operations. - @param Count The number of memory operations to perform. - @param Buffer For read operations, the destination buffer to store the results. For write - operations, the source buffer to write data from. - - @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. - @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. - @retval EFI_INVALID_PARAMETER One or more parameters are invalid. - -**/ -EFI_STATUS -EFIAPI -PciRootBridgeIoPciWrite ( - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, - IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - if (Buffer == NULL) { - return EFI_INVALID_PARAMETER; - } - - return PciRootBridgeIoPciRW (This, TRUE, Width, Address, Count, Buffer); -} - - -- 2.7.4