From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F17C081D72 for ; Fri, 4 Nov 2016 02:31:07 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP; 04 Nov 2016 02:31:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,442,1473145200"; d="scan'208";a="1080529709" Received: from jyao1-mobl.ccr.corp.intel.com ([10.254.208.133]) by fmsmga002.fm.intel.com with ESMTP; 04 Nov 2016 02:31:08 -0700 From: Jiewen Yao To: edk2-devel@lists.01.org Cc: Jeff Fan , Feng Tian , Star Zeng , Michael D Kinney , Laszlo Ersek Date: Fri, 4 Nov 2016 17:30:52 +0800 Message-Id: <1478251854-14660-5-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1478251854-14660-1-git-send-email-jiewen.yao@intel.com> References: <1478251854-14660-1-git-send-email-jiewen.yao@intel.com> Subject: [PATCH V2 4/6] UefiCpuPkg/dec: Add PcdCpuSmmStaticPageTable. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 Nov 2016 09:31:08 -0000 If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory. The page table size depend on 2 things: 1) The 1G paging capability. 2) The whole system memory/MMIO addressing capability. A) If the system only supports 2M paging, When the whole memory/MMIO is 32bit, we only need 1+1+4=6 pages for 4G. When the whole memory/MMIO is 39bit, we need 1+1+256 pages (~ 1M) When the whole memory/MMIO is 48bit, we need 1+256+256*256 pages (~ 257M) B) If the system supports 1G paging. When the whole memory/MMIO is 32bit, we only need 1+1+4=6 pages for 4G. (We still generate 2M page for maintenance consideration.) When the whole memory/MMIO is 39bit, we still need 6 pages. (We setup 1G paging for >1G.) When the whole memory/MMIO is 48bit, we need 1+256 pages (~ 1M). Cc: Jeff Fan Cc: Feng Tian Cc: Star Zeng Cc: Michael D Kinney Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao --- UefiCpuPkg/UefiCpuPkg.dec | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 8674533..a110820 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -199,6 +199,14 @@ # @Prompt The specified AP target C-state for Mwait. gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007 + ## Indicates if SMM uses static page table. + # If enabled, SMM will not use on-demand paging. SMM will build static page table for all memory.

+ # This flag only impacts X64 build, because SMM alway builds static page table for IA32. + # TRUE - SMM uses static page table for all memory.
+ # FALSE - SMM uses static page table for below 4G memory and use on-demand paging for above 4G memory.
+ # @Prompt Use static page table for all memory in SMM. + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210D + [PcdsDynamic, PcdsDynamicEx] ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA. # @Prompt The pointer to a CPU S3 data buffer. -- 2.7.4.windows.1