[PATCH v2 1/4] ArmPkg/ArmDmaLib: use DMA buffer alignment from CPU arch protocol

[Ard Biesheuvel <ard.biesheuvel@linaro.org>]

Instead of depending on ArmLib to retrieve the CWG directly, use
the DMA buffer alignment exposed by the CPU arch protocol. This
removes our dependency on ArmLib, which makes the library a bit
more architecture independent.

While we're in there, rename gCpu to mCpu to better reflect its
local scope, and reflow some lines that we're modifying anyway.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 ArmPkg/Library/ArmDmaLib/ArmDmaLib.c   | 18 ++++++++----------
 ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf |  2 --
 2 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c
index d48d6ff6dbbb..03fd9f3278e6 100644
--- a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c
+++ b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c
@@ -22,7 +22,6 @@
 #include <Library/UncachedMemoryAllocationLib.h>
 #include <Library/IoLib.h>
 #include <Library/BaseMemoryLib.h>
-#include <Library/ArmLib.h>
 
 #include <Protocol/Cpu.h>
 
@@ -36,8 +35,7 @@ typedef struct {
 
 
 
-EFI_CPU_ARCH_PROTOCOL      *gCpu;
-UINTN                      gCacheAlignment = 0;
+STATIC EFI_CPU_ARCH_PROTOCOL      *mCpu;
 
 /**
   Provides the DMA controller-specific addresses needed to access system memory.
@@ -92,8 +90,8 @@ DmaMap (
 
   *Mapping = Map;
 
-  if ((((UINTN)HostAddress & (gCacheAlignment - 1)) != 0) ||
-      ((*NumberOfBytes & (gCacheAlignment - 1)) != 0)) {
+  if ((((UINTN)HostAddress & (mCpu->DmaBufferAlignment - 1)) != 0) ||
+      ((*NumberOfBytes & (mCpu->DmaBufferAlignment - 1)) != 0)) {
 
     // Get the cacheability of the region
     Status = gDS->GetMemorySpaceDescriptor (*DeviceAddress, &GcdDescriptor);
@@ -154,7 +152,8 @@ DmaMap (
     DEBUG_CODE_END ();
 
     // Flush the Data Cache (should not have any effect if the memory region is uncached)
-    gCpu->FlushDataCache (gCpu, *DeviceAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
+    mCpu->FlushDataCache (mCpu, *DeviceAddress, *NumberOfBytes,
+            EfiCpuFlushTypeWriteBackInvalidate);
   }
 
   Map->HostAddress   = (UINTN)HostAddress;
@@ -211,7 +210,8 @@ DmaUnmap (
       //
       // Make sure we read buffer from uncached memory and not the cache
       //
-      gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
+      mCpu->FlushDataCache (mCpu, Map->HostAddress, Map->NumberOfBytes,
+              EfiCpuFlushTypeInvalidate);
     }
   }
 
@@ -311,11 +311,9 @@ ArmDmaLibConstructor (
   EFI_STATUS              Status;
 
   // Get the Cpu protocol for later use
-  Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
+  Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu);
   ASSERT_EFI_ERROR(Status);
 
-  gCacheAlignment = ArmCacheWritebackGranule ();
-
   return Status;
 }
 
diff --git a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
index 95c13006eaac..31de3cfd828c 100644
--- a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
+++ b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
@@ -37,8 +37,6 @@ [LibraryClasses]
   UncachedMemoryAllocationLib
   IoLib
   BaseMemoryLib
-  ArmLib
-
 
 [Protocols]
   gEfiCpuArchProtocolGuid
-- 
2.7.4