From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x229.google.com (mail-wm0-x229.google.com [IPv6:2a00:1450:400c:c09::229]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6879081F0C for ; Sat, 12 Nov 2016 05:02:29 -0800 (PST) Received: by mail-wm0-x229.google.com with SMTP id a197so23476612wmd.0 for ; Sat, 12 Nov 2016 05:02:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WOLeJWs0ndwuWnd4rqXVQ7Rgny+WYx/5+0sXp40sIw4=; b=e0ZPzPkO1OhUGJtEbOtziuE7EfwvBNC5OWRTNK8zQhgSUx7dEtuJ5Afq6XoTLzTYv4 XXhm5pZD1EtfCkaibSeJPFVu63QEXztGg1yza1rvRaUdOROMCHUJwl1wJ/REiQNcs6nZ uloBItappiRLrHz37MA/dnrWMjHdD3kxAaPuw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WOLeJWs0ndwuWnd4rqXVQ7Rgny+WYx/5+0sXp40sIw4=; b=Na7FE37D3t7LyuAcwmepC8SJH4qaX1A+YCgfVv7pHAH38a8jUNMufocOVFDlpjPzE1 sYhlRYNp38Ztei3LFyexxmw0ZKBXDFHWXMJrbpwHlM1hIRrobBtqBgPz5xp3PrGuj5Bt R29Wxk19y5FHwPF3Xu+JK/1d6bbzHfZBhca7Rlng0+8XzI129eBb0yX6YsfPiw9ox/LA AynSk2J1vX3jfXXkVcMJHc+6ig4WsdJZ6/I2tP7hmLsi/aSiwMoJjMsrYFFZv7XmT9S4 Y+9J+CIOjnC03hioSkd7a0h37LP6Fiy6Clqeeu/zt08mDnmdOHRWMgW8iNO6ldPzGCH0 2I2w== X-Gm-Message-State: ABUngvewkD/8vg2yaCEtTtf2/nkhgIPgpK1nsLGhEvq3a1DldhmqUQraFWwXHsvL5Vi+1cIn X-Received: by 10.194.222.202 with SMTP id qo10mr12760497wjc.115.1478955752110; Sat, 12 Nov 2016 05:02:32 -0800 (PST) Received: from ards-macbook-pro.access.network ([193.57.185.11]) by smtp.gmail.com with ESMTPSA id e188sm6084212wma.21.2016.11.12.05.02.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 12 Nov 2016 05:02:31 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Cc: Ard Biesheuvel Date: Sat, 12 Nov 2016 14:02:25 +0100 Message-Id: <1478955748-14819-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1478955748-14819-1-git-send-email-ard.biesheuvel@linaro.org> References: <1478955748-14819-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [PATCH v2 1/4] ArmPkg/ArmDmaLib: use DMA buffer alignment from CPU arch protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 12 Nov 2016 13:02:29 -0000 Instead of depending on ArmLib to retrieve the CWG directly, use the DMA buffer alignment exposed by the CPU arch protocol. This removes our dependency on ArmLib, which makes the library a bit more architecture independent. While we're in there, rename gCpu to mCpu to better reflect its local scope, and reflow some lines that we're modifying anyway. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/ArmDmaLib/ArmDmaLib.c | 18 ++++++++---------- ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf | 2 -- 2 files changed, 8 insertions(+), 12 deletions(-) diff --git a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c index d48d6ff6dbbb..03fd9f3278e6 100644 --- a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c +++ b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c @@ -22,7 +22,6 @@ #include #include #include -#include #include @@ -36,8 +35,7 @@ typedef struct { -EFI_CPU_ARCH_PROTOCOL *gCpu; -UINTN gCacheAlignment = 0; +STATIC EFI_CPU_ARCH_PROTOCOL *mCpu; /** Provides the DMA controller-specific addresses needed to access system memory. @@ -92,8 +90,8 @@ DmaMap ( *Mapping = Map; - if ((((UINTN)HostAddress & (gCacheAlignment - 1)) != 0) || - ((*NumberOfBytes & (gCacheAlignment - 1)) != 0)) { + if ((((UINTN)HostAddress & (mCpu->DmaBufferAlignment - 1)) != 0) || + ((*NumberOfBytes & (mCpu->DmaBufferAlignment - 1)) != 0)) { // Get the cacheability of the region Status = gDS->GetMemorySpaceDescriptor (*DeviceAddress, &GcdDescriptor); @@ -154,7 +152,8 @@ DmaMap ( DEBUG_CODE_END (); // Flush the Data Cache (should not have any effect if the memory region is uncached) - gCpu->FlushDataCache (gCpu, *DeviceAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate); + mCpu->FlushDataCache (mCpu, *DeviceAddress, *NumberOfBytes, + EfiCpuFlushTypeWriteBackInvalidate); } Map->HostAddress = (UINTN)HostAddress; @@ -211,7 +210,8 @@ DmaUnmap ( // // Make sure we read buffer from uncached memory and not the cache // - gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate); + mCpu->FlushDataCache (mCpu, Map->HostAddress, Map->NumberOfBytes, + EfiCpuFlushTypeInvalidate); } } @@ -311,11 +311,9 @@ ArmDmaLibConstructor ( EFI_STATUS Status; // Get the Cpu protocol for later use - Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu); + Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mCpu); ASSERT_EFI_ERROR(Status); - gCacheAlignment = ArmCacheWritebackGranule (); - return Status; } diff --git a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf index 95c13006eaac..31de3cfd828c 100644 --- a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf +++ b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf @@ -37,8 +37,6 @@ [LibraryClasses] UncachedMemoryAllocationLib IoLib BaseMemoryLib - ArmLib - [Protocols] gEfiCpuArchProtocolGuid -- 2.7.4