From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4FA64820FB for ; Sun, 11 Dec 2016 17:26:57 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP; 11 Dec 2016 17:26:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,334,1477983600"; d="scan'208";a="1080537267" Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.34]) by fmsmga001.fm.intel.com with ESMTP; 11 Dec 2016 17:26:55 -0800 From: Hao Wu To: edk2-devel@lists.01.org Cc: Hao Wu , Ard Biesheuvel , Ruiyu Ni Date: Mon, 12 Dec 2016 09:26:54 +0800 Message-Id: <1481506014-32772-1-git-send-email-hao.a.wu@intel.com> X-Mailer: git-send-email 1.9.5.msysgit.0 Subject: [PATCH] MdeModulePkg/NonDiscoverablePciDev: Fix type mismatch in switch/case X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 12 Dec 2016 01:26:57 -0000 Fix switch/case statement type mismatch in functions PciIoMemRead & PciIoMemWrite. Parameter 'Width' is of enum type EFI_PCI_IO_PROTOCOL_WIDTH, but the enum type provided in 'switch (Width)' block is of type EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH. Cc: Ard Biesheuvel Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu --- .../NonDiscoverablePciDeviceIo.c | 48 +++++++++++----------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c index 56482e3..82ee9d1 100644 --- a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c +++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c @@ -189,22 +189,22 @@ PciIoMemRead ( } switch (Width) { - case EfiPciWidthUint8: - case EfiPciWidthUint16: - case EfiPciWidthUint32: - case EfiPciWidthUint64: + case EfiPciIoWidthUint8: + case EfiPciIoWidthUint16: + case EfiPciIoWidthUint32: + case EfiPciIoWidthUint64: return PciIoMemRW (Width, Count, 1, Buffer, 1, Address); - case EfiPciWidthFifoUint8: - case EfiPciWidthFifoUint16: - case EfiPciWidthFifoUint32: - case EfiPciWidthFifoUint64: + case EfiPciIoWidthFifoUint8: + case EfiPciIoWidthFifoUint16: + case EfiPciIoWidthFifoUint32: + case EfiPciIoWidthFifoUint64: return PciIoMemRW (Width, Count, 1, Buffer, 0, Address); - case EfiPciWidthFillUint8: - case EfiPciWidthFillUint16: - case EfiPciWidthFillUint32: - case EfiPciWidthFillUint64: + case EfiPciIoWidthFillUint8: + case EfiPciIoWidthFillUint16: + case EfiPciIoWidthFillUint32: + case EfiPciIoWidthFillUint64: return PciIoMemRW (Width, Count, 0, Buffer, 1, Address); default: @@ -256,22 +256,22 @@ PciIoMemWrite ( } switch (Width) { - case EfiPciWidthUint8: - case EfiPciWidthUint16: - case EfiPciWidthUint32: - case EfiPciWidthUint64: + case EfiPciIoWidthUint8: + case EfiPciIoWidthUint16: + case EfiPciIoWidthUint32: + case EfiPciIoWidthUint64: return PciIoMemRW (Width, Count, 1, Address, 1, Buffer); - case EfiPciWidthFifoUint8: - case EfiPciWidthFifoUint16: - case EfiPciWidthFifoUint32: - case EfiPciWidthFifoUint64: + case EfiPciIoWidthFifoUint8: + case EfiPciIoWidthFifoUint16: + case EfiPciIoWidthFifoUint32: + case EfiPciIoWidthFifoUint64: return PciIoMemRW (Width, Count, 0, Address, 1, Buffer); - case EfiPciWidthFillUint8: - case EfiPciWidthFillUint16: - case EfiPciWidthFillUint32: - case EfiPciWidthFillUint64: + case EfiPciIoWidthFillUint8: + case EfiPciIoWidthFillUint16: + case EfiPciIoWidthFillUint32: + case EfiPciIoWidthFillUint64: return PciIoMemRW (Width, Count, 1, Address, 0, Buffer); default: -- 1.9.5.msysgit.0