From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9C63C81A33 for ; Wed, 14 Dec 2016 00:33:26 -0800 (PST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP; 14 Dec 2016 00:33:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,346,1477983600"; d="scan'208";a="1081627580" Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.34]) by fmsmga001.fm.intel.com with ESMTP; 14 Dec 2016 00:33:24 -0800 From: Hao Wu To: edk2-devel@lists.01.org Cc: Hao Wu , Michael Kinney , Jeff Fan Date: Wed, 14 Dec 2016 16:33:16 +0800 Message-Id: <1481704400-12044-1-git-send-email-hao.a.wu@intel.com> X-Mailer: git-send-email 1.9.5.msysgit.0 Subject: [PATCH 0/4] Update CPUID & MSR header files with SDM (Sep.2016) X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 Dec 2016 08:33:26 -0000 https://bugzilla.tianocore.org/show_bug.cgi?id=176 According to the latest version (Sep.'16) of Intel(R) 64 and IA-32 Architectures Software Developer's Manual (SDM), this patch series will update the MSR and CPUID related definitions in .h files under UefiCpuPkg/Include/Register. Cc: Michael Kinney Cc: Jeff Fan Hao Wu (4): UefiCpuPkg/Include: Update MSR header files with SDM (Sep.2016) UefiCpuPkg/Include: Update Skylake MSR header file with SDM (Sep.2016) UefiCpuPkg/Include: Add Goldmont MSR header file with SDM (Sep.2016) UefiCpuPkg/Cpuid.h: Update CPUID definitions with SDM (Sep.2016) UefiCpuPkg/Application/Cpuid/Cpuid.c | 115 +- UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 159 +- UefiCpuPkg/Include/Register/Cpuid.h | 363 +++- UefiCpuPkg/Include/Register/Msr.h | 3 +- UefiCpuPkg/Include/Register/Msr/AtomMsr.h | 167 +- UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h | 43 +- UefiCpuPkg/Include/Register/Msr/Core2Msr.h | 286 +-- UefiCpuPkg/Include/Register/Msr/CoreMsr.h | 64 +- UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h | 2515 ++++++++++++++++++++++ UefiCpuPkg/Include/Register/Msr/HaswellEMsr.h | 451 ++-- UefiCpuPkg/Include/Register/Msr/HaswellMsr.h | 62 +- UefiCpuPkg/Include/Register/Msr/IvyBridgeMsr.h | 416 ++-- UefiCpuPkg/Include/Register/Msr/NehalemMsr.h | 340 +-- UefiCpuPkg/Include/Register/Msr/P6Msr.h | 6 +- UefiCpuPkg/Include/Register/Msr/Pentium4Msr.h | 146 +- UefiCpuPkg/Include/Register/Msr/PentiumMMsr.h | 26 +- UefiCpuPkg/Include/Register/Msr/PentiumMsr.h | 8 +- UefiCpuPkg/Include/Register/Msr/SandyBridgeMsr.h | 537 ++--- UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h | 411 ++-- UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h | 1189 +++++++++- UefiCpuPkg/Include/Register/Msr/Xeon5600Msr.h | 2 +- UefiCpuPkg/Include/Register/Msr/XeonDMsr.h | 456 +--- UefiCpuPkg/Include/Register/Msr/XeonE7Msr.h | 74 +- UefiCpuPkg/Include/Register/Msr/XeonPhiMsr.h | 314 +-- 24 files changed, 5323 insertions(+), 2830 deletions(-) create mode 100644 UefiCpuPkg/Include/Register/Msr/GoldmontMsr.h -- 1.9.5.msysgit.0