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From: Hao Wu <hao.a.wu@intel.com>
To: edk2-devel@lists.01.org
Cc: Hao Wu <hao.a.wu@intel.com>, Jeff Fan <jeff.fan@intel.com>,
	Michael Kinney <michael.d.kinney@intel.com>
Subject: [PATCH] UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters
Date: Tue, 20 Dec 2016 09:47:57 +0800	[thread overview]
Message-ID: <1482198477-13620-1-git-send-email-hao.a.wu@intel.com> (raw)

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Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
index 633e54d..4f9c103 100644
--- a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
+++ b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
@@ -4014,7 +4014,7 @@ typedef union {
     /// [Bit 14] If read as 1, Intel(R) Processor Trace (Intel PT) can be used
     /// in VMX operation. If the processor supports Intel PT but does not allow
     /// it to be used in VMX operation, execution of VMXON clears
-    /// IA32_RTIT_CTL.TraceEn (see “VMXON—Enter VMX Operation” in Chapter 30);
+    /// IA32_RTIT_CTL.TraceEn (see "VMXON-Enter VMX Operation" in Chapter 30);
     /// any attempt to set that bit while in VMX operation (including VMX root
     /// operation) using the WRMSR instruction causes a general-protection
     /// exception.
-- 
1.9.5.msysgit.0



             reply	other threads:[~2016-12-20  1:48 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-20  1:47 Hao Wu [this message]
2016-12-20  1:48 ` [PATCH] UefiCpuPkg/ArchitecturalMsr.h: Remove non-Ascii characters Fan, Jeff
2016-12-20  1:51 ` Kinney, Michael D

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