From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web10.8456.1672987912420469812 for ; Thu, 05 Jan 2023 22:51:52 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=i09ZbRqB; spf=pass (domain: redhat.com, ip: 170.10.129.124, mailfrom: lersek@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1672987911; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rwmha1U04IzgAaigY2JmA3IICEzug9/BX11w+TBf3p0=; b=i09ZbRqBBv9wE9Z2DWuWPpuWIl7vgnjqOBqq2Xy6ZR7GW8IAhq3iV742rfGHDJAi25Fbzt p6imas6w8p81j1qVH2xcElh2bOxiXhqtVwkruzV9p6wuQToyHOdMQDmM03dE/p+T9ChN1A V1F+BqW0jcynX0wBqZ7K7JTlzCKf1OQ= Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-597-hHWS4xGfNneX-aciIflMXw-1; Fri, 06 Jan 2023 01:51:47 -0500 X-MC-Unique: hHWS4xGfNneX-aciIflMXw-1 Received: from smtp.corp.redhat.com (int-mx10.intmail.prod.int.rdu2.redhat.com [10.11.54.10]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 719B438060FF; Fri, 6 Jan 2023 06:51:47 +0000 (UTC) Received: from [10.39.192.26] (unknown [10.39.192.26]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C1F45402807; Fri, 6 Jan 2023 06:51:46 +0000 (UTC) Message-ID: <148286f5-3035-d77d-4834-ac8ece786191@redhat.com> Date: Fri, 6 Jan 2023 07:51:45 +0100 MIME-Version: 1.0 Subject: Re: [edk2-devel] [PATCH] ArmVirtPkg/ArmVirtQemu: Avoid early ID map on ThunderX To: devel@edk2.groups.io, dann.frazier@canonical.com, Ard Biesheuvel References: <20230104172255.1211768-1-ardb@kernel.org> From: "Laszlo Ersek" In-Reply-To: X-Scanned-By: MIMEDefang 3.1 on 10.11.54.10 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 1/5/23 19:25, dann frazier wrote: > On Thu, Jan 05, 2023 at 12:46:19PM +0100, Ard Biesheuvel wrote: >> On Wed, 4 Jan 2023 at 18:23, Ard Biesheuvel wrote: >>> >>> The early ID map used by ArmVirtQemu uses ASID scoped non-global >>> mappings, as this allows us to switch to the permanent ID map seamlessly >>> without the need for explicit TLB maintenance. >>> >>> However, this triggers a known erratum on ThunderX, which does not >>> tolerate non-global mappings that are executable at EL1, as this appears >>> to result in I-cache corruption. (Linux disables the KPTI based Meltdown >>> mitigation on ThunderX for the same reason) >>> >>> So work around this, by detecting the CPU implementor and part number, >>> and proceeding without the early ID map if a ThunderX CPU is detected. >>> >>> Note that this requires the C code to be built with strict alignment >>> again, as we may end up executing it with the MMU and caches off. >>> >>> Signed-off-by: Ard Biesheuvel >>> --- >>> ArmVirtPkg/ArmVirtQemu.dsc | 6 ++++++ >>> ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S | 18 ++++++++++++++++++ >>> 2 files changed, 24 insertions(+) >>> >>> diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc >>> index f77443229e8e..340b36f69c2c 100644 >>> --- a/ArmVirtPkg/ArmVirtQemu.dsc >>> +++ b/ArmVirtPkg/ArmVirtQemu.dsc >>> @@ -31,6 +31,7 @@ [Defines] >>> DEFINE SECURE_BOOT_ENABLE = FALSE >>> DEFINE TPM2_ENABLE = FALSE >>> DEFINE TPM2_CONFIG_ENABLE = FALSE >>> + DEFINE CAVIUM_ERRATUM_27456 = FALSE >>> >>> # >>> # Network definition >>> @@ -117,7 +118,12 @@ [LibraryClasses.common.UEFI_DRIVER] >>> UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf >>> >>> [BuildOptions] >>> +!if $(CAVIUM_ERRATUM_27456) == TRUE >>> + GCC:*_*_AARCH64_CC_XIPFLAGS = -mno-strict-align >> >> This is wrong - this should be '-mstrict-align' > > Ah, I wondered :) With that adjustment, the patch works for me on a > Cavium ThunderX. Thanks Ard! > With the typo fixed: Acked-by: Laszlo Ersek > -dann > >>> + GCC:*_*_AARCH64_PP_FLAGS = -DCAVIUM_ERRATUM_27456 >>> +!else >>> GCC:*_*_AARCH64_CC_XIPFLAGS == >>> +!endif >>> >>> !include NetworkPkg/NetworkBuildOptions.dsc.inc >>> >>> diff --git a/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S b/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S >>> index 05ccc7f9f043..962f1ba3a4d7 100644 >>> --- a/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S >>> +++ b/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S >>> @@ -44,8 +44,26 @@ >>> >>> >>> ASM_FUNC(ArmPlatformPeiBootAction) >>> +#ifdef CAVIUM_ERRATUM_27456 >>> + /* >>> + * On Cavium ThunderX, using non-global mappings that are executable at EL1 >>> + * results in I-cache corruption. So just avoid the early ID mapping there. >>> + * >>> + * MIDR implementor 0x43 >>> + * MIDR part numbers 0xA1 0xA2 >>> + */ >>> + mrs x0, midr_el1 // read the MIDR into X0 >>> + ubfx x1, x0, #6, #10 // grab part number bits [11:2] >>> + ubfx x0, x0, #24, #8 // grab implementor id >>> + mov x2, #0xA0 >> 2 >>> + cmp x0, #0x43 // compare implementor id >>> + ccmp x1, x2, #0, eq // compare part# bits [11:2] >>> + b.eq .Lreturn >>> +#endif >>> + >>> mrs x0, CurrentEL // check current exception level >>> tbz x0, #3, 0f // bail if above EL1 >>> +.Lreturn: >>> ret >>> >>> 0:mov_i x0, mairval >>> > > > > >