[PATCH v3 1/4] MdePkg: Add BaseIoFifoLib library

[Leo Duran <leo.duran@amd.com>]

From: Brijesh Singh <brijesh.singh@amd.com>

The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate
implementations of I/O Fifo routines. The patch moves the I/O Fifo
routines into a common BaseIofifoLib library supporting IA32 and X64
architectures under MdePkg.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran  <leo.duran@amd.com>
---
 MdePkg/Include/Library/IoFifoLib.h             | 176 +++++++++++++++++++++++++
 MdePkg/Library/BaseIoFifoLib/BaseIoFifoLib.inf |  44 +++++++
 MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.asm   | 140 ++++++++++++++++++++
 MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.nasm  | 136 +++++++++++++++++++
 MdePkg/Library/BaseIoFifoLib/X64/IoFifo.asm    | 126 ++++++++++++++++++
 MdePkg/Library/BaseIoFifoLib/X64/IoFifo.nasm   | 125 ++++++++++++++++++
 MdePkg/MdePkg.dec                              |   4 +
 MdePkg/MdePkg.dsc                              |   2 +
 8 files changed, 753 insertions(+)
 create mode 100644 MdePkg/Include/Library/IoFifoLib.h
 create mode 100644 MdePkg/Library/BaseIoFifoLib/BaseIoFifoLib.inf
 create mode 100644 MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.asm
 create mode 100644 MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.nasm
 create mode 100644 MdePkg/Library/BaseIoFifoLib/X64/IoFifo.asm
 create mode 100644 MdePkg/Library/BaseIoFifoLib/X64/IoFifo.nasm

diff --git a/MdePkg/Include/Library/IoFifoLib.h b/MdePkg/Include/Library/IoFifoLib.h
new file mode 100644
index 0000000..f606a41
--- /dev/null
+++ b/MdePkg/Include/Library/IoFifoLib.h
@@ -0,0 +1,176 @@
+/** @file
+  I/O FIFO routines
+
+  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
+
+  This program and the accompanying materials are licensed and made available
+  under the terms and conditions of the BSD License which accompanies this
+  distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __IO_FIFO_LIB_H__
+#define __IO_FIFO_LIB_H__
+
+/**
+  Reads an 8-bit I/O port fifo into a block of memory.
+
+  Reads the 8-bit I/O fifo port specified by Port.
+
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  );
+
+/**
+  Reads a 16-bit I/O port fifo into a block of memory.
+
+  Reads the 16-bit I/O fifo port specified by Port.
+
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  );
+
+/**
+  Reads a 32-bit I/O port fifo into a block of memory.
+
+  Reads the 32-bit I/O fifo port specified by Port.
+
+  The port is read Count times, and the read data is
+  stored in the provided Buffer.
+
+  This function must guarantee that all I/O read and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to read.
+  @param  Count   The number of times to read I/O port.
+  @param  Buffer  The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  );
+
+/**
+  Writes a block of memory into an 8-bit I/O port fifo.
+
+  Writes the 8-bit I/O fifo port specified by Port.
+
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 8-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  );
+
+/**
+  Writes a block of memory into a 16-bit I/O port fifo.
+
+  Writes the 16-bit I/O fifo port specified by Port.
+
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 16-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  );
+
+/**
+  Writes a block of memory into a 32-bit I/O port fifo.
+
+  Writes the 32-bit I/O fifo port specified by Port.
+
+  The port is written Count times, and the write data is
+  retrieved from the provided Buffer.
+
+  This function must guarantee that all I/O write and write operations are
+  serialized.
+
+  If 32-bit I/O port operations are not supported, then ASSERT().
+
+  @param  Port    The I/O port to write.
+  @param  Count   The number of times to write I/O port.
+  @param  Buffer  The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+  IN      UINTN                     Port,
+  IN      UINTN                     Count,
+  OUT     VOID                      *Buffer
+  );
+
+#endif
diff --git a/MdePkg/Library/BaseIoFifoLib/BaseIoFifoLib.inf b/MdePkg/Library/BaseIoFifoLib/BaseIoFifoLib.inf
new file mode 100644
index 0000000..91ee89f
--- /dev/null
+++ b/MdePkg/Library/BaseIoFifoLib/BaseIoFifoLib.inf
@@ -0,0 +1,44 @@
+## @file
+#  Base I/O FiFo Library using REP string instructions.
+#
+#  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+#  Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
+#
+#  This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#  Derived from:
+#   UefiCpuPkg/CpuIo2Dxe
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = BaseIoFifoLib
+  FILE_GUID                      = 5591c2ef-cb95-4b56-a907-f057b1b96a3d
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = IoFifoLib
+
+#
+#  VALID_ARCHITECTURES           = IA32 X64
+#
+
+[Sources.IA32]
+  Ia32/IoFifo.nasm
+  Ia32/IoFifo.asm
+
+[Sources.X64]
+  X64/IoFifo.nasm
+  X64/IoFifo.asm
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
diff --git a/MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.asm b/MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.asm
new file mode 100644
index 0000000..96286c2
--- /dev/null
+++ b/MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.asm
@@ -0,0 +1,140 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+    .586P
+    .model  flat,C
+    .code
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo8 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+IoReadFifo8 PROC
+    push    edi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+rep insb
+    pop     edi
+    ret
+IoReadFifo8 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo16 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+IoReadFifo16 PROC
+    push    edi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+rep insw
+    pop     edi
+    ret
+IoReadFifo16 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo32 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+IoReadFifo32 PROC
+    push    edi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+rep insd
+    pop     edi
+    ret
+IoReadFifo32 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo8 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+IoWriteFifo8 PROC
+    push    esi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+rep outsb
+    pop     esi
+    ret
+IoWriteFifo8 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo16 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+IoWriteFifo16 PROC
+    push    esi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+rep outsw
+    pop     esi
+    ret
+IoWriteFifo16 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo32 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+IoWriteFifo32 PROC
+    push    esi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+rep outsd
+    pop     esi
+    ret
+IoWriteFifo32 ENDP
+
+    END
diff --git a/MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.nasm b/MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.nasm
new file mode 100644
index 0000000..f4210cb
--- /dev/null
+++ b/MdePkg/Library/BaseIoFifoLib/Ia32/IoFifo.nasm
@@ -0,0 +1,136 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+    SECTION .text
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo8 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+    push    edi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+rep insb
+    pop     edi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo16 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+    push    edi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+rep insw
+    pop     edi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo32 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+    push    edi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     edi, [esp + 16]
+rep insd
+    pop     edi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo8 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+    push    esi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+rep outsb
+    pop     esi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo16 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+    push    esi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+rep outsw
+    pop     esi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo32 (
+;    IN UINTN                  Port,
+;    IN UINTN                  Size,
+;    IN VOID                   *Buffer
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+    push    esi
+    cld
+    mov     dx, [esp + 8]
+    mov     ecx, [esp + 12]
+    mov     esi, [esp + 16]
+rep outsd
+    pop     esi
+    ret
diff --git a/MdePkg/Library/BaseIoFifoLib/X64/IoFifo.asm b/MdePkg/Library/BaseIoFifoLib/X64/IoFifo.asm
new file mode 100644
index 0000000..dfdaeea
--- /dev/null
+++ b/MdePkg/Library/BaseIoFifoLib/X64/IoFifo.asm
@@ -0,0 +1,126 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+    .code
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo8 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+IoReadFifo8 PROC
+    cld
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+rep insb
+    mov     rdi, r8             ; restore rdi
+    ret
+IoReadFifo8 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo16 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+IoReadFifo16 PROC
+    cld
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+rep insw
+    mov     rdi, r8             ; restore rdi
+    ret
+IoReadFifo16 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo32 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+IoReadFifo32 PROC
+    cld
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+rep insd
+    mov     rdi, r8             ; restore rdi
+    ret
+IoReadFifo32 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo8 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+IoWriteFifo8 PROC
+    cld
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+rep outsb
+    mov     rsi, r8             ; restore rsi
+    ret
+IoWriteFifo8 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo16 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+IoWriteFifo16 PROC
+    cld
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+rep outsw
+    mov     rsi, r8             ; restore rsi
+    ret
+IoWriteFifo16 ENDP
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo32 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+IoWriteFifo32 PROC
+    cld
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+rep outsd
+    mov     rsi, r8             ; restore rsi
+    ret
+IoWriteFifo32 ENDP
+
+    END
diff --git a/MdePkg/Library/BaseIoFifoLib/X64/IoFifo.nasm b/MdePkg/Library/BaseIoFifoLib/X64/IoFifo.nasm
new file mode 100644
index 0000000..40f90f9
--- /dev/null
+++ b/MdePkg/Library/BaseIoFifoLib/X64/IoFifo.nasm
@@ -0,0 +1,125 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+    DEFAULT REL
+    SECTION .text
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo8 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+    cld
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+rep insb
+    mov     rdi, r8             ; restore rdi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo16 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+    cld
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+rep insw
+    mov     rdi, r8             ; restore rdi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoReadFifo32 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+    cld
+    xchg    rcx, rdx
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi
+rep insd
+    mov     rdi, r8             ; restore rdi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo8 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+    cld
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+rep outsb
+    mov     rsi, r8             ; restore rsi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo16 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+    cld
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+rep outsw
+    mov     rsi, r8             ; restore rsi
+    ret
+
+;------------------------------------------------------------------------------
+;  VOID
+;  EFIAPI
+;  IoWriteFifo32 (
+;    IN UINTN                  Port,              // rcx
+;    IN UINTN                  Size,              // rdx
+;    IN VOID                   *Buffer            // r8
+;    );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+    cld
+    xchg    rcx, rdx
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi
+rep outsd
+    mov     rsi, r8             ; restore rsi
+    ret
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index f2bdb30..4475d4d 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -7,6 +7,7 @@
 # Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>
 # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
 # (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+# Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
 #
 # This program and the accompanying materials are licensed and made available under
 # the terms and conditions of the BSD License which accompanies this distribution.
@@ -254,6 +255,9 @@ [LibraryClasses.IA32, LibraryClasses.X64]
   #
   RngLib|Include/Library/RngLib.h
 
+  ##  @libraryclass  Provide services to access I/O Fifo Ports
+  IoFifoLib|Include/Library/IoFifoLib.h
+
 [LibraryClasses.IPF]
   ##  @libraryclass  The SAL Library provides a service to make a SAL CALL.
   SalLib|Include/Library/SalLib.h
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index b4575cd..93c5ee4 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -3,6 +3,7 @@
 #
 # Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>
 # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
 #
 #    This program and the accompanying materials
 #    are licensed and made available under the terms and conditions of the BSD License
@@ -155,6 +156,7 @@ [Components.IA32, Components.X64]
   MdePkg/Library/SmmMemLib/SmmMemLib.inf
   MdePkg/Library/BaseRngLib/BaseRngLib.inf
   MdePkg/Library/SmmPciExpressLib/SmmPciExpressLib.inf
+  MdePkg/Library/BaseIoFifoLib/BaseIoFifoLib.inf
 
 [Components.IPF]
   MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
-- 
1.9.1