* [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
2017-01-10 23:55 [PATCH 0/8] IoLib class library Leo Duran
@ 2017-01-10 23:55 ` Leo Duran
2017-01-12 1:33 ` Fan, Jeff
2017-01-10 23:55 ` [PATCH 2/8] MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class Leo Duran
` (7 subsequent siblings)
8 siblings, 1 reply; 25+ messages in thread
From: Leo Duran @ 2017-01-10 23:55 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, lersek, jordan.l.justen, jeff.fan,
brijesh.singh, Leo Duran
The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate
implementations of I/O Fifo routines. This patch ports the I/O Fifo
routines into the BaseIoLibIntrinsic library and expand the IoLib class
to include the ported I/O Fifo routines.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
.../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm | 141 +++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm | 137 ++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182 +++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179 ++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 +++++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm | 127 +++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm | 126 +++++++++++++
9 files changed, 1256 insertions(+), 1 deletion(-)
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
diff --git a/MdePkg/Include/Library/IoLib.h b/MdePkg/Include/Library/IoLib.h
index a0dd16b..708612e 100644
--- a/MdePkg/Include/Library/IoLib.h
+++ b/MdePkg/Include/Library/IoLib.h
@@ -2,6 +2,8 @@
Provide services to access I/O Ports and MMIO registers.
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -324,6 +326,58 @@ IoBitFieldAndThenOr8 (
);
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
Reads a 16-bit I/O port.
Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
@@ -625,6 +679,58 @@ IoBitFieldAndThenOr16 (
);
/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
Reads a 32-bit I/O port.
Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
@@ -926,6 +1032,58 @@ IoBitFieldAndThenOr32 (
);
/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
Reads a 64-bit I/O port.
Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
index 29b9e8b..8844b1c 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -8,6 +8,7 @@
#
# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -16,7 +17,6 @@
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
-#
##
[Defines]
@@ -43,12 +43,16 @@ [Sources.IA32]
IoLibMsc.c | MSFT
IoLibIcc.c | INTEL
IoLib.c
+ Ia32/IoFifo.nasm
+ Ia32/IoFifo.asm
[Sources.X64]
IoLibGcc.c | GCC
IoLibMsc.c | MSFT
IoLibIcc.c | INTEL
IoLib.c
+ X64/IoFifo.nasm
+ X64/IoFifo.asm
[Sources.EBC]
IoLibEbc.c
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
new file mode 100644
index 0000000..d490308
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
@@ -0,0 +1,141 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoReadFifo8 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insb
+ pop edi
+ ret
+IoReadFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoReadFifo16 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insw
+ pop edi
+ ret
+IoReadFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoReadFifo32 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insd
+ pop edi
+ ret
+IoReadFifo32 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo8 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsb
+ pop esi
+ ret
+IoWriteFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo16 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsw
+ pop esi
+ ret
+IoWriteFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo32 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsd
+ pop esi
+ ret
+IoWriteFifo32 ENDP
+
+ END
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
new file mode 100644
index 0000000..a09e75b
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
@@ -0,0 +1,137 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insb
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insw
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insd
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsb
+ pop esi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsw
+ pop esi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsd
+ pop esi
+ ret
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
index b9f4c5e..301b215 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
@@ -3,6 +3,8 @@
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -221,6 +223,186 @@ IoWrite64 (
return 0;
}
+/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
/**
Reads an 8-bit MMIO register.
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
index e12a5ae..5bc539b 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
@@ -4,6 +4,8 @@
EBC does not support port I/O. All APIs in this file ASSERT().
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -169,3 +171,180 @@ IoWrite32 (
ASSERT (FALSE);
return 0;
}
+
+/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
index 6b0bf6a..a2e183c 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
@@ -2,6 +2,8 @@
Common I/O Library routines.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -147,6 +149,7 @@ IoRead64 (
return 0;
}
+
/**
Writes an 8-bit I/O port.
@@ -252,6 +255,204 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ *Buffer8++ = IoRead8 (Port);
+ }
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ *Buffer16++ = IoRead16 (Port);
+ }
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ *Buffer32++ = IoRead32 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ IoWrite8 (Port, *Buffer8++);
+ }
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ IoWrite16 (Port, *Buffer16++);
+ }
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ IoWrite32 (Port, *Buffer32++);
+ }
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
new file mode 100644
index 0000000..71ce6e8
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
@@ -0,0 +1,127 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insb
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insw
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insd
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo32 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsb
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsw
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsd
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo32 ENDP
+
+ END
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
new file mode 100644
index 0000000..7ca2ba3
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
@@ -0,0 +1,126 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insb
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insw
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insd
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsb
+ mov rsi, r8 ; restore rsi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsw
+ mov rsi, r8 ; restore rsi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsd
+ mov rsi, r8 ; restore rsi
+ ret
+
--
1.9.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
2017-01-10 23:55 ` [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library Leo Duran
@ 2017-01-12 1:33 ` Fan, Jeff
2017-01-12 1:36 ` Duran, Leo
0 siblings, 1 reply; 25+ messages in thread
From: Fan, Jeff @ 2017-01-12 1:33 UTC (permalink / raw)
To: Leo Duran, edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com, Justen, Jordan L, Gao, Liming,
Kinney, Michael D, lersek@redhat.com
Leo,
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
Buffer should be "IN" instead of "OUT". I understand you just copied original code from UefiCpuPkg.
It's better you could update it in your v2 patch serial.
Thanks!
Jeff
-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Leo Duran
Sent: Wednesday, January 11, 2017 7:56 AM
To: edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com; Justen, Jordan L; Gao, Liming; Leo Duran; Kinney, Michael D; lersek@redhat.com; Fan, Jeff
Subject: [edk2] [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate implementations of I/O Fifo routines. This patch ports the I/O Fifo routines into the BaseIoLibIntrinsic library and expand the IoLib class to include the ported I/O Fifo routines.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
.../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm | 141 +++++++++++++++ MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm | 137 ++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182 +++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179 ++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 +++++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm | 127 +++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm | 126 +++++++++++++
9 files changed, 1256 insertions(+), 1 deletion(-) create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
diff --git a/MdePkg/Include/Library/IoLib.h b/MdePkg/Include/Library/IoLib.h index a0dd16b..708612e 100644
--- a/MdePkg/Include/Library/IoLib.h
+++ b/MdePkg/Include/Library/IoLib.h
@@ -2,6 +2,8 @@
Provide services to access I/O Ports and MMIO registers.
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -324,6 +326,58 @@ IoBitFieldAndThenOr8 (
);
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
Reads a 16-bit I/O port.
Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
@@ -625,6 +679,58 @@ IoBitFieldAndThenOr16 (
);
/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
Reads a 32-bit I/O port.
Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
@@ -926,6 +1032,58 @@ IoBitFieldAndThenOr32 (
);
/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
Reads a 64-bit I/O port.
Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
index 29b9e8b..8844b1c 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -8,6 +8,7 @@
#
# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -16,7 +17,6 @@ # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
-#
##
[Defines]
@@ -43,12 +43,16 @@ [Sources.IA32]
IoLibMsc.c | MSFT
IoLibIcc.c | INTEL
IoLib.c
+ Ia32/IoFifo.nasm
+ Ia32/IoFifo.asm
[Sources.X64]
IoLibGcc.c | GCC
IoLibMsc.c | MSFT
IoLibIcc.c | INTEL
IoLib.c
+ X64/IoFifo.nasm
+ X64/IoFifo.asm
[Sources.EBC]
IoLibEbc.c
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
new file mode 100644
index 0000000..d490308
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
@@ -0,0 +1,141 @@
+;----------------------------------------------------------------------
+--------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights
+reserved.<BR> ; Copyright (c) 2017, AMD Incorporated. All rights
+reserved.<BR> ; ; This program and the accompanying materials are
+licensed and made available ; under the terms and conditions of the BSD
+License which accompanies this ; distribution. The full text of the
+license may be found at ;
+http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;----------------------------------------------------------------------
+--------
+
+ .586P
+ .model flat,C
+ .code
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+IoReadFifo8 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insb
+ pop edi
+ ret
+IoReadFifo8 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+IoReadFifo16 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insw
+ pop edi
+ ret
+IoReadFifo16 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+IoReadFifo32 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insd
+ pop edi
+ ret
+IoReadFifo32 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+IoWriteFifo8 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsb
+ pop esi
+ ret
+IoWriteFifo8 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+IoWriteFifo16 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsw
+ pop esi
+ ret
+IoWriteFifo16 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+IoWriteFifo32 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsd
+ pop esi
+ ret
+IoWriteFifo32 ENDP
+
+ END
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
new file mode 100644
index 0000000..a09e75b
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
@@ -0,0 +1,137 @@
+;----------------------------------------------------------------------
+--------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights
+reserved.<BR> ; Copyright (c) 2017, AMD Incorporated. All rights
+reserved.<BR> ; ; This program and the accompanying materials are
+licensed and made available ; under the terms and conditions of the BSD
+License which accompanies this ; distribution. The full text of the
+license may be found at ;
+http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;----------------------------------------------------------------------
+--------
+
+ SECTION .text
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insb
+ pop edi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insw
+ pop edi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insd
+ pop edi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsb
+ pop esi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsw
+ pop esi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsd
+ pop esi
+ ret
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
index b9f4c5e..301b215 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
@@ -3,6 +3,8 @@
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at @@ -221,6 +223,186 @@ IoWrite64 (
return 0;
}
+/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are
+
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
/**
Reads an 8-bit MMIO register.
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
index e12a5ae..5bc539b 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
@@ -4,6 +4,8 @@
EBC does not support port I/O. All APIs in this file ASSERT().
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at @@ -169,3 +171,180 @@ IoWrite32 (
ASSERT (FALSE);
return 0;
}
+
+/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are
+
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
index 6b0bf6a..a2e183c 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
@@ -2,6 +2,8 @@
Common I/O Library routines.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at @@ -147,6 +149,7 @@ IoRead64 (
return 0;
}
+
/**
Writes an 8-bit I/O port.
@@ -252,6 +255,204 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ *Buffer8++ = IoRead8 (Port);
+ }
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ *Buffer16++ = IoRead16 (Port);
+ }
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ *Buffer32++ = IoRead32 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ IoWrite8 (Port, *Buffer8++);
+ }
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ IoWrite16 (Port, *Buffer16++);
+ }
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ IoWrite32 (Port, *Buffer32++);
+ }
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
new file mode 100644
index 0000000..71ce6e8
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
@@ -0,0 +1,127 @@
+;----------------------------------------------------------------------
+--------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights
+reserved.<BR> ; Copyright (c) 2017, AMD Incorporated. All rights
+reserved.<BR> ; ; This program and the accompanying materials are
+licensed and made available ; under the terms and conditions of the BSD
+License which accompanies this ; distribution. The full text of the
+license may be found at ;
+http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;----------------------------------------------------------------------
+--------
+
+ .code
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+IoReadFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insb
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo8 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+IoReadFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insw
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo16 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+IoReadFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insd
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo32 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+IoWriteFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsb
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo8 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+IoWriteFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsw
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo16 ENDP
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+IoWriteFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsd
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo32 ENDP
+
+ END
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
new file mode 100644
index 0000000..7ca2ba3
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
@@ -0,0 +1,126 @@
+;----------------------------------------------------------------------
+--------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights
+reserved.<BR> ; Copyright (c) 2017, AMD Incorporated. All rights
+reserved.<BR> ; ; This program and the accompanying materials are
+licensed and made available ; under the terms and conditions of the BSD
+License which accompanies this ; distribution. The full text of the
+license may be found at ;
+http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;----------------------------------------------------------------------
+--------
+
+ DEFAULT REL
+ SECTION .text
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insb
+ mov rdi, r8 ; restore rdi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insw
+ mov rdi, r8 ; restore rdi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insd
+ mov rdi, r8 ; restore rdi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsb
+ mov rsi, r8 ; restore rsi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsw
+ mov rsi, r8 ; restore rsi
+ ret
+
+;----------------------------------------------------------------------
+--------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;----------------------------------------------------------------------
+--------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsd
+ mov rsi, r8 ; restore rsi
+ ret
+
--
1.9.1
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^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
2017-01-12 1:33 ` Fan, Jeff
@ 2017-01-12 1:36 ` Duran, Leo
0 siblings, 0 replies; 25+ messages in thread
From: Duran, Leo @ 2017-01-12 1:36 UTC (permalink / raw)
To: Fan, Jeff, edk2-devel@lists.01.org
Cc: Singh, Brijesh, Justen, Jordan L, Gao, Liming, Kinney, Michael D,
lersek@redhat.com
Jeff,
Please see inline below.
Leo
> -----Original Message-----
> From: Fan, Jeff [mailto:jeff.fan@intel.com]
> Sent: Wednesday, January 11, 2017 7:33 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Kinney,
> Michael D <michael.d.kinney@intel.com>; lersek@redhat.com
> Subject: RE: [edk2] [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib
> class) library
>
> Leo,
>
> +VOID
> +EFIAPI
> +IoWriteFifo8 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + );
>
> Buffer should be "IN" instead of "OUT". I understand you just copied original
> code from UefiCpuPkg.
>
> It's better you could update it in your v2 patch serial.
[Duran, Leo] You bet, I'll take care of that. Thanks.
>
> Thanks!
> Jeff
>
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> Leo Duran
> Sent: Wednesday, January 11, 2017 7:56 AM
> To: edk2-devel@lists.01.org
> Cc: brijesh.singh@amd.com; Justen, Jordan L; Gao, Liming; Leo Duran;
> Kinney, Michael D; lersek@redhat.com; Fan, Jeff
> Subject: [edk2] [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class)
> library
>
> The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> duplicate implementations of I/O Fifo routines. This patch ports the I/O Fifo
> routines into the BaseIoLibIntrinsic library and expand the IoLib class to
> include the ported I/O Fifo routines.
>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
> Signed-off-by: Leo Duran <leo.duran@amd.com>
> ---
> MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm | 141
> +++++++++++++++ MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm |
> 137 ++++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> +++++++++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> ++++++++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> +++++++++++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm | 127 +++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm | 126 +++++++++++++
> 9 files changed, 1256 insertions(+), 1 deletion(-) create mode 100644
> MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
> create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
> create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
> create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
>
> diff --git a/MdePkg/Include/Library/IoLib.h
> b/MdePkg/Include/Library/IoLib.h index a0dd16b..708612e 100644
> --- a/MdePkg/Include/Library/IoLib.h
> +++ b/MdePkg/Include/Library/IoLib.h
> @@ -2,6 +2,8 @@
> Provide services to access I/O Ports and MMIO registers.
>
> Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> +
> This program and the accompanying materials are licensed and made
> available under the terms and conditions of the BSD License which
> accompanies this distribution. The full text of the license may be found at
> @@ -324,6 +326,58 @@ IoBitFieldAndThenOr8 (
> );
>
> /**
> + Reads an 8-bit I/O port fifo into a block of memory.
> +
> + Reads the 8-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 8-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo8 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + );
> +
> +/**
> + Writes a block of memory into an 8-bit I/O port fifo.
> +
> + Writes the 8-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 8-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo8 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + );
> +
> +/**
> Reads a 16-bit I/O port.
>
> Reads the 16-bit I/O port specified by Port. The 16-bit read value is
> returned.
> @@ -625,6 +679,58 @@ IoBitFieldAndThenOr16 (
> );
>
> /**
> + Reads a 16-bit I/O port fifo into a block of memory.
> +
> + Reads the 16-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 16-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo16 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + );
> +
> +/**
> + Writes a block of memory into a 16-bit I/O port fifo.
> +
> + Writes the 16-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 16-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo16 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + );
> +
> +/**
> Reads a 32-bit I/O port.
>
> Reads the 32-bit I/O port specified by Port. The 32-bit read value is
> returned.
> @@ -926,6 +1032,58 @@ IoBitFieldAndThenOr32 (
> );
>
> /**
> + Reads a 32-bit I/O port fifo into a block of memory.
> +
> + Reads the 32-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 32-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo32 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + );
> +
> +/**
> + Writes a block of memory into a 32-bit I/O port fifo.
> +
> + Writes the 32-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 32-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo32 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + );
> +
> +/**
> Reads a 64-bit I/O port.
>
> Reads the 64-bit I/O port specified by Port. The 64-bit read value is
> returned.
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
> b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
> index 29b9e8b..8844b1c 100644
> --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
> @@ -8,6 +8,7 @@
> #
> # Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR> #
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> +# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> #
> # This program and the accompanying materials # are licensed and made
> available under the terms and conditions of the BSD License @@ -16,7 +17,6
> @@ # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS
> IS" BASIS, # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND,
> EITHER EXPRESS OR IMPLIED.
> #
> -#
> ##
>
> [Defines]
> @@ -43,12 +43,16 @@ [Sources.IA32]
> IoLibMsc.c | MSFT
> IoLibIcc.c | INTEL
> IoLib.c
> + Ia32/IoFifo.nasm
> + Ia32/IoFifo.asm
>
> [Sources.X64]
> IoLibGcc.c | GCC
> IoLibMsc.c | MSFT
> IoLibIcc.c | INTEL
> IoLib.c
> + X64/IoFifo.nasm
> + X64/IoFifo.asm
>
> [Sources.EBC]
> IoLibEbc.c
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
> b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
> new file mode 100644
> index 0000000..d490308
> --- /dev/null
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
> @@ -0,0 +1,141 @@
> +;----------------------------------------------------------------------
> +--------
> +;
> +; Copyright (c) 2006 - 2012, Intel Corporation. All rights
> +reserved.<BR> ; Copyright (c) 2017, AMD Incorporated. All rights
> +reserved.<BR> ; ; This program and the accompanying materials are
> +licensed and made available ; under the terms and conditions of the BSD
> +License which accompanies this ; distribution. The full text of the
> +license may be found at ;
> +http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +;
> +;----------------------------------------------------------------------
> +--------
> +
> + .586P
> + .model flat,C
> + .code
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo8 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoReadFifo8 PROC
> + push edi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov edi, [esp + 16]
> +rep insb
> + pop edi
> + ret
> +IoReadFifo8 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo16 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoReadFifo16 PROC
> + push edi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov edi, [esp + 16]
> +rep insw
> + pop edi
> + ret
> +IoReadFifo16 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo32 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoReadFifo32 PROC
> + push edi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov edi, [esp + 16]
> +rep insd
> + pop edi
> + ret
> +IoReadFifo32 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo8 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoWriteFifo8 PROC
> + push esi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov esi, [esp + 16]
> +rep outsb
> + pop esi
> + ret
> +IoWriteFifo8 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo16 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoWriteFifo16 PROC
> + push esi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov esi, [esp + 16]
> +rep outsw
> + pop esi
> + ret
> +IoWriteFifo16 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo32 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoWriteFifo32 PROC
> + push esi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov esi, [esp + 16]
> +rep outsd
> + pop esi
> + ret
> +IoWriteFifo32 ENDP
> +
> + END
> +
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
> b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
> new file mode 100644
> index 0000000..a09e75b
> --- /dev/null
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
> @@ -0,0 +1,137 @@
> +;----------------------------------------------------------------------
> +--------
> +;
> +; Copyright (c) 2006 - 2012, Intel Corporation. All rights
> +reserved.<BR> ; Copyright (c) 2017, AMD Incorporated. All rights
> +reserved.<BR> ; ; This program and the accompanying materials are
> +licensed and made available ; under the terms and conditions of the BSD
> +License which accompanies this ; distribution. The full text of the
> +license may be found at ;
> +http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +;
> +;----------------------------------------------------------------------
> +--------
> +
> + SECTION .text
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo8 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoReadFifo8)
> +ASM_PFX(IoReadFifo8):
> + push edi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov edi, [esp + 16]
> +rep insb
> + pop edi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo16 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoReadFifo16)
> +ASM_PFX(IoReadFifo16):
> + push edi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov edi, [esp + 16]
> +rep insw
> + pop edi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo32 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoReadFifo32)
> +ASM_PFX(IoReadFifo32):
> + push edi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov edi, [esp + 16]
> +rep insd
> + pop edi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo8 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoWriteFifo8)
> +ASM_PFX(IoWriteFifo8):
> + push esi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov esi, [esp + 16]
> +rep outsb
> + pop esi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo16 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoWriteFifo16)
> +ASM_PFX(IoWriteFifo16):
> + push esi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov esi, [esp + 16]
> +rep outsw
> + pop esi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo32 (
> +; IN UINTN Port,
> +; IN UINTN Size,
> +; IN VOID *Buffer
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoWriteFifo32)
> +ASM_PFX(IoWriteFifo32):
> + push esi
> + cld
> + mov dx, [esp + 8]
> + mov ecx, [esp + 12]
> + mov esi, [esp + 16]
> +rep outsd
> + pop esi
> + ret
> +
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
> b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
> index b9f4c5e..301b215 100644
> --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
> @@ -3,6 +3,8 @@
>
> Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> + Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> +
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license may be
> found at @@ -221,6 +223,186 @@ IoWrite64 (
> return 0;
> }
>
> +/**
> + Reads an 8-bit I/O port fifo into a block of memory.
> +
> + Reads the 8-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 8-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo8 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> +/**
> + Writes a block of memory into an 8-bit I/O port fifo.
> +
> + Writes the 8-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 8-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo8 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> +/**
> + Reads a 16-bit I/O port fifo into a block of memory.
> +
> + Reads the 16-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 16-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo16 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> +/**
> + Writes a block of memory into a 16-bit I/O port fifo.
> +
> + Writes the 16-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 16-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo16 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> +/**
> + Reads a 32-bit I/O port fifo into a block of memory.
> +
> + Reads the 32-bit I/O fifo port specified by Port.
> +
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are
> +
> + serialized.
> +
> + If 32-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> +
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo32 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> +/**
> +
> + Writes a block of memory into a 32-bit I/O port fifo.
> +
> + Writes the 32-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is
> +
> + retrieved from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> +
> + If 32-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo32 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
>
> /**
> Reads an 8-bit MMIO register.
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
> b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
> index e12a5ae..5bc539b 100644
> --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
> @@ -4,6 +4,8 @@
> EBC does not support port I/O. All APIs in this file ASSERT().
>
> Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> +
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license may be
> found at @@ -169,3 +171,180 @@ IoWrite32 (
> ASSERT (FALSE);
> return 0;
> }
> +
> +/**
> + Reads an 8-bit I/O port fifo into a block of memory.
> +
> + Reads the 8-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 8-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo8 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> +/**
> + Writes a block of memory into an 8-bit I/O port fifo.
> +
> + Writes the 8-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 8-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo8 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> +/**
> + Reads a 16-bit I/O port fifo into a block of memory.
> +
> + Reads the 16-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 16-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo16 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> +/**
> + Writes a block of memory into a 16-bit I/O port fifo.
> +
> + Writes the 16-bit I/O fifo port specified by Port.
> +
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are
> +
> + serialized.
> +
> + If 16-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> +
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo16 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +/**
> + Reads a 32-bit I/O port fifo into a block of memory.
> +
> + Reads the 32-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 32-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo32 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> +/**
> + Writes a block of memory into a 32-bit I/O port fifo.
> +
> + Writes the 32-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 32-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo32 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + ASSERT (FALSE);
> +}
> +
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
> b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
> index 6b0bf6a..a2e183c 100644
> --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
> @@ -2,6 +2,8 @@
> Common I/O Library routines.
>
> Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
> +
> This program and the accompanying materials
> are licensed and made available under the terms and conditions of the BSD
> License
> which accompanies this distribution. The full text of the license may be
> found at @@ -147,6 +149,7 @@ IoRead64 (
> return 0;
> }
>
> +
> /**
> Writes an 8-bit I/O port.
>
> @@ -252,6 +255,204 @@ IoWrite64 (
> }
>
> /**
> + Reads an 8-bit I/O port fifo into a block of memory.
> +
> + Reads the 8-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 8-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo8 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + UINT8 *Buffer8 = (UINT8 *)Buffer;
> +
> + while (Count--) {
> + *Buffer8++ = IoRead8 (Port);
> + }
> +}
> +
> +/**
> + Reads a 16-bit I/O port fifo into a block of memory.
> +
> + Reads the 16-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 16-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo16 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + UINT16 *Buffer16 = (UINT16 *)Buffer;
> +
> + while (Count--) {
> + *Buffer16++ = IoRead16 (Port);
> + }
> +}
> +
> +/**
> + Reads a 32-bit I/O port fifo into a block of memory.
> +
> + Reads the 32-bit I/O fifo port specified by Port.
> +
> + The port is read Count times, and the read data is stored in the
> + provided Buffer.
> +
> + This function must guarantee that all I/O read and write operations
> + are serialized.
> +
> + If 32-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to read.
> + @param Count The number of times to read I/O port.
> + @param Buffer The buffer to store the read data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoReadFifo32 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + UINT32 *Buffer32 = (UINT32 *)Buffer;
> +
> + while (Count--) {
> + *Buffer32++ = IoRead32 (Port);
> + }
> +}
> +
> +/**
> + Writes a block of memory into an 8-bit I/O port fifo.
> +
> + Writes the 8-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 8-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo8 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + UINT8 *Buffer8 = (UINT8 *)Buffer;
> +
> + while (Count--) {
> + IoWrite8 (Port, *Buffer8++);
> + }
> +}
> +
> +/**
> + Writes a block of memory into a 16-bit I/O port fifo.
> +
> + Writes the 16-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 16-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo16 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + UINT16 *Buffer16 = (UINT16 *)Buffer;
> +
> + while (Count--) {
> + IoWrite16 (Port, *Buffer16++);
> + }
> +}
> +
> +/**
> + Writes a block of memory into a 32-bit I/O port fifo.
> +
> + Writes the 32-bit I/O fifo port specified by Port.
> +
> + The port is written Count times, and the write data is retrieved
> + from the provided Buffer.
> +
> + This function must guarantee that all I/O write and write operations
> + are serialized.
> +
> + If 32-bit I/O port operations are not supported, then ASSERT().
> +
> + @param Port The I/O port to write.
> + @param Count The number of times to write I/O port.
> + @param Buffer The buffer to store the write data into.
> +
> +**/
> +VOID
> +EFIAPI
> +IoWriteFifo32 (
> + IN UINTN Port,
> + IN UINTN Count,
> + OUT VOID *Buffer
> + )
> +{
> + UINT32 *Buffer32 = (UINT32 *)Buffer;
> +
> + while (Count--) {
> + IoWrite32 (Port, *Buffer32++);
> + }
> +}
> +
> +/**
> Reads an 8-bit MMIO register.
>
> Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
> b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
> new file mode 100644
> index 0000000..71ce6e8
> --- /dev/null
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
> @@ -0,0 +1,127 @@
> +;----------------------------------------------------------------------
> +--------
> +;
> +; Copyright (c) 2006 - 2012, Intel Corporation. All rights
> +reserved.<BR> ; Copyright (c) 2017, AMD Incorporated. All rights
> +reserved.<BR> ; ; This program and the accompanying materials are
> +licensed and made available ; under the terms and conditions of the BSD
> +License which accompanies this ; distribution. The full text of the
> +license may be found at ;
> +http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +;
> +;----------------------------------------------------------------------
> +--------
> +
> + .code
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo8 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoReadFifo8 PROC
> + cld
> + xchg rcx, rdx
> + xchg rdi, r8 ; rdi: buffer address; r8: save rdi
> +rep insb
> + mov rdi, r8 ; restore rdi
> + ret
> +IoReadFifo8 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo16 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoReadFifo16 PROC
> + cld
> + xchg rcx, rdx
> + xchg rdi, r8 ; rdi: buffer address; r8: save rdi
> +rep insw
> + mov rdi, r8 ; restore rdi
> + ret
> +IoReadFifo16 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo32 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoReadFifo32 PROC
> + cld
> + xchg rcx, rdx
> + xchg rdi, r8 ; rdi: buffer address; r8: save rdi
> +rep insd
> + mov rdi, r8 ; restore rdi
> + ret
> +IoReadFifo32 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo8 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoWriteFifo8 PROC
> + cld
> + xchg rcx, rdx
> + xchg rsi, r8 ; rsi: buffer address; r8: save rsi
> +rep outsb
> + mov rsi, r8 ; restore rsi
> + ret
> +IoWriteFifo8 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo16 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoWriteFifo16 PROC
> + cld
> + xchg rcx, rdx
> + xchg rsi, r8 ; rsi: buffer address; r8: save rsi
> +rep outsw
> + mov rsi, r8 ; restore rsi
> + ret
> +IoWriteFifo16 ENDP
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo32 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +IoWriteFifo32 PROC
> + cld
> + xchg rcx, rdx
> + xchg rsi, r8 ; rsi: buffer address; r8: save rsi
> +rep outsd
> + mov rsi, r8 ; restore rsi
> + ret
> +IoWriteFifo32 ENDP
> +
> + END
> +
> diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
> b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
> new file mode 100644
> index 0000000..7ca2ba3
> --- /dev/null
> +++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
> @@ -0,0 +1,126 @@
> +;----------------------------------------------------------------------
> +--------
> +;
> +; Copyright (c) 2006 - 2012, Intel Corporation. All rights
> +reserved.<BR> ; Copyright (c) 2017, AMD Incorporated. All rights
> +reserved.<BR> ; ; This program and the accompanying materials are
> +licensed and made available ; under the terms and conditions of the BSD
> +License which accompanies this ; distribution. The full text of the
> +license may be found at ;
> +http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> +;
> +;----------------------------------------------------------------------
> +--------
> +
> + DEFAULT REL
> + SECTION .text
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo8 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoReadFifo8)
> +ASM_PFX(IoReadFifo8):
> + cld
> + xchg rcx, rdx
> + xchg rdi, r8 ; rdi: buffer address; r8: save rdi
> +rep insb
> + mov rdi, r8 ; restore rdi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo16 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoReadFifo16)
> +ASM_PFX(IoReadFifo16):
> + cld
> + xchg rcx, rdx
> + xchg rdi, r8 ; rdi: buffer address; r8: save rdi
> +rep insw
> + mov rdi, r8 ; restore rdi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoReadFifo32 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoReadFifo32)
> +ASM_PFX(IoReadFifo32):
> + cld
> + xchg rcx, rdx
> + xchg rdi, r8 ; rdi: buffer address; r8: save rdi
> +rep insd
> + mov rdi, r8 ; restore rdi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo8 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoWriteFifo8)
> +ASM_PFX(IoWriteFifo8):
> + cld
> + xchg rcx, rdx
> + xchg rsi, r8 ; rsi: buffer address; r8: save rsi
> +rep outsb
> + mov rsi, r8 ; restore rsi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo16 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoWriteFifo16)
> +ASM_PFX(IoWriteFifo16):
> + cld
> + xchg rcx, rdx
> + xchg rsi, r8 ; rsi: buffer address; r8: save rsi
> +rep outsw
> + mov rsi, r8 ; restore rsi
> + ret
> +
> +;----------------------------------------------------------------------
> +--------
> +; VOID
> +; EFIAPI
> +; IoWriteFifo32 (
> +; IN UINTN Port, // rcx
> +; IN UINTN Size, // rdx
> +; IN VOID *Buffer // r8
> +; );
> +;----------------------------------------------------------------------
> +--------
> +global ASM_PFX(IoWriteFifo32)
> +ASM_PFX(IoWriteFifo32):
> + cld
> + xchg rcx, rdx
> + xchg rsi, r8 ; rsi: buffer address; r8: save rsi
> +rep outsd
> + mov rsi, r8 ; restore rsi
> + ret
> +
> --
> 1.9.1
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 2/8] MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
2017-01-10 23:55 [PATCH 0/8] IoLib class library Leo Duran
2017-01-10 23:55 ` [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library Leo Duran
@ 2017-01-10 23:55 ` Leo Duran
2017-01-10 23:55 ` [PATCH 3/8] MdePkg/DxeIoLibEsal: " Leo Duran
` (6 subsequent siblings)
8 siblings, 0 replies; 25+ messages in thread
From: Leo Duran @ 2017-01-10 23:55 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, lersek, jordan.l.justen, jeff.fan,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203 ++++++++++++++++++++++++++++++++++
1 file changed, 203 insertions(+)
diff --git a/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c b/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c
index 110f66c..ffb6fdc 100644
--- a/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c
+++ b/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c
@@ -2,6 +2,8 @@
I/O Library instance based on EFI_CPU_IO2_PROTOCOL.
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
@@ -397,6 +399,207 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ *Buffer8++ = IoRead8 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ IoWrite8 (Port, *Buffer8++);
+ }
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ *Buffer16++ = IoRead16 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ IoWrite16 (Port, *Buffer16++);
+ }
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ *Buffer32++ = IoRead32 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ IoWrite32 (Port, *Buffer32++);
+ }
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 3/8] MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
2017-01-10 23:55 [PATCH 0/8] IoLib class library Leo Duran
2017-01-10 23:55 ` [PATCH 1/8] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library Leo Duran
2017-01-10 23:55 ` [PATCH 2/8] MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class Leo Duran
@ 2017-01-10 23:55 ` Leo Duran
2017-01-10 23:55 ` [PATCH 4/8] MdePkg/PeiIoLibCpuIo: " Leo Duran
` (5 subsequent siblings)
8 siblings, 0 replies; 25+ messages in thread
From: Leo Duran @ 2017-01-10 23:55 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, lersek, jordan.l.justen, jeff.fan,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Library/DxeIoLibEsal/IoLib.c | 203 ++++++++++++++++++++++++++++++++++++
1 file changed, 203 insertions(+)
diff --git a/MdePkg/Library/DxeIoLibEsal/IoLib.c b/MdePkg/Library/DxeIoLibEsal/IoLib.c
index 3a58b51..5626669 100644
--- a/MdePkg/Library/DxeIoLibEsal/IoLib.c
+++ b/MdePkg/Library/DxeIoLibEsal/IoLib.c
@@ -2,6 +2,8 @@
I/O Library basic function implementation and worker functions.
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -397,6 +399,207 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ *Buffer8++ = IoRead8 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ IoWrite8 (Port, *Buffer8++);
+ }
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ *Buffer16++ = IoRead16 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ IoWrite16 (Port, *Buffer16++);
+ }
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ *Buffer32++ = IoRead32 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ IoWrite32 (Port, *Buffer32++);
+ }
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 4/8] MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
2017-01-10 23:55 [PATCH 0/8] IoLib class library Leo Duran
` (2 preceding siblings ...)
2017-01-10 23:55 ` [PATCH 3/8] MdePkg/DxeIoLibEsal: " Leo Duran
@ 2017-01-10 23:55 ` Leo Duran
2017-01-10 23:55 ` [PATCH 5/8] MdePkg/SmmIoLibSmmCpuIo2: " Leo Duran
` (4 subsequent siblings)
8 siblings, 0 replies; 25+ messages in thread
From: Leo Duran @ 2017-01-10 23:55 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, lersek, jordan.l.justen, jeff.fan,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203 +++++++++++++++++++++++++++++++++++
1 file changed, 203 insertions(+)
diff --git a/MdePkg/Library/PeiIoLibCpuIo/IoLib.c b/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
index 1f50a12..bb68305 100644
--- a/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
+++ b/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
@@ -2,6 +2,8 @@
I/O Library. The implementations are based on EFI_PEI_SERVICE->CpuIo interface.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -297,6 +299,207 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ *Buffer8++ = IoRead8 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ IoWrite8 (Port, *Buffer8++);
+ }
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ *Buffer16++ = IoRead16 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ IoWrite16 (Port, *Buffer16++);
+ }
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ *Buffer32++ = IoRead32 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ IoWrite32 (Port, *Buffer32++);
+ }
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 5/8] MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
2017-01-10 23:55 [PATCH 0/8] IoLib class library Leo Duran
` (3 preceding siblings ...)
2017-01-10 23:55 ` [PATCH 4/8] MdePkg/PeiIoLibCpuIo: " Leo Duran
@ 2017-01-10 23:55 ` Leo Duran
2017-01-10 23:55 ` [PATCH 6/8] IntelFrameworkPkg/DxeIoLibCpuIo: " Leo Duran
` (3 subsequent siblings)
8 siblings, 0 replies; 25+ messages in thread
From: Leo Duran @ 2017-01-10 23:55 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, lersek, jordan.l.justen, jeff.fan,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203 +++++++++++++++++++++++++++++++
1 file changed, 203 insertions(+)
diff --git a/MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c b/MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c
index 7c8a603..35ad1d7 100644
--- a/MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c
+++ b/MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c
@@ -4,6 +4,8 @@
are based on EFI_CPU_IO_PROTOCOL.
Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -367,6 +369,207 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ *Buffer8++ = IoRead8 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ IoWrite8 (Port, *Buffer8++);
+ }
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ *Buffer16++ = IoRead16 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ IoWrite16 (Port, *Buffer16++);
+ }
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ *Buffer32++ = IoRead32 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ IoWrite32 (Port, *Buffer32++);
+ }
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 6/8] IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
2017-01-10 23:55 [PATCH 0/8] IoLib class library Leo Duran
` (4 preceding siblings ...)
2017-01-10 23:55 ` [PATCH 5/8] MdePkg/SmmIoLibSmmCpuIo2: " Leo Duran
@ 2017-01-10 23:55 ` Leo Duran
2017-01-10 23:55 ` [PATCH 7/8] UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library Leo Duran
` (2 subsequent siblings)
8 siblings, 0 replies; 25+ messages in thread
From: Leo Duran @ 2017-01-10 23:55 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, lersek, jordan.l.justen, jeff.fan,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203 ++++++++++++++++++++++++
1 file changed, 203 insertions(+)
diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
index c1c48d5..d10d11b 100644
--- a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
+++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
@@ -4,6 +4,8 @@
are based on EFI_CPU_IO_PROTOCOL.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -402,6 +404,207 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ *Buffer8++ = IoRead8 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8 = (UINT8 *)Buffer;
+
+ while (Count--) {
+ IoWrite8 (Port, *Buffer8++);
+ }
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ *Buffer16++ = IoRead16 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16 = (UINT16 *)Buffer;
+
+ while (Count--) {
+ IoWrite16 (Port, *Buffer16++);
+ }
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ *Buffer32++ = IoRead32 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the write data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32 = (UINT32 *)Buffer;
+
+ while (Count--) {
+ IoWrite32 (Port, *Buffer32++);
+ }
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 7/8] UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
2017-01-10 23:55 [PATCH 0/8] IoLib class library Leo Duran
` (5 preceding siblings ...)
2017-01-10 23:55 ` [PATCH 6/8] IntelFrameworkPkg/DxeIoLibCpuIo: " Leo Duran
@ 2017-01-10 23:55 ` Leo Duran
2017-01-10 23:55 ` [PATCH 8/8] OvmfPkg: Modify QemuFwCfgLib " Leo Duran
2017-01-11 1:41 ` [PATCH 0/8] " Gao, Liming
8 siblings, 0 replies; 25+ messages in thread
From: Leo Duran @ 2017-01-10 23:55 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, lersek, jordan.l.justen, jeff.fan,
brijesh.singh, Leo Duran
The Fifo routines from the UefiCpuPkg/CpuIo2Dxe driver have been
moved to the BaseIoLibIntrinsic (IoLib class) library.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +--
UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm | 140 ---------------------------
UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm | 136 --------------------------
UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ----------------------------------
UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm | 126 ------------------------
UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm | 125 ------------------------
7 files changed, 4 insertions(+), 713 deletions(-)
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
index 6ccfc40..30ed405 100644
--- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
+++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
@@ -2,6 +2,8 @@
Produces the CPU I/O 2 Protocol.
Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -13,7 +15,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "CpuIo2Dxe.h"
-#include "IoFifo.h"
//
// Handle for the CPU I/O 2 Protocol
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
index 920ede7..5503662 100644
--- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
+++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
@@ -2,6 +2,8 @@
# Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
#
# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,15 +32,6 @@ [Defines]
[Sources]
CpuIo2Dxe.c
CpuIo2Dxe.h
- IoFifo.h
-
-[Sources.IA32]
- Ia32/IoFifo.nasm
- Ia32/IoFifo.asm
-
-[Sources.X64]
- X64/IoFifo.nasm
- X64/IoFifo.asm
[Packages]
MdePkg/MdePkg.dec
diff --git a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm b/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm
deleted file mode 100644
index b1cc25e..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm
+++ /dev/null
@@ -1,140 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .586P
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insw
- pop edi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insd
- pop edi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsw
- pop esi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsd
- pop esi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm b/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm
deleted file mode 100644
index daa90a9..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm
+++ /dev/null
@@ -1,136 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo16)
-ASM_PFX(IoReadFifo16):
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insw
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo32)
-ASM_PFX(IoReadFifo32):
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insd
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo16)
-ASM_PFX(IoWriteFifo16):
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsw
- pop esi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo32)
-ASM_PFX(IoWriteFifo32):
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsd
- pop esi
- ret
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/IoFifo.h b/UefiCpuPkg/CpuIo2Dxe/IoFifo.h
deleted file mode 100644
index 9978f8b..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/IoFifo.h
+++ /dev/null
@@ -1,176 +0,0 @@
-/** @file
- I/O FIFO routines
-
- Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials are licensed and made available
- under the terms and conditions of the BSD License which accompanies this
- distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _IO_FIFO_H_INCLUDED_
-#define _IO_FIFO_H_INCLUDED_
-
-/**
- Reads an 8-bit I/O port fifo into a block of memory.
-
- Reads the 8-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Reads a 16-bit I/O port fifo into a block of memory.
-
- Reads the 16-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo16 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Reads a 32-bit I/O port fifo into a block of memory.
-
- Reads the 32-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo32 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes a block of memory into an 8-bit I/O port fifo.
-
- Writes the 8-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
-
- This function must guarantee that all I/O write and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to store the write data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes a block of memory into a 16-bit I/O port fifo.
-
- Writes the 16-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
-
- This function must guarantee that all I/O write and write operations are
- serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to store the write data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo16 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes a block of memory into a 32-bit I/O port fifo.
-
- Writes the 32-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
-
- This function must guarantee that all I/O write and write operations are
- serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to store the write data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo32 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-#endif
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm b/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm
deleted file mode 100644
index 1a3f0ef..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm
+++ /dev/null
@@ -1,126 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insw
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insd
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsb
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsw
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsd
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm b/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm
deleted file mode 100644
index bb3d1da..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm
+++ /dev/null
@@ -1,125 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- DEFAULT REL
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo16)
-ASM_PFX(IoReadFifo16):
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insw
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo32)
-ASM_PFX(IoReadFifo32):
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insd
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsb
- mov rsi, r8 ; restore rsi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo16)
-ASM_PFX(IoWriteFifo16):
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsw
- mov rsi, r8 ; restore rsi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo32)
-ASM_PFX(IoWriteFifo32):
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsd
- mov rsi, r8 ; restore rsi
- ret
-
--
1.9.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* [PATCH 8/8] OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
2017-01-10 23:55 [PATCH 0/8] IoLib class library Leo Duran
` (6 preceding siblings ...)
2017-01-10 23:55 ` [PATCH 7/8] UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library Leo Duran
@ 2017-01-10 23:55 ` Leo Duran
2017-01-11 1:41 ` [PATCH 0/8] " Gao, Liming
8 siblings, 0 replies; 25+ messages in thread
From: Leo Duran @ 2017-01-10 23:55 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, lersek, jordan.l.justen, jeff.fan,
brijesh.singh, Leo Duran
The Fifo routines from the QuemuFwCfgLib library have been ported
in the new BaseIoLibIntrinsic (IoLib class) library.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 -----------------------
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +---------------------
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +--
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +--
OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ---------------------
5 files changed, 3 insertions(+), 172 deletions(-)
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
diff --git a/OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm b/OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
deleted file mode 100644
index faa22e9..0000000
--- a/OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
+++ /dev/null
@@ -1,55 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
-
- mov dx, [esp + 4]
- mov ecx, [esp + 8]
- push edi
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
-
- mov dx, [esp + 4]
- mov ecx, [esp + 8]
- push esi
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c
index 0bbf121..a228c02 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c
@@ -2,6 +2,7 @@
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
Copyright (C) 2013, Red Hat, Inc.
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -26,59 +27,6 @@
/**
- Reads an 8-bit I/O port fifo into a block of memory.
-
- Reads the 8-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes an 8-bit I/O port fifo from a block of memory.
-
- Writes the 8-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the data are obtained
- from the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-
-/**
Selects a firmware configuration item for reading.
Following this call, any data read from this item will start from
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf
index 66ac778..6894760 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf
@@ -4,6 +4,7 @@
#
# Copyright (C) 2013, Red Hat, Inc.
# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -36,12 +37,6 @@ [Sources]
QemuFwCfgLib.c
QemuFwCfgPeiDxe.c
-[Sources.IA32]
- Ia32/IoLibExAsm.nasm
-
-[Sources.X64]
- X64/IoLibExAsm.nasm
-
[Packages]
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf
index c1d6a54..7a96575 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf
@@ -4,6 +4,7 @@
#
# Copyright (C) 2013, Red Hat, Inc.
# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -34,12 +35,6 @@ [Sources]
QemuFwCfgLib.c
QemuFwCfgSec.c
-[Sources.IA32]
- Ia32/IoLibExAsm.nasm
-
-[Sources.X64]
- X64/IoLibExAsm.nasm
-
[Packages]
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
diff --git a/OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm b/OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
deleted file mode 100644
index f1078f2..0000000
--- a/OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
+++ /dev/null
@@ -1,52 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- DEFAULT REL
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
-
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
-
- xchg rcx, rdx
- xchg rsi, r8 ; rdi: buffer address; r8: save rdi
-rep outsb
- mov rsi, r8 ; restore rdi
- ret
-
--
1.9.1
^ permalink raw reply related [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-10 23:55 [PATCH 0/8] IoLib class library Leo Duran
` (7 preceding siblings ...)
2017-01-10 23:55 ` [PATCH 8/8] OvmfPkg: Modify QemuFwCfgLib " Leo Duran
@ 2017-01-11 1:41 ` Gao, Liming
2017-01-11 1:45 ` Fan, Jeff
2017-01-11 3:37 ` Duran, Leo
8 siblings, 2 replies; 25+ messages in thread
From: Gao, Liming @ 2017-01-11 1:41 UTC (permalink / raw)
To: Leo Duran, edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com, Justen, Jordan L, Kinney, Michael D,
lersek@redhat.com, Fan, Jeff
Leo:
Thanks for your update. Here is my comments.
1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base on CPU IO service to do FifoIo operation. They don't implement them again.
2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver can be updated to base on FifoIo API for their FifoIo implementation.
3) One coding style issue. We don't assign value to the variable declaration.
UINT8 *Buffer8 = (UINT8 *)Buffer;
==>
UINT8 *Buffer8;
Buffer8 = (UINT8 *)Buffer;
Thanks
Liming
-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Leo Duran
Sent: Wednesday, January 11, 2017 7:56 AM
To: edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com; Justen, Jordan L <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Leo Duran <leo.duran@amd.com>; Kinney, Michael D <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff <jeff.fan@intel.com>
Subject: [edk2] [PATCH 0/8] IoLib class library
The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate
implementations of I/O Fifo routines. The patch series moves the I/O Fifo
routines into the BaseIoLibIntrinsic library and expands the IoLib class
to include the ported I/O Fifo routines.
The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support IA32
and X64 natively, and other architectures are supported by simply looping
through the basic IoRead/IoWrite routines as appropiate.
The intent of this patch series is twofold:
1) Integrate I/O Fifo routines into the IoLib class library.
2) Allow override of IoLib as may be required to support specific hardware
implementations, such as AMD's Secure Encrypted Virtualization (SEV).
Leo Duran (8):
MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
.../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
.../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
.../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182 ++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179 ++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 ++++++++++++++++++++
.../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
.../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Library/DxeIoLibEsal/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203 +++++++++++++++++++++
OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
22 files changed, 1751 insertions(+), 359 deletions(-)
rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%)
rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%)
rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%)
rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%)
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
--
1.9.1
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-11 1:41 ` [PATCH 0/8] " Gao, Liming
@ 2017-01-11 1:45 ` Fan, Jeff
2017-01-11 1:52 ` Gao, Liming
2017-01-11 3:37 ` Duran, Leo
1 sibling, 1 reply; 25+ messages in thread
From: Fan, Jeff @ 2017-01-11 1:45 UTC (permalink / raw)
To: Gao, Liming, Leo Duran, edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com, Justen, Jordan L, Kinney, Michael D,
lersek@redhat.com
Leo,
I suggest not to add .asm file again. It's hard to maintain in the future, because VS and GCC compile .nasm file by default now.
Liming, any comments?
Thanks!
Jeff
-----Original Message-----
From: Gao, Liming
Sent: Wednesday, January 11, 2017 9:42 AM
To: Leo Duran; edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com; Justen, Jordan L; Kinney, Michael D; lersek@redhat.com; Fan, Jeff
Subject: RE: [edk2] [PATCH 0/8] IoLib class library
Leo:
Thanks for your update. Here is my comments.
1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base on CPU IO service to do FifoIo operation. They don't implement them again.
2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver can be updated to base on FifoIo API for their FifoIo implementation.
3) One coding style issue. We don't assign value to the variable declaration.
UINT8 *Buffer8 = (UINT8 *)Buffer;
==>
UINT8 *Buffer8;
Buffer8 = (UINT8 *)Buffer;
Thanks
Liming
-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Leo Duran
Sent: Wednesday, January 11, 2017 7:56 AM
To: edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com; Justen, Jordan L <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Leo Duran <leo.duran@amd.com>; Kinney, Michael D <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff <jeff.fan@intel.com>
Subject: [edk2] [PATCH 0/8] IoLib class library
The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate implementations of I/O Fifo routines. The patch series moves the I/O Fifo routines into the BaseIoLibIntrinsic library and expands the IoLib class to include the ported I/O Fifo routines.
The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support IA32 and X64 natively, and other architectures are supported by simply looping through the basic IoRead/IoWrite routines as appropiate.
The intent of this patch series is twofold:
1) Integrate I/O Fifo routines into the IoLib class library.
2) Allow override of IoLib as may be required to support specific hardware implementations, such as AMD's Secure Encrypted Virtualization (SEV).
Leo Duran (8):
MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
.../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
.../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
.../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182 ++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179 ++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 ++++++++++++++++++++
.../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
.../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Library/DxeIoLibEsal/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203 +++++++++++++++++++++
OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
22 files changed, 1751 insertions(+), 359 deletions(-) rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
--
1.9.1
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-11 1:45 ` Fan, Jeff
@ 2017-01-11 1:52 ` Gao, Liming
0 siblings, 0 replies; 25+ messages in thread
From: Gao, Liming @ 2017-01-11 1:52 UTC (permalink / raw)
To: Fan, Jeff, Leo Duran, edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com, Justen, Jordan L, Kinney, Michael D,
lersek@redhat.com
Jeff:
This patch moves source files from UefiCpuPkg to MdePkg. .asm and .nasm are not new added ones. So, I suggest to keep them.
Thanks
Liming
-----Original Message-----
From: Fan, Jeff
Sent: Wednesday, January 11, 2017 9:45 AM
To: Gao, Liming <liming.gao@intel.com>; Leo Duran <leo.duran@amd.com>; edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com; Justen, Jordan L <jordan.l.justen@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>; lersek@redhat.com
Subject: RE: [edk2] [PATCH 0/8] IoLib class library
Leo,
I suggest not to add .asm file again. It's hard to maintain in the future, because VS and GCC compile .nasm file by default now.
Liming, any comments?
Thanks!
Jeff
-----Original Message-----
From: Gao, Liming
Sent: Wednesday, January 11, 2017 9:42 AM
To: Leo Duran; edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com; Justen, Jordan L; Kinney, Michael D; lersek@redhat.com; Fan, Jeff
Subject: RE: [edk2] [PATCH 0/8] IoLib class library
Leo:
Thanks for your update. Here is my comments.
1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base on CPU IO service to do FifoIo operation. They don't implement them again.
2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver can be updated to base on FifoIo API for their FifoIo implementation.
3) One coding style issue. We don't assign value to the variable declaration.
UINT8 *Buffer8 = (UINT8 *)Buffer;
==>
UINT8 *Buffer8;
Buffer8 = (UINT8 *)Buffer;
Thanks
Liming
-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Leo Duran
Sent: Wednesday, January 11, 2017 7:56 AM
To: edk2-devel@lists.01.org
Cc: brijesh.singh@amd.com; Justen, Jordan L <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Leo Duran <leo.duran@amd.com>; Kinney, Michael D <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff <jeff.fan@intel.com>
Subject: [edk2] [PATCH 0/8] IoLib class library
The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate implementations of I/O Fifo routines. The patch series moves the I/O Fifo routines into the BaseIoLibIntrinsic library and expands the IoLib class to include the ported I/O Fifo routines.
The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support IA32 and X64 natively, and other architectures are supported by simply looping through the basic IoRead/IoWrite routines as appropiate.
The intent of this patch series is twofold:
1) Integrate I/O Fifo routines into the IoLib class library.
2) Allow override of IoLib as may be required to support specific hardware implementations, such as AMD's Secure Encrypted Virtualization (SEV).
Leo Duran (8):
MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
.../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
.../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
.../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182 ++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179 ++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 ++++++++++++++++++++
.../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
.../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Library/DxeIoLibEsal/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203 +++++++++++++++++++++
MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203 +++++++++++++++++++++
OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
22 files changed, 1751 insertions(+), 359 deletions(-) rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
--
1.9.1
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 0/8] IoLib class library
2017-01-11 1:41 ` [PATCH 0/8] " Gao, Liming
2017-01-11 1:45 ` Fan, Jeff
@ 2017-01-11 3:37 ` Duran, Leo
2017-01-11 4:06 ` Gao, Liming
1 sibling, 1 reply; 25+ messages in thread
From: Duran, Leo @ 2017-01-11 3:37 UTC (permalink / raw)
To: Gao, Liming, edk2-devel@lists.01.org
Cc: Singh, Brijesh, Justen, Jordan L, Kinney, Michael D,
lersek@redhat.com, Fan, Jeff
Liming...
> -----Original Message-----
> From: Gao, Liming [mailto:liming.gao@intel.com]
> Sent: Tuesday, January 10, 2017 7:42 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> <jeff.fan@intel.com>
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Leo:
> Thanks for your update. Here is my comments.
> 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base on CPU
> IO service to do FifoIo operation. They don't implement them again.
> 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver can
> be updated to base on FifoIo API for their FifoIo implementation.
[Duran, Leo] I actually considered that, but the CPU I/O driver does not provide FiFiIo service in its implementation of the EFI_CPU_IO2_PROTOCOL.
The CPU I/O driver does use the Fifo routines internally, and it does so when that caller request IoRead/IoWrite... see the CPU I/O service routines below.
> 3) One coding style issue. We don't assign value to the variable declaration.
> UINT8 *Buffer8 = (UINT8 *)Buffer;
> ==>
> UINT8 *Buffer8;
> Buffer8 = (UINT8 *)Buffer;
[Duran, Leo] OK, I'll change that.
>
> Thanks
> Liming
[Duran, Leo]
EFI_STATUS
EFIAPI
CpuIoServiceRead (
IN EFI_CPU_IO2_PROTOCOL *This,
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
IN UINTN Count,
OUT VOID *Buffer
)
{
EFI_STATUS Status;
UINT8 InStride;
UINT8 OutStride;
EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
UINT8 *Uint8Buffer;
Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Select loop based on the width of the transfer
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
if (InStride == 0) {
switch (OperationWidth) {
case EfiCpuIoWidthUint8:
IoReadFifo8 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
case EfiCpuIoWidthUint16:
IoReadFifo16 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
case EfiCpuIoWidthUint32:
IoReadFifo32 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
default:
//
// The CpuIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
}
}
#endif
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
*Uint8Buffer = IoRead8 ((UINTN)Address);
} else if (OperationWidth == EfiCpuIoWidthUint16) {
*((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
} else if (OperationWidth == EfiCpuIoWidthUint32) {
*((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
}
}
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
CpuIoServiceWrite (
IN EFI_CPU_IO2_PROTOCOL *This,
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
IN UINTN Count,
IN VOID *Buffer
)
{
EFI_STATUS Status;
UINT8 InStride;
UINT8 OutStride;
EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
UINT8 *Uint8Buffer;
//
// Make sure the parameters are valid
//
Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Select loop based on the width of the transfer
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
if (InStride == 0) {
switch (OperationWidth) {
case EfiCpuIoWidthUint8:
IoWriteFifo8 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
case EfiCpuIoWidthUint16:
IoWriteFifo16 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
case EfiCpuIoWidthUint32:
IoWriteFifo32 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
default:
//
// The CpuIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
}
}
#endif
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
IoWrite8 ((UINTN)Address, *Uint8Buffer);
} else if (OperationWidth == EfiCpuIoWidthUint16) {
IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
} else if (OperationWidth == EfiCpuIoWidthUint32) {
IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
}
}
return EFI_SUCCESS;
}
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> Leo Duran
> Sent: Wednesday, January 11, 2017 7:56 AM
> To: edk2-devel@lists.01.org
> Cc: brijesh.singh@amd.com; Justen, Jordan L <jordan.l.justen@intel.com>;
> Gao, Liming <liming.gao@intel.com>; Leo Duran <leo.duran@amd.com>;
> Kinney, Michael D <michael.d.kinney@intel.com>; lersek@redhat.com; Fan,
> Jeff <jeff.fan@intel.com>
> Subject: [edk2] [PATCH 0/8] IoLib class library
>
> The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> duplicate implementations of I/O Fifo routines. The patch series moves the
> I/O Fifo routines into the BaseIoLibIntrinsic library and expands the IoLib class
> to include the ported I/O Fifo routines.
>
> The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support
> IA32 and X64 natively, and other architectures are supported by simply
> looping through the basic IoRead/IoWrite routines as appropiate.
>
> The intent of this patch series is twofold:
> 1) Integrate I/O Fifo routines into the IoLib class library.
> 2) Allow override of IoLib as may be required to support specific hardware
> implementations, such as AMD's Secure Encrypted Virtualization (SEV).
>
> Leo Duran (8):
> MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
> UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
> OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
>
> IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
> +++++++++++++++++++++
> MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
> .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
> MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> ++++++++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> ++++++++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> ++++++++++++++++++++
> .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
> .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
> MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
> +++++++++++++++++++++
> MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
> +++++++++++++++++++++
> MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
> +++++++++++++++++++++
> MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
> +++++++++++++++++++++
> OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
> 22 files changed, 1751 insertions(+), 359 deletions(-) rename
> {UefiCpuPkg/CpuIo2Dxe =>
> MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
> {UefiCpuPkg/CpuIo2Dxe =>
> MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
> {UefiCpuPkg/CpuIo2Dxe =>
> MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
> {UefiCpuPkg/CpuIo2Dxe =>
> MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete mode
> 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> delete mode 100644
> OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
>
> --
> 1.9.1
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-11 3:37 ` Duran, Leo
@ 2017-01-11 4:06 ` Gao, Liming
2017-01-11 16:29 ` Duran, Leo
2017-01-12 0:25 ` Duran, Leo
0 siblings, 2 replies; 25+ messages in thread
From: Gao, Liming @ 2017-01-11 4:06 UTC (permalink / raw)
To: Duran, Leo, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Justen, Jordan L, Singh, Brijesh, Fan, Jeff,
lersek@redhat.com
Leo:
edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases on IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2 library instance IoReadFifo8() implementation can call mCpuIo->Io.Read (mCpuIo, EfiCpuIoWidthFifoUint8, Port, Count, Buffer);
Thanks
Liming
-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Duran, Leo
Sent: Wednesday, January 11, 2017 11:37 AM
To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
Subject: Re: [edk2] [PATCH 0/8] IoLib class library
Liming...
> -----Original Message-----
> From: Gao, Liming [mailto:liming.gao@intel.com]
> Sent: Tuesday, January 10, 2017 7:42 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> <jeff.fan@intel.com>
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Leo:
> Thanks for your update. Here is my comments.
> 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base on CPU
> IO service to do FifoIo operation. They don't implement them again.
> 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver can
> be updated to base on FifoIo API for their FifoIo implementation.
[Duran, Leo] I actually considered that, but the CPU I/O driver does not provide FiFiIo service in its implementation of the EFI_CPU_IO2_PROTOCOL.
The CPU I/O driver does use the Fifo routines internally, and it does so when that caller request IoRead/IoWrite... see the CPU I/O service routines below.
> 3) One coding style issue. We don't assign value to the variable declaration.
> UINT8 *Buffer8 = (UINT8 *)Buffer;
> ==>
> UINT8 *Buffer8;
> Buffer8 = (UINT8 *)Buffer;
[Duran, Leo] OK, I'll change that.
>
> Thanks
> Liming
[Duran, Leo]
EFI_STATUS
EFIAPI
CpuIoServiceRead (
IN EFI_CPU_IO2_PROTOCOL *This,
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
IN UINTN Count,
OUT VOID *Buffer
)
{
EFI_STATUS Status;
UINT8 InStride;
UINT8 OutStride;
EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
UINT8 *Uint8Buffer;
Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Select loop based on the width of the transfer
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
if (InStride == 0) {
switch (OperationWidth) {
case EfiCpuIoWidthUint8:
IoReadFifo8 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
case EfiCpuIoWidthUint16:
IoReadFifo16 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
case EfiCpuIoWidthUint32:
IoReadFifo32 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
default:
//
// The CpuIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
}
}
#endif
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
*Uint8Buffer = IoRead8 ((UINTN)Address);
} else if (OperationWidth == EfiCpuIoWidthUint16) {
*((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
} else if (OperationWidth == EfiCpuIoWidthUint32) {
*((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
}
}
return EFI_SUCCESS;
}
EFI_STATUS
EFIAPI
CpuIoServiceWrite (
IN EFI_CPU_IO2_PROTOCOL *This,
IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
IN UINTN Count,
IN VOID *Buffer
)
{
EFI_STATUS Status;
UINT8 InStride;
UINT8 OutStride;
EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
UINT8 *Uint8Buffer;
//
// Make sure the parameters are valid
//
Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Select loop based on the width of the transfer
//
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
if (InStride == 0) {
switch (OperationWidth) {
case EfiCpuIoWidthUint8:
IoWriteFifo8 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
case EfiCpuIoWidthUint16:
IoWriteFifo16 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
case EfiCpuIoWidthUint32:
IoWriteFifo32 ((UINTN)Address, Count, Buffer);
return EFI_SUCCESS;
default:
//
// The CpuIoCheckParameter call above will ensure that this
// path is not taken.
//
ASSERT (FALSE);
break;
}
}
#endif
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
IoWrite8 ((UINTN)Address, *Uint8Buffer);
} else if (OperationWidth == EfiCpuIoWidthUint16) {
IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
} else if (OperationWidth == EfiCpuIoWidthUint32) {
IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
}
}
return EFI_SUCCESS;
}
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> Leo Duran
> Sent: Wednesday, January 11, 2017 7:56 AM
> To: edk2-devel@lists.01.org
> Cc: brijesh.singh@amd.com; Justen, Jordan L <jordan.l.justen@intel.com>;
> Gao, Liming <liming.gao@intel.com>; Leo Duran <leo.duran@amd.com>;
> Kinney, Michael D <michael.d.kinney@intel.com>; lersek@redhat.com; Fan,
> Jeff <jeff.fan@intel.com>
> Subject: [edk2] [PATCH 0/8] IoLib class library
>
> The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> duplicate implementations of I/O Fifo routines. The patch series moves the
> I/O Fifo routines into the BaseIoLibIntrinsic library and expands the IoLib class
> to include the ported I/O Fifo routines.
>
> The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support
> IA32 and X64 natively, and other architectures are supported by simply
> looping through the basic IoRead/IoWrite routines as appropiate.
>
> The intent of this patch series is twofold:
> 1) Integrate I/O Fifo routines into the IoLib class library.
> 2) Allow override of IoLib as may be required to support specific hardware
> implementations, such as AMD's Secure Encrypted Virtualization (SEV).
>
> Leo Duran (8):
> MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
> UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
> OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
>
> IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
> +++++++++++++++++++++
> MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
> .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
> MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> ++++++++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> ++++++++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> ++++++++++++++++++++
> .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
> .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
> MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
> +++++++++++++++++++++
> MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
> +++++++++++++++++++++
> MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
> +++++++++++++++++++++
> MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
> +++++++++++++++++++++
> OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
> 22 files changed, 1751 insertions(+), 359 deletions(-) rename
> {UefiCpuPkg/CpuIo2Dxe =>
> MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
> {UefiCpuPkg/CpuIo2Dxe =>
> MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
> {UefiCpuPkg/CpuIo2Dxe =>
> MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
> {UefiCpuPkg/CpuIo2Dxe =>
> MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete mode
> 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> delete mode 100644
> OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
>
> --
> 1.9.1
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-11 4:06 ` Gao, Liming
@ 2017-01-11 16:29 ` Duran, Leo
2017-01-12 1:22 ` Gao, Liming
2017-01-12 0:25 ` Duran, Leo
1 sibling, 1 reply; 25+ messages in thread
From: Duran, Leo @ 2017-01-11 16:29 UTC (permalink / raw)
To: Gao, Liming, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Justen, Jordan L, Singh, Brijesh, Fan, Jeff,
lersek@redhat.com
Liming,
However, here are some issues with trying to use Fifo types via the I/O protocol:
1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo types:
//
// For FIFO type, the target address won't increase during the access,
// so treat Count as 1
//
if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
Count = 1;
}
2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are eliminated/truncated:
//
// Check to see if Width is in the valid range for I/O Port operations
//
Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
return EFI_INVALID_PARAMETER;
}
3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite():
OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, and EfiCpuIoWidthUint32
So the Fifo types are not serviced.
> -----Original Message-----
> From: Gao, Liming [mailto:liming.gao@intel.com]
> Sent: Tuesday, January 10, 2017 10:07 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Leo:
> edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases on
> IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2 library
> instance IoReadFifo8() implementation can call mCpuIo->Io.Read (mCpuIo,
> EfiCpuIoWidthFifoUint8, Port, Count, Buffer);
>
> Thanks
> Liming
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> Duran, Leo
> Sent: Wednesday, January 11, 2017 11:37 AM
> To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: Re: [edk2] [PATCH 0/8] IoLib class library
>
> Liming...
>
> > -----Original Message-----
> > From: Gao, Liming [mailto:liming.gao@intel.com]
> > Sent: Tuesday, January 10, 2017 7:42 PM
> > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > <jeff.fan@intel.com>
> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >
> > Leo:
> > Thanks for your update. Here is my comments.
> > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base
> > on CPU IO service to do FifoIo operation. They don't implement them
> again.
> > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver
> can
> > be updated to base on FifoIo API for their FifoIo implementation.
>
> [Duran, Leo] I actually considered that, but the CPU I/O driver does not
> provide FiFiIo service in its implementation of the EFI_CPU_IO2_PROTOCOL.
> The CPU I/O driver does use the Fifo routines internally, and it does so when
> that caller request IoRead/IoWrite... see the CPU I/O service routines below.
>
> > 3) One coding style issue. We don't assign value to the variable declaration.
> > UINT8 *Buffer8 = (UINT8 *)Buffer;
> > ==>
> > UINT8 *Buffer8;
> > Buffer8 = (UINT8 *)Buffer;
>
> [Duran, Leo] OK, I'll change that.
>
> >
> > Thanks
> > Liming
> [Duran, Leo]
>
> EFI_STATUS
> EFIAPI
> CpuIoServiceRead (
> IN EFI_CPU_IO2_PROTOCOL *This,
> IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> IN UINT64 Address,
> IN UINTN Count,
> OUT VOID *Buffer
> )
> {
> EFI_STATUS Status;
> UINT8 InStride;
> UINT8 OutStride;
> EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> UINT8 *Uint8Buffer;
>
> Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> if (EFI_ERROR (Status)) {
> return Status;
> }
>
> //
> // Select loop based on the width of the transfer
> //
> InStride = mInStride[Width];
> OutStride = mOutStride[Width];
> OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>
> #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> if (InStride == 0) {
> switch (OperationWidth) {
> case EfiCpuIoWidthUint8:
> IoReadFifo8 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> case EfiCpuIoWidthUint16:
> IoReadFifo16 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> case EfiCpuIoWidthUint32:
> IoReadFifo32 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> default:
> //
> // The CpuIoCheckParameter call above will ensure that this
> // path is not taken.
> //
> ASSERT (FALSE);
> break;
> }
> }
> #endif
>
> for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer +=
> OutStride, Count--) {
> if (OperationWidth == EfiCpuIoWidthUint8) {
> *Uint8Buffer = IoRead8 ((UINTN)Address);
> } else if (OperationWidth == EfiCpuIoWidthUint16) {
> *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
> } else if (OperationWidth == EfiCpuIoWidthUint32) {
> *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
> }
> }
>
> return EFI_SUCCESS;
> }
>
> EFI_STATUS
> EFIAPI
> CpuIoServiceWrite (
> IN EFI_CPU_IO2_PROTOCOL *This,
> IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> IN UINT64 Address,
> IN UINTN Count,
> IN VOID *Buffer
> )
> {
> EFI_STATUS Status;
> UINT8 InStride;
> UINT8 OutStride;
> EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> UINT8 *Uint8Buffer;
>
> //
> // Make sure the parameters are valid
> //
> Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> if (EFI_ERROR (Status)) {
> return Status;
> }
>
> //
> // Select loop based on the width of the transfer
> //
> InStride = mInStride[Width];
> OutStride = mOutStride[Width];
> OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>
> #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> if (InStride == 0) {
> switch (OperationWidth) {
> case EfiCpuIoWidthUint8:
> IoWriteFifo8 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> case EfiCpuIoWidthUint16:
> IoWriteFifo16 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> case EfiCpuIoWidthUint32:
> IoWriteFifo32 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> default:
> //
> // The CpuIoCheckParameter call above will ensure that this
> // path is not taken.
> //
> ASSERT (FALSE);
> break;
> }
> }
> #endif
>
> for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride,
> Uint8Buffer += OutStride, Count--) {
> if (OperationWidth == EfiCpuIoWidthUint8) {
> IoWrite8 ((UINTN)Address, *Uint8Buffer);
> } else if (OperationWidth == EfiCpuIoWidthUint16) {
> IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
> } else if (OperationWidth == EfiCpuIoWidthUint32) {
> IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
> }
> }
>
> return EFI_SUCCESS;
> }
> > -----Original Message-----
> > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> > Leo Duran
> > Sent: Wednesday, January 11, 2017 7:56 AM
> > To: edk2-devel@lists.01.org
> > Cc: brijesh.singh@amd.com; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Leo
> > Duran <leo.duran@amd.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > <jeff.fan@intel.com>
> > Subject: [edk2] [PATCH 0/8] IoLib class library
> >
> > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> > duplicate implementations of I/O Fifo routines. The patch series moves
> > the I/O Fifo routines into the BaseIoLibIntrinsic library and expands
> > the IoLib class to include the ported I/O Fifo routines.
> >
> > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support
> > IA32 and X64 natively, and other architectures are supported by simply
> > looping through the basic IoRead/IoWrite routines as appropiate.
> >
> > The intent of this patch series is twofold:
> > 1) Integrate I/O Fifo routines into the IoLib class library.
> > 2) Allow override of IoLib as may be required to support specific
> > hardware implementations, such as AMD's Secure Encrypted Virtualization
> (SEV).
> >
> > Leo Duran (8):
> > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
> > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
> > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
> >
> > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
> > +++++++++++++++++++++
> > MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
> > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
> > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> > ++++++++++++++++++
> > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> > ++++++++++++++++++
> > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> > ++++++++++++++++++++
> > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
> > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
> > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
> > +++++++++++++++++++++
> > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
> > +++++++++++++++++++++
> > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
> > +++++++++++++++++++++
> > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
> > +++++++++++++++++++++
> > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
> > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
> > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
> > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
> > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
> > 22 files changed, 1751 insertions(+), 359 deletions(-) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete mode
> > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> > delete mode 100644
> > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
> >
> > --
> > 1.9.1
> >
> > _______________________________________________
> > edk2-devel mailing list
> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-11 16:29 ` Duran, Leo
@ 2017-01-12 1:22 ` Gao, Liming
2017-01-12 1:34 ` Duran, Leo
0 siblings, 1 reply; 25+ messages in thread
From: Gao, Liming @ 2017-01-12 1:22 UTC (permalink / raw)
To: Duran, Leo, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Justen, Jordan L, Singh, Brijesh, Fan, Jeff,
lersek@redhat.com
Leo:
CpuIo2Dxe supports FifoIo operation, because original logic includes FifoIo implementation. CpuIoCheckParameter() checks the parameter, doesn't performance operation. And, 64bit IO operation is not supported. You add three APIs for 8, 16 and 32 Io operation. So, there is no lose functionality. Last, OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); It still supports all Width.
Besides, I understand your work scope for IO library update. You can focus on my comment 1. If you have no bandwidth, you can submit bugzillar for comment 2 to update PeiCpuIo and DxeCpuIo driver to base on IoLib to implement FifoIo APIs.
Thanks
Liming
-----Original Message-----
From: Duran, Leo [mailto:leo.duran@amd.com]
Sent: Thursday, January 12, 2017 12:29 AM
To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
Subject: RE: [edk2] [PATCH 0/8] IoLib class library
Liming,
However, here are some issues with trying to use Fifo types via the I/O protocol:
1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo types:
//
// For FIFO type, the target address won't increase during the access,
// so treat Count as 1
//
if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) {
Count = 1;
}
2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are eliminated/truncated:
//
// Check to see if Width is in the valid range for I/O Port operations
//
Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
return EFI_INVALID_PARAMETER;
}
3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite():
OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, and EfiCpuIoWidthUint32
So the Fifo types are not serviced.
> -----Original Message-----
> From: Gao, Liming [mailto:liming.gao@intel.com]
> Sent: Tuesday, January 10, 2017 10:07 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Leo:
> edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases on
> IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2 library
> instance IoReadFifo8() implementation can call mCpuIo->Io.Read (mCpuIo,
> EfiCpuIoWidthFifoUint8, Port, Count, Buffer);
>
> Thanks
> Liming
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> Duran, Leo
> Sent: Wednesday, January 11, 2017 11:37 AM
> To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: Re: [edk2] [PATCH 0/8] IoLib class library
>
> Liming...
>
> > -----Original Message-----
> > From: Gao, Liming [mailto:liming.gao@intel.com]
> > Sent: Tuesday, January 10, 2017 7:42 PM
> > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > <jeff.fan@intel.com>
> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >
> > Leo:
> > Thanks for your update. Here is my comments.
> > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base
> > on CPU IO service to do FifoIo operation. They don't implement them
> again.
> > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver
> can
> > be updated to base on FifoIo API for their FifoIo implementation.
>
> [Duran, Leo] I actually considered that, but the CPU I/O driver does not
> provide FiFiIo service in its implementation of the EFI_CPU_IO2_PROTOCOL.
> The CPU I/O driver does use the Fifo routines internally, and it does so when
> that caller request IoRead/IoWrite... see the CPU I/O service routines below.
>
> > 3) One coding style issue. We don't assign value to the variable declaration.
> > UINT8 *Buffer8 = (UINT8 *)Buffer;
> > ==>
> > UINT8 *Buffer8;
> > Buffer8 = (UINT8 *)Buffer;
>
> [Duran, Leo] OK, I'll change that.
>
> >
> > Thanks
> > Liming
> [Duran, Leo]
>
> EFI_STATUS
> EFIAPI
> CpuIoServiceRead (
> IN EFI_CPU_IO2_PROTOCOL *This,
> IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> IN UINT64 Address,
> IN UINTN Count,
> OUT VOID *Buffer
> )
> {
> EFI_STATUS Status;
> UINT8 InStride;
> UINT8 OutStride;
> EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> UINT8 *Uint8Buffer;
>
> Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> if (EFI_ERROR (Status)) {
> return Status;
> }
>
> //
> // Select loop based on the width of the transfer
> //
> InStride = mInStride[Width];
> OutStride = mOutStride[Width];
> OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>
> #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> if (InStride == 0) {
> switch (OperationWidth) {
> case EfiCpuIoWidthUint8:
> IoReadFifo8 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> case EfiCpuIoWidthUint16:
> IoReadFifo16 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> case EfiCpuIoWidthUint32:
> IoReadFifo32 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> default:
> //
> // The CpuIoCheckParameter call above will ensure that this
> // path is not taken.
> //
> ASSERT (FALSE);
> break;
> }
> }
> #endif
>
> for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer +=
> OutStride, Count--) {
> if (OperationWidth == EfiCpuIoWidthUint8) {
> *Uint8Buffer = IoRead8 ((UINTN)Address);
> } else if (OperationWidth == EfiCpuIoWidthUint16) {
> *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
> } else if (OperationWidth == EfiCpuIoWidthUint32) {
> *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
> }
> }
>
> return EFI_SUCCESS;
> }
>
> EFI_STATUS
> EFIAPI
> CpuIoServiceWrite (
> IN EFI_CPU_IO2_PROTOCOL *This,
> IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> IN UINT64 Address,
> IN UINTN Count,
> IN VOID *Buffer
> )
> {
> EFI_STATUS Status;
> UINT8 InStride;
> UINT8 OutStride;
> EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> UINT8 *Uint8Buffer;
>
> //
> // Make sure the parameters are valid
> //
> Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> if (EFI_ERROR (Status)) {
> return Status;
> }
>
> //
> // Select loop based on the width of the transfer
> //
> InStride = mInStride[Width];
> OutStride = mOutStride[Width];
> OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>
> #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> if (InStride == 0) {
> switch (OperationWidth) {
> case EfiCpuIoWidthUint8:
> IoWriteFifo8 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> case EfiCpuIoWidthUint16:
> IoWriteFifo16 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> case EfiCpuIoWidthUint32:
> IoWriteFifo32 ((UINTN)Address, Count, Buffer);
> return EFI_SUCCESS;
> default:
> //
> // The CpuIoCheckParameter call above will ensure that this
> // path is not taken.
> //
> ASSERT (FALSE);
> break;
> }
> }
> #endif
>
> for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride,
> Uint8Buffer += OutStride, Count--) {
> if (OperationWidth == EfiCpuIoWidthUint8) {
> IoWrite8 ((UINTN)Address, *Uint8Buffer);
> } else if (OperationWidth == EfiCpuIoWidthUint16) {
> IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
> } else if (OperationWidth == EfiCpuIoWidthUint32) {
> IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
> }
> }
>
> return EFI_SUCCESS;
> }
> > -----Original Message-----
> > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> > Leo Duran
> > Sent: Wednesday, January 11, 2017 7:56 AM
> > To: edk2-devel@lists.01.org
> > Cc: brijesh.singh@amd.com; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Leo
> > Duran <leo.duran@amd.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > <jeff.fan@intel.com>
> > Subject: [edk2] [PATCH 0/8] IoLib class library
> >
> > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> > duplicate implementations of I/O Fifo routines. The patch series moves
> > the I/O Fifo routines into the BaseIoLibIntrinsic library and expands
> > the IoLib class to include the ported I/O Fifo routines.
> >
> > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support
> > IA32 and X64 natively, and other architectures are supported by simply
> > looping through the basic IoRead/IoWrite routines as appropiate.
> >
> > The intent of this patch series is twofold:
> > 1) Integrate I/O Fifo routines into the IoLib class library.
> > 2) Allow override of IoLib as may be required to support specific
> > hardware implementations, such as AMD's Secure Encrypted Virtualization
> (SEV).
> >
> > Leo Duran (8):
> > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
> > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
> > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
> >
> > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
> > +++++++++++++++++++++
> > MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
> > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
> > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> > ++++++++++++++++++
> > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> > ++++++++++++++++++
> > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> > ++++++++++++++++++++
> > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
> > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
> > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
> > +++++++++++++++++++++
> > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
> > +++++++++++++++++++++
> > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
> > +++++++++++++++++++++
> > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
> > +++++++++++++++++++++
> > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
> > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
> > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
> > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
> > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
> > 22 files changed, 1751 insertions(+), 359 deletions(-) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete mode
> > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> > delete mode 100644
> > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
> >
> > --
> > 1.9.1
> >
> > _______________________________________________
> > edk2-devel mailing list
> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-12 1:22 ` Gao, Liming
@ 2017-01-12 1:34 ` Duran, Leo
2017-01-12 1:39 ` Gao, Liming
0 siblings, 1 reply; 25+ messages in thread
From: Duran, Leo @ 2017-01-12 1:34 UTC (permalink / raw)
To: Gao, Liming, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Justen, Jordan L, Singh, Brijesh, Fan, Jeff,
lersek@redhat.com
How about this instead:
1) I submit a "v2" to take care of the code-style issue, while making all instances of IoLib fully functional & complaint with the complete IoLib API.
2) At a later time (soon, I promise), I submit a patch for CpuIo2Dxe to properly support FiFo types and also rework the IoLib instances to use EfiCpuIoWidthFifoUint#.
Is that a deal?
Leo
> -----Original Message-----
> From: Gao, Liming [mailto:liming.gao@intel.com]
> Sent: Wednesday, January 11, 2017 7:22 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Leo:
> CpuIo2Dxe supports FifoIo operation, because original logic includes FifoIo
> implementation. CpuIoCheckParameter() checks the parameter, doesn't
> performance operation. And, 64bit IO operation is not supported. You add
> three APIs for 8, 16 and 32 Io operation. So, there is no lose functionality.
> Last, OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); It
> still supports all Width.
>
> Besides, I understand your work scope for IO library update. You can focus
> on my comment 1. If you have no bandwidth, you can submit bugzillar for
> comment 2 to update PeiCpuIo and DxeCpuIo driver to base on IoLib to
> implement FifoIo APIs.
>
> Thanks
> Liming
> -----Original Message-----
> From: Duran, Leo [mailto:leo.duran@amd.com]
> Sent: Thursday, January 12, 2017 12:29 AM
> To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Liming,
>
> However, here are some issues with trying to use Fifo types via the I/O
> protocol:
> 1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo types:
> //
> // For FIFO type, the target address won't increase during the access,
> // so treat Count as 1
> //
> if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64)
> {
> Count = 1;
> }
>
> 2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are
> eliminated/truncated:
> //
> // Check to see if Width is in the valid range for I/O Port operations
> //
> Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
> return EFI_INVALID_PARAMETER;
> }
>
> 3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite():
> OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8,
> EfiCpuIoWidthUint16, and EfiCpuIoWidthUint32 So the Fifo types are not
> serviced.
>
>
> > -----Original Message-----
> > From: Gao, Liming [mailto:liming.gao@intel.com]
> > Sent: Tuesday, January 10, 2017 10:07 PM
> > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >
> > Leo:
> > edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases on
> > IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2
> > library instance IoReadFifo8() implementation can call mCpuIo->Io.Read
> > (mCpuIo, EfiCpuIoWidthFifoUint8, Port, Count, Buffer);
> >
> > Thanks
> > Liming
> > -----Original Message-----
> > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> > Duran, Leo
> > Sent: Wednesday, January 11, 2017 11:37 AM
> > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > Subject: Re: [edk2] [PATCH 0/8] IoLib class library
> >
> > Liming...
> >
> > > -----Original Message-----
> > > From: Gao, Liming [mailto:liming.gao@intel.com]
> > > Sent: Tuesday, January 10, 2017 7:42 PM
> > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > > Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> > > <jordan.l.justen@intel.com>; Kinney, Michael D
> > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > > <jeff.fan@intel.com>
> > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> > >
> > > Leo:
> > > Thanks for your update. Here is my comments.
> > > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base
> > > on CPU IO service to do FifoIo operation. They don't implement them
> > again.
> > > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver
> > can
> > > be updated to base on FifoIo API for their FifoIo implementation.
> >
> > [Duran, Leo] I actually considered that, but the CPU I/O driver does
> > not provide FiFiIo service in its implementation of the
> EFI_CPU_IO2_PROTOCOL.
> > The CPU I/O driver does use the Fifo routines internally, and it does
> > so when that caller request IoRead/IoWrite... see the CPU I/O service
> routines below.
> >
> > > 3) One coding style issue. We don't assign value to the variable
> declaration.
> > > UINT8 *Buffer8 = (UINT8 *)Buffer;
> > > ==>
> > > UINT8 *Buffer8;
> > > Buffer8 = (UINT8 *)Buffer;
> >
> > [Duran, Leo] OK, I'll change that.
> >
> > >
> > > Thanks
> > > Liming
> > [Duran, Leo]
> >
> > EFI_STATUS
> > EFIAPI
> > CpuIoServiceRead (
> > IN EFI_CPU_IO2_PROTOCOL *This,
> > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> > IN UINT64 Address,
> > IN UINTN Count,
> > OUT VOID *Buffer
> > )
> > {
> > EFI_STATUS Status;
> > UINT8 InStride;
> > UINT8 OutStride;
> > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> > UINT8 *Uint8Buffer;
> >
> > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> > if (EFI_ERROR (Status)) {
> > return Status;
> > }
> >
> > //
> > // Select loop based on the width of the transfer
> > //
> > InStride = mInStride[Width];
> > OutStride = mOutStride[Width];
> > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >
> > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> > if (InStride == 0) {
> > switch (OperationWidth) {
> > case EfiCpuIoWidthUint8:
> > IoReadFifo8 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint16:
> > IoReadFifo16 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint32:
> > IoReadFifo32 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > default:
> > //
> > // The CpuIoCheckParameter call above will ensure that this
> > // path is not taken.
> > //
> > ASSERT (FALSE);
> > break;
> > }
> > }
> > #endif
> >
> > for (Uint8Buffer = Buffer; Count > 0; Address += InStride,
> > Uint8Buffer += OutStride, Count--) {
> > if (OperationWidth == EfiCpuIoWidthUint8) {
> > *Uint8Buffer = IoRead8 ((UINTN)Address);
> > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> > *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
> > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> > *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
> > }
> > }
> >
> > return EFI_SUCCESS;
> > }
> >
> > EFI_STATUS
> > EFIAPI
> > CpuIoServiceWrite (
> > IN EFI_CPU_IO2_PROTOCOL *This,
> > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> > IN UINT64 Address,
> > IN UINTN Count,
> > IN VOID *Buffer
> > )
> > {
> > EFI_STATUS Status;
> > UINT8 InStride;
> > UINT8 OutStride;
> > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> > UINT8 *Uint8Buffer;
> >
> > //
> > // Make sure the parameters are valid
> > //
> > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> > if (EFI_ERROR (Status)) {
> > return Status;
> > }
> >
> > //
> > // Select loop based on the width of the transfer
> > //
> > InStride = mInStride[Width];
> > OutStride = mOutStride[Width];
> > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >
> > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> > if (InStride == 0) {
> > switch (OperationWidth) {
> > case EfiCpuIoWidthUint8:
> > IoWriteFifo8 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint16:
> > IoWriteFifo16 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint32:
> > IoWriteFifo32 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > default:
> > //
> > // The CpuIoCheckParameter call above will ensure that this
> > // path is not taken.
> > //
> > ASSERT (FALSE);
> > break;
> > }
> > }
> > #endif
> >
> > for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride,
> > Uint8Buffer += OutStride, Count--) {
> > if (OperationWidth == EfiCpuIoWidthUint8) {
> > IoWrite8 ((UINTN)Address, *Uint8Buffer);
> > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> > IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
> > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> > IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
> > }
> > }
> >
> > return EFI_SUCCESS;
> > }
> > > -----Original Message-----
> > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf
> > > Of Leo Duran
> > > Sent: Wednesday, January 11, 2017 7:56 AM
> > > To: edk2-devel@lists.01.org
> > > Cc: brijesh.singh@amd.com; Justen, Jordan L
> > > <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Leo
> > > Duran <leo.duran@amd.com>; Kinney, Michael D
> > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > > <jeff.fan@intel.com>
> > > Subject: [edk2] [PATCH 0/8] IoLib class library
> > >
> > > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> > > duplicate implementations of I/O Fifo routines. The patch series
> > > moves the I/O Fifo routines into the BaseIoLibIntrinsic library and
> > > expands the IoLib class to include the ported I/O Fifo routines.
> > >
> > > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support
> > > IA32 and X64 natively, and other architectures are supported by
> > > simply looping through the basic IoRead/IoWrite routines as appropiate.
> > >
> > > The intent of this patch series is twofold:
> > > 1) Integrate I/O Fifo routines into the IoLib class library.
> > > 2) Allow override of IoLib as may be required to support specific
> > > hardware implementations, such as AMD's Secure Encrypted
> > > Virtualization
> > (SEV).
> > >
> > > Leo Duran (8):
> > > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> > > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> > > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> > > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> > > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> > > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
> > > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
> > > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
> > >
> > > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> > > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
> > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
> > > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> > > ++++++++++++++++++
> > > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> > > ++++++++++++++++++
> > > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> > > ++++++++++++++++++++
> > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
> > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
> > > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
> > > +++++++++++++++++++++
> > > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
> > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
> > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
> > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
> > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> > > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
> > > 22 files changed, 1751 insertions(+), 359 deletions(-) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete
> > > mode
> > > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> > > delete mode 100644
> > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> > > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
> > >
> > > --
> > > 1.9.1
> > >
> > > _______________________________________________
> > > edk2-devel mailing list
> > > edk2-devel@lists.01.org
> > > https://lists.01.org/mailman/listinfo/edk2-devel
> > _______________________________________________
> > edk2-devel mailing list
> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-12 1:34 ` Duran, Leo
@ 2017-01-12 1:39 ` Gao, Liming
2017-01-12 1:51 ` Duran, Leo
0 siblings, 1 reply; 25+ messages in thread
From: Gao, Liming @ 2017-01-12 1:39 UTC (permalink / raw)
To: Duran, Leo, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Justen, Jordan L, Singh, Brijesh, Fan, Jeff,
lersek@redhat.com
Leo:
I suggest you rework IoLib instances PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance first. Then, later you only need to change CpuIo PEIM and driver, don't need to change library instances again.
Thanks
Liming
-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Duran, Leo
Sent: Thursday, January 12, 2017 9:35 AM
To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
Subject: Re: [edk2] [PATCH 0/8] IoLib class library
How about this instead:
1) I submit a "v2" to take care of the code-style issue, while making all instances of IoLib fully functional & complaint with the complete IoLib API.
2) At a later time (soon, I promise), I submit a patch for CpuIo2Dxe to properly support FiFo types and also rework the IoLib instances to use EfiCpuIoWidthFifoUint#.
Is that a deal?
Leo
> -----Original Message-----
> From: Gao, Liming [mailto:liming.gao@intel.com]
> Sent: Wednesday, January 11, 2017 7:22 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Leo:
> CpuIo2Dxe supports FifoIo operation, because original logic includes FifoIo
> implementation. CpuIoCheckParameter() checks the parameter, doesn't
> performance operation. And, 64bit IO operation is not supported. You add
> three APIs for 8, 16 and 32 Io operation. So, there is no lose functionality.
> Last, OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); It
> still supports all Width.
>
> Besides, I understand your work scope for IO library update. You can focus
> on my comment 1. If you have no bandwidth, you can submit bugzillar for
> comment 2 to update PeiCpuIo and DxeCpuIo driver to base on IoLib to
> implement FifoIo APIs.
>
> Thanks
> Liming
> -----Original Message-----
> From: Duran, Leo [mailto:leo.duran@amd.com]
> Sent: Thursday, January 12, 2017 12:29 AM
> To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Liming,
>
> However, here are some issues with trying to use Fifo types via the I/O
> protocol:
> 1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo types:
> //
> // For FIFO type, the target address won't increase during the access,
> // so treat Count as 1
> //
> if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64)
> {
> Count = 1;
> }
>
> 2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are
> eliminated/truncated:
> //
> // Check to see if Width is in the valid range for I/O Port operations
> //
> Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
> return EFI_INVALID_PARAMETER;
> }
>
> 3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite():
> OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8,
> EfiCpuIoWidthUint16, and EfiCpuIoWidthUint32 So the Fifo types are not
> serviced.
>
>
> > -----Original Message-----
> > From: Gao, Liming [mailto:liming.gao@intel.com]
> > Sent: Tuesday, January 10, 2017 10:07 PM
> > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >
> > Leo:
> > edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases on
> > IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2
> > library instance IoReadFifo8() implementation can call mCpuIo->Io.Read
> > (mCpuIo, EfiCpuIoWidthFifoUint8, Port, Count, Buffer);
> >
> > Thanks
> > Liming
> > -----Original Message-----
> > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> > Duran, Leo
> > Sent: Wednesday, January 11, 2017 11:37 AM
> > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > Subject: Re: [edk2] [PATCH 0/8] IoLib class library
> >
> > Liming...
> >
> > > -----Original Message-----
> > > From: Gao, Liming [mailto:liming.gao@intel.com]
> > > Sent: Tuesday, January 10, 2017 7:42 PM
> > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > > Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> > > <jordan.l.justen@intel.com>; Kinney, Michael D
> > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > > <jeff.fan@intel.com>
> > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> > >
> > > Leo:
> > > Thanks for your update. Here is my comments.
> > > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base
> > > on CPU IO service to do FifoIo operation. They don't implement them
> > again.
> > > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver
> > can
> > > be updated to base on FifoIo API for their FifoIo implementation.
> >
> > [Duran, Leo] I actually considered that, but the CPU I/O driver does
> > not provide FiFiIo service in its implementation of the
> EFI_CPU_IO2_PROTOCOL.
> > The CPU I/O driver does use the Fifo routines internally, and it does
> > so when that caller request IoRead/IoWrite... see the CPU I/O service
> routines below.
> >
> > > 3) One coding style issue. We don't assign value to the variable
> declaration.
> > > UINT8 *Buffer8 = (UINT8 *)Buffer;
> > > ==>
> > > UINT8 *Buffer8;
> > > Buffer8 = (UINT8 *)Buffer;
> >
> > [Duran, Leo] OK, I'll change that.
> >
> > >
> > > Thanks
> > > Liming
> > [Duran, Leo]
> >
> > EFI_STATUS
> > EFIAPI
> > CpuIoServiceRead (
> > IN EFI_CPU_IO2_PROTOCOL *This,
> > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> > IN UINT64 Address,
> > IN UINTN Count,
> > OUT VOID *Buffer
> > )
> > {
> > EFI_STATUS Status;
> > UINT8 InStride;
> > UINT8 OutStride;
> > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> > UINT8 *Uint8Buffer;
> >
> > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> > if (EFI_ERROR (Status)) {
> > return Status;
> > }
> >
> > //
> > // Select loop based on the width of the transfer
> > //
> > InStride = mInStride[Width];
> > OutStride = mOutStride[Width];
> > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >
> > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> > if (InStride == 0) {
> > switch (OperationWidth) {
> > case EfiCpuIoWidthUint8:
> > IoReadFifo8 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint16:
> > IoReadFifo16 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint32:
> > IoReadFifo32 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > default:
> > //
> > // The CpuIoCheckParameter call above will ensure that this
> > // path is not taken.
> > //
> > ASSERT (FALSE);
> > break;
> > }
> > }
> > #endif
> >
> > for (Uint8Buffer = Buffer; Count > 0; Address += InStride,
> > Uint8Buffer += OutStride, Count--) {
> > if (OperationWidth == EfiCpuIoWidthUint8) {
> > *Uint8Buffer = IoRead8 ((UINTN)Address);
> > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> > *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
> > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> > *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
> > }
> > }
> >
> > return EFI_SUCCESS;
> > }
> >
> > EFI_STATUS
> > EFIAPI
> > CpuIoServiceWrite (
> > IN EFI_CPU_IO2_PROTOCOL *This,
> > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> > IN UINT64 Address,
> > IN UINTN Count,
> > IN VOID *Buffer
> > )
> > {
> > EFI_STATUS Status;
> > UINT8 InStride;
> > UINT8 OutStride;
> > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> > UINT8 *Uint8Buffer;
> >
> > //
> > // Make sure the parameters are valid
> > //
> > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> > if (EFI_ERROR (Status)) {
> > return Status;
> > }
> >
> > //
> > // Select loop based on the width of the transfer
> > //
> > InStride = mInStride[Width];
> > OutStride = mOutStride[Width];
> > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >
> > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> > if (InStride == 0) {
> > switch (OperationWidth) {
> > case EfiCpuIoWidthUint8:
> > IoWriteFifo8 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint16:
> > IoWriteFifo16 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint32:
> > IoWriteFifo32 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > default:
> > //
> > // The CpuIoCheckParameter call above will ensure that this
> > // path is not taken.
> > //
> > ASSERT (FALSE);
> > break;
> > }
> > }
> > #endif
> >
> > for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride,
> > Uint8Buffer += OutStride, Count--) {
> > if (OperationWidth == EfiCpuIoWidthUint8) {
> > IoWrite8 ((UINTN)Address, *Uint8Buffer);
> > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> > IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
> > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> > IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
> > }
> > }
> >
> > return EFI_SUCCESS;
> > }
> > > -----Original Message-----
> > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf
> > > Of Leo Duran
> > > Sent: Wednesday, January 11, 2017 7:56 AM
> > > To: edk2-devel@lists.01.org
> > > Cc: brijesh.singh@amd.com; Justen, Jordan L
> > > <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Leo
> > > Duran <leo.duran@amd.com>; Kinney, Michael D
> > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > > <jeff.fan@intel.com>
> > > Subject: [edk2] [PATCH 0/8] IoLib class library
> > >
> > > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> > > duplicate implementations of I/O Fifo routines. The patch series
> > > moves the I/O Fifo routines into the BaseIoLibIntrinsic library and
> > > expands the IoLib class to include the ported I/O Fifo routines.
> > >
> > > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support
> > > IA32 and X64 natively, and other architectures are supported by
> > > simply looping through the basic IoRead/IoWrite routines as appropiate.
> > >
> > > The intent of this patch series is twofold:
> > > 1) Integrate I/O Fifo routines into the IoLib class library.
> > > 2) Allow override of IoLib as may be required to support specific
> > > hardware implementations, such as AMD's Secure Encrypted
> > > Virtualization
> > (SEV).
> > >
> > > Leo Duran (8):
> > > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> > > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> > > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> > > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> > > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> > > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
> > > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
> > > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
> > >
> > > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> > > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
> > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
> > > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> > > ++++++++++++++++++
> > > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> > > ++++++++++++++++++
> > > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> > > ++++++++++++++++++++
> > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
> > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
> > > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
> > > +++++++++++++++++++++
> > > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
> > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
> > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
> > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
> > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> > > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
> > > 22 files changed, 1751 insertions(+), 359 deletions(-) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete
> > > mode
> > > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> > > delete mode 100644
> > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> > > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
> > >
> > > --
> > > 1.9.1
> > >
> > > _______________________________________________
> > > edk2-devel mailing list
> > > edk2-devel@lists.01.org
> > > https://lists.01.org/mailman/listinfo/edk2-devel
> > _______________________________________________
> > edk2-devel mailing list
> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
_______________________________________________
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^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-12 1:39 ` Gao, Liming
@ 2017-01-12 1:51 ` Duran, Leo
2017-01-12 4:25 ` Gao, Liming
0 siblings, 1 reply; 25+ messages in thread
From: Duran, Leo @ 2017-01-12 1:51 UTC (permalink / raw)
To: Gao, Liming, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Justen, Jordan L, Singh, Brijesh, Fan, Jeff,
lersek@redhat.com
Ummh...
> -----Original Message-----
> From: Gao, Liming [mailto:liming.gao@intel.com]
> Sent: Wednesday, January 11, 2017 7:39 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Leo:
> I suggest you rework IoLib instances PeiIoLib, DxeIoLibCpuIo,
> DxeIoLibCpuIo2 library instance first. Then, later you only need to change
> CpuIo PEIM and driver, don't need to change library instances again.
>
> Thanks
> Liming
[Duran, Leo]
If I rework the IoLib instances to use EfiCpuIoWidthFifoUint#, the I/O driver will *not* do the right thing, so the expected IoLib functionality will be broken.
Basically, the I/O driver needs to properly support EfiCpuIoWidthFifoUint# types in order for the IoLib instances to work correctly using that type.
In contrast, albeit not optimal, the changes I've already made to the IoLIb instances will function correctly with the exiting I/O driver.
So it seems like the order t=f changes needs to be:
1) Update I/O driver to support EfiCpuIoWidthFifoUint# types
2) Then update IoLib instances to use EfiCpuIoWidthFifoUint# types
But perhaps my unders5tanding of the current implementation is flawed?
Leo.
> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> Duran, Leo
> Sent: Thursday, January 12, 2017 9:35 AM
> To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: Re: [edk2] [PATCH 0/8] IoLib class library
>
> How about this instead:
>
> 1) I submit a "v2" to take care of the code-style issue, while making all
> instances of IoLib fully functional & complaint with the complete IoLib API.
> 2) At a later time (soon, I promise), I submit a patch for CpuIo2Dxe to
> properly support FiFo types and also rework the IoLib instances to use
> EfiCpuIoWidthFifoUint#.
>
> Is that a deal?
> Leo
>
> > -----Original Message-----
> > From: Gao, Liming [mailto:liming.gao@intel.com]
> > Sent: Wednesday, January 11, 2017 7:22 PM
> > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >
> > Leo:
> > CpuIo2Dxe supports FifoIo operation, because original logic includes
> > FifoIo implementation. CpuIoCheckParameter() checks the parameter,
> > doesn't performance operation. And, 64bit IO operation is not
> > supported. You add three APIs for 8, 16 and 32 Io operation. So, there is no
> lose functionality.
> > Last, OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> It
> > still supports all Width.
> >
> > Besides, I understand your work scope for IO library update. You can
> > focus on my comment 1. If you have no bandwidth, you can submit
> > bugzillar for comment 2 to update PeiCpuIo and DxeCpuIo driver to base
> > on IoLib to implement FifoIo APIs.
> >
> > Thanks
> > Liming
> > -----Original Message-----
> > From: Duran, Leo [mailto:leo.duran@amd.com]
> > Sent: Thursday, January 12, 2017 12:29 AM
> > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >
> > Liming,
> >
> > However, here are some issues with trying to use Fifo types via the
> > I/O
> > protocol:
> > 1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo
> types:
> > //
> > // For FIFO type, the target address won't increase during the access,
> > // so treat Count as 1
> > //
> > if (Width >= EfiCpuIoWidthFifoUint8 && Width <=
> > EfiCpuIoWidthFifoUint64) {
> > Count = 1;
> > }
> >
> > 2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are
> > eliminated/truncated:
> > //
> > // Check to see if Width is in the valid range for I/O Port operations
> > //
> > Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> > if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
> > return EFI_INVALID_PARAMETER;
> > }
> >
> > 3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite():
> > OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8,
> > EfiCpuIoWidthUint16, and EfiCpuIoWidthUint32 So the Fifo types are not
> > serviced.
> >
> >
> > > -----Original Message-----
> > > From: Gao, Liming [mailto:liming.gao@intel.com]
> > > Sent: Tuesday, January 10, 2017 10:07 PM
> > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> > >
> > > Leo:
> > > edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases on
> > > IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2
> > > library instance IoReadFifo8() implementation can call
> > > mCpuIo->Io.Read (mCpuIo, EfiCpuIoWidthFifoUint8, Port, Count,
> > > Buffer);
> > >
> > > Thanks
> > > Liming
> > > -----Original Message-----
> > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf
> > > Of Duran, Leo
> > > Sent: Wednesday, January 11, 2017 11:37 AM
> > > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > > Subject: Re: [edk2] [PATCH 0/8] IoLib class library
> > >
> > > Liming...
> > >
> > > > -----Original Message-----
> > > > From: Gao, Liming [mailto:liming.gao@intel.com]
> > > > Sent: Tuesday, January 10, 2017 7:42 PM
> > > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > > > Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> > > > <jordan.l.justen@intel.com>; Kinney, Michael D
> > > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > > > <jeff.fan@intel.com>
> > > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> > > >
> > > > Leo:
> > > > Thanks for your update. Here is my comments.
> > > > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can
> > > > base on CPU IO service to do FifoIo operation. They don't
> > > > implement them
> > > again.
> > > > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei
> driver
> > > can
> > > > be updated to base on FifoIo API for their FifoIo implementation.
> > >
> > > [Duran, Leo] I actually considered that, but the CPU I/O driver does
> > > not provide FiFiIo service in its implementation of the
> > EFI_CPU_IO2_PROTOCOL.
> > > The CPU I/O driver does use the Fifo routines internally, and it
> > > does so when that caller request IoRead/IoWrite... see the CPU I/O
> > > service
> > routines below.
> > >
> > > > 3) One coding style issue. We don't assign value to the variable
> > declaration.
> > > > UINT8 *Buffer8 = (UINT8 *)Buffer;
> > > > ==>
> > > > UINT8 *Buffer8;
> > > > Buffer8 = (UINT8 *)Buffer;
> > >
> > > [Duran, Leo] OK, I'll change that.
> > >
> > > >
> > > > Thanks
> > > > Liming
> > > [Duran, Leo]
> > >
> > > EFI_STATUS
> > > EFIAPI
> > > CpuIoServiceRead (
> > > IN EFI_CPU_IO2_PROTOCOL *This,
> > > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> > > IN UINT64 Address,
> > > IN UINTN Count,
> > > OUT VOID *Buffer
> > > )
> > > {
> > > EFI_STATUS Status;
> > > UINT8 InStride;
> > > UINT8 OutStride;
> > > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> > > UINT8 *Uint8Buffer;
> > >
> > > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> > > if (EFI_ERROR (Status)) {
> > > return Status;
> > > }
> > >
> > > //
> > > // Select loop based on the width of the transfer
> > > //
> > > InStride = mInStride[Width];
> > > OutStride = mOutStride[Width];
> > > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> > >
> > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> > > if (InStride == 0) {
> > > switch (OperationWidth) {
> > > case EfiCpuIoWidthUint8:
> > > IoReadFifo8 ((UINTN)Address, Count, Buffer);
> > > return EFI_SUCCESS;
> > > case EfiCpuIoWidthUint16:
> > > IoReadFifo16 ((UINTN)Address, Count, Buffer);
> > > return EFI_SUCCESS;
> > > case EfiCpuIoWidthUint32:
> > > IoReadFifo32 ((UINTN)Address, Count, Buffer);
> > > return EFI_SUCCESS;
> > > default:
> > > //
> > > // The CpuIoCheckParameter call above will ensure that this
> > > // path is not taken.
> > > //
> > > ASSERT (FALSE);
> > > break;
> > > }
> > > }
> > > #endif
> > >
> > > for (Uint8Buffer = Buffer; Count > 0; Address += InStride,
> > > Uint8Buffer += OutStride, Count--) {
> > > if (OperationWidth == EfiCpuIoWidthUint8) {
> > > *Uint8Buffer = IoRead8 ((UINTN)Address);
> > > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> > > *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
> > > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> > > *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
> > > }
> > > }
> > >
> > > return EFI_SUCCESS;
> > > }
> > >
> > > EFI_STATUS
> > > EFIAPI
> > > CpuIoServiceWrite (
> > > IN EFI_CPU_IO2_PROTOCOL *This,
> > > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> > > IN UINT64 Address,
> > > IN UINTN Count,
> > > IN VOID *Buffer
> > > )
> > > {
> > > EFI_STATUS Status;
> > > UINT8 InStride;
> > > UINT8 OutStride;
> > > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> > > UINT8 *Uint8Buffer;
> > >
> > > //
> > > // Make sure the parameters are valid
> > > //
> > > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> > > if (EFI_ERROR (Status)) {
> > > return Status;
> > > }
> > >
> > > //
> > > // Select loop based on the width of the transfer
> > > //
> > > InStride = mInStride[Width];
> > > OutStride = mOutStride[Width];
> > > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> > >
> > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> > > if (InStride == 0) {
> > > switch (OperationWidth) {
> > > case EfiCpuIoWidthUint8:
> > > IoWriteFifo8 ((UINTN)Address, Count, Buffer);
> > > return EFI_SUCCESS;
> > > case EfiCpuIoWidthUint16:
> > > IoWriteFifo16 ((UINTN)Address, Count, Buffer);
> > > return EFI_SUCCESS;
> > > case EfiCpuIoWidthUint32:
> > > IoWriteFifo32 ((UINTN)Address, Count, Buffer);
> > > return EFI_SUCCESS;
> > > default:
> > > //
> > > // The CpuIoCheckParameter call above will ensure that this
> > > // path is not taken.
> > > //
> > > ASSERT (FALSE);
> > > break;
> > > }
> > > }
> > > #endif
> > >
> > > for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address +=
> > > InStride, Uint8Buffer += OutStride, Count--) {
> > > if (OperationWidth == EfiCpuIoWidthUint8) {
> > > IoWrite8 ((UINTN)Address, *Uint8Buffer);
> > > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> > > IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
> > > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> > > IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
> > > }
> > > }
> > >
> > > return EFI_SUCCESS;
> > > }
> > > > -----Original Message-----
> > > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On
> > > > Behalf Of Leo Duran
> > > > Sent: Wednesday, January 11, 2017 7:56 AM
> > > > To: edk2-devel@lists.01.org
> > > > Cc: brijesh.singh@amd.com; Justen, Jordan L
> > > > <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>;
> > > > Leo Duran <leo.duran@amd.com>; Kinney, Michael D
> > > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > > > <jeff.fan@intel.com>
> > > > Subject: [edk2] [PATCH 0/8] IoLib class library
> > > >
> > > > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> > > > duplicate implementations of I/O Fifo routines. The patch series
> > > > moves the I/O Fifo routines into the BaseIoLibIntrinsic library
> > > > and expands the IoLib class to include the ported I/O Fifo routines.
> > > >
> > > > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver
> > > > support
> > > > IA32 and X64 natively, and other architectures are supported by
> > > > simply looping through the basic IoRead/IoWrite routines as
> appropiate.
> > > >
> > > > The intent of this patch series is twofold:
> > > > 1) Integrate I/O Fifo routines into the IoLib class library.
> > > > 2) Allow override of IoLib as may be required to support specific
> > > > hardware implementations, such as AMD's Secure Encrypted
> > > > Virtualization
> > > (SEV).
> > > >
> > > > Leo Duran (8):
> > > > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> > > > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> > > > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> > > > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> > > > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> > > > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib
> class
> > > > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
> > > > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
> > > >
> > > > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
> > > > +++++++++++++++++++++
> > > > MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> > > > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> > > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
> > > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> > > > ++++++++++++++++++
> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> > > > ++++++++++++++++++
> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> > > > ++++++++++++++++++++
> > > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
> > > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
> > > > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
> > > > +++++++++++++++++++++
> > > > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
> > > > +++++++++++++++++++++
> > > > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
> > > > +++++++++++++++++++++
> > > > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
> > > > +++++++++++++++++++++
> > > > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> > > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
> > > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
> > > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> > > > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
> > > > 22 files changed, 1751 insertions(+), 359 deletions(-) rename
> > > > {UefiCpuPkg/CpuIo2Dxe =>
> > > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
> > > > {UefiCpuPkg/CpuIo2Dxe =>
> > > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
> > > > {UefiCpuPkg/CpuIo2Dxe =>
> > > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
> > > > {UefiCpuPkg/CpuIo2Dxe =>
> > > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete
> > > > mode
> > > > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> > > > delete mode 100644
> > > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> > > > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
> > > >
> > > > --
> > > > 1.9.1
> > > >
> > > > _______________________________________________
> > > > edk2-devel mailing list
> > > > edk2-devel@lists.01.org
> > > > https://lists.01.org/mailman/listinfo/edk2-devel
> > > _______________________________________________
> > > edk2-devel mailing list
> > > edk2-devel@lists.01.org
> > > https://lists.01.org/mailman/listinfo/edk2-devel
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-12 1:51 ` Duran, Leo
@ 2017-01-12 4:25 ` Gao, Liming
2017-01-12 17:13 ` Jordan Justen
2017-01-17 2:50 ` Gao, Liming
0 siblings, 2 replies; 25+ messages in thread
From: Gao, Liming @ 2017-01-12 4:25 UTC (permalink / raw)
To: Duran, Leo, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Justen, Jordan L, Singh, Brijesh, Fan, Jeff,
lersek@redhat.com
Leo:
Current IO driver does support EfiCpuIoWidthFifoUint#, although CpuIo and PeiCpuIo driver doesn't support the optimized FifoIo operation. So, I think rework IoLib instance has no risk.
Thanks
Liming
>-----Original Message-----
>From: Duran, Leo [mailto:leo.duran@amd.com]
>Sent: Thursday, January 12, 2017 9:51 AM
>To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
>Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
><jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
>Jeff <jeff.fan@intel.com>; lersek@redhat.com
>Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
>Ummh...
>
>> -----Original Message-----
>> From: Gao, Liming [mailto:liming.gao@intel.com]
>> Sent: Wednesday, January 11, 2017 7:39 PM
>> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
>> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
>> Jeff <jeff.fan@intel.com>; lersek@redhat.com
>> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>>
>> Leo:
>> I suggest you rework IoLib instances PeiIoLib, DxeIoLibCpuIo,
>> DxeIoLibCpuIo2 library instance first. Then, later you only need to change
>> CpuIo PEIM and driver, don't need to change library instances again.
>>
>> Thanks
>> Liming
>[Duran, Leo]
>If I rework the IoLib instances to use EfiCpuIoWidthFifoUint#, the I/O driver
>will *not* do the right thing, so the expected IoLib functionality will be
>broken.
>Basically, the I/O driver needs to properly support EfiCpuIoWidthFifoUint#
>types in order for the IoLib instances to work correctly using that type.
>
>In contrast, albeit not optimal, the changes I've already made to the IoLIb
>instances will function correctly with the exiting I/O driver.
>
>So it seems like the order t=f changes needs to be:
>1) Update I/O driver to support EfiCpuIoWidthFifoUint# types
>2) Then update IoLib instances to use EfiCpuIoWidthFifoUint# types
>
>But perhaps my unders5tanding of the current implementation is flawed?
>
>Leo.
>
>> -----Original Message-----
>> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
>> Duran, Leo
>> Sent: Thursday, January 12, 2017 9:35 AM
>> To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
>> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
>> Jeff <jeff.fan@intel.com>; lersek@redhat.com
>> Subject: Re: [edk2] [PATCH 0/8] IoLib class library
>>
>> How about this instead:
>>
>> 1) I submit a "v2" to take care of the code-style issue, while making all
>> instances of IoLib fully functional & complaint with the complete IoLib API.
>> 2) At a later time (soon, I promise), I submit a patch for CpuIo2Dxe to
>> properly support FiFo types and also rework the IoLib instances to use
>> EfiCpuIoWidthFifoUint#.
>>
>> Is that a deal?
>> Leo
>>
>> > -----Original Message-----
>> > From: Gao, Liming [mailto:liming.gao@intel.com]
>> > Sent: Wednesday, January 11, 2017 7:22 PM
>> > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
>> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
>> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>> >
>> > Leo:
>> > CpuIo2Dxe supports FifoIo operation, because original logic includes
>> > FifoIo implementation. CpuIoCheckParameter() checks the parameter,
>> > doesn't performance operation. And, 64bit IO operation is not
>> > supported. You add three APIs for 8, 16 and 32 Io operation. So, there is no
>> lose functionality.
>> > Last, OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>> It
>> > still supports all Width.
>> >
>> > Besides, I understand your work scope for IO library update. You can
>> > focus on my comment 1. If you have no bandwidth, you can submit
>> > bugzillar for comment 2 to update PeiCpuIo and DxeCpuIo driver to base
>> > on IoLib to implement FifoIo APIs.
>> >
>> > Thanks
>> > Liming
>> > -----Original Message-----
>> > From: Duran, Leo [mailto:leo.duran@amd.com]
>> > Sent: Thursday, January 12, 2017 12:29 AM
>> > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
>> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
>> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>> >
>> > Liming,
>> >
>> > However, here are some issues with trying to use Fifo types via the
>> > I/O
>> > protocol:
>> > 1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo
>> types:
>> > //
>> > // For FIFO type, the target address won't increase during the access,
>> > // so treat Count as 1
>> > //
>> > if (Width >= EfiCpuIoWidthFifoUint8 && Width <=
>> > EfiCpuIoWidthFifoUint64) {
>> > Count = 1;
>> > }
>> >
>> > 2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are
>> > eliminated/truncated:
>> > //
>> > // Check to see if Width is in the valid range for I/O Port operations
>> > //
>> > Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>> > if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
>> > return EFI_INVALID_PARAMETER;
>> > }
>> >
>> > 3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite():
>> > OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8,
>> > EfiCpuIoWidthUint16, and EfiCpuIoWidthUint32 So the Fifo types are not
>> > serviced.
>> >
>> >
>> > > -----Original Message-----
>> > > From: Gao, Liming [mailto:liming.gao@intel.com]
>> > > Sent: Tuesday, January 10, 2017 10:07 PM
>> > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
>> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>> > > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>> > > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
>> > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>> > >
>> > > Leo:
>> > > edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases
>on
>> > > IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2
>> > > library instance IoReadFifo8() implementation can call
>> > > mCpuIo->Io.Read (mCpuIo, EfiCpuIoWidthFifoUint8, Port, Count,
>> > > Buffer);
>> > >
>> > > Thanks
>> > > Liming
>> > > -----Original Message-----
>> > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf
>> > > Of Duran, Leo
>> > > Sent: Wednesday, January 11, 2017 11:37 AM
>> > > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
>> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>> > > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>> > > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
>> > > Subject: Re: [edk2] [PATCH 0/8] IoLib class library
>> > >
>> > > Liming...
>> > >
>> > > > -----Original Message-----
>> > > > From: Gao, Liming [mailto:liming.gao@intel.com]
>> > > > Sent: Tuesday, January 10, 2017 7:42 PM
>> > > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
>> > > > Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
>> > > > <jordan.l.justen@intel.com>; Kinney, Michael D
>> > > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
>> > > > <jeff.fan@intel.com>
>> > > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>> > > >
>> > > > Leo:
>> > > > Thanks for your update. Here is my comments.
>> > > > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can
>> > > > base on CPU IO service to do FifoIo operation. They don't
>> > > > implement them
>> > > again.
>> > > > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei
>> driver
>> > > can
>> > > > be updated to base on FifoIo API for their FifoIo implementation.
>> > >
>> > > [Duran, Leo] I actually considered that, but the CPU I/O driver does
>> > > not provide FiFiIo service in its implementation of the
>> > EFI_CPU_IO2_PROTOCOL.
>> > > The CPU I/O driver does use the Fifo routines internally, and it
>> > > does so when that caller request IoRead/IoWrite... see the CPU I/O
>> > > service
>> > routines below.
>> > >
>> > > > 3) One coding style issue. We don't assign value to the variable
>> > declaration.
>> > > > UINT8 *Buffer8 = (UINT8 *)Buffer;
>> > > > ==>
>> > > > UINT8 *Buffer8;
>> > > > Buffer8 = (UINT8 *)Buffer;
>> > >
>> > > [Duran, Leo] OK, I'll change that.
>> > >
>> > > >
>> > > > Thanks
>> > > > Liming
>> > > [Duran, Leo]
>> > >
>> > > EFI_STATUS
>> > > EFIAPI
>> > > CpuIoServiceRead (
>> > > IN EFI_CPU_IO2_PROTOCOL *This,
>> > > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
>> > > IN UINT64 Address,
>> > > IN UINTN Count,
>> > > OUT VOID *Buffer
>> > > )
>> > > {
>> > > EFI_STATUS Status;
>> > > UINT8 InStride;
>> > > UINT8 OutStride;
>> > > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
>> > > UINT8 *Uint8Buffer;
>> > >
>> > > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
>> > > if (EFI_ERROR (Status)) {
>> > > return Status;
>> > > }
>> > >
>> > > //
>> > > // Select loop based on the width of the transfer
>> > > //
>> > > InStride = mInStride[Width];
>> > > OutStride = mOutStride[Width];
>> > > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>> > >
>> > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
>> > > if (InStride == 0) {
>> > > switch (OperationWidth) {
>> > > case EfiCpuIoWidthUint8:
>> > > IoReadFifo8 ((UINTN)Address, Count, Buffer);
>> > > return EFI_SUCCESS;
>> > > case EfiCpuIoWidthUint16:
>> > > IoReadFifo16 ((UINTN)Address, Count, Buffer);
>> > > return EFI_SUCCESS;
>> > > case EfiCpuIoWidthUint32:
>> > > IoReadFifo32 ((UINTN)Address, Count, Buffer);
>> > > return EFI_SUCCESS;
>> > > default:
>> > > //
>> > > // The CpuIoCheckParameter call above will ensure that this
>> > > // path is not taken.
>> > > //
>> > > ASSERT (FALSE);
>> > > break;
>> > > }
>> > > }
>> > > #endif
>> > >
>> > > for (Uint8Buffer = Buffer; Count > 0; Address += InStride,
>> > > Uint8Buffer += OutStride, Count--) {
>> > > if (OperationWidth == EfiCpuIoWidthUint8) {
>> > > *Uint8Buffer = IoRead8 ((UINTN)Address);
>> > > } else if (OperationWidth == EfiCpuIoWidthUint16) {
>> > > *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
>> > > } else if (OperationWidth == EfiCpuIoWidthUint32) {
>> > > *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
>> > > }
>> > > }
>> > >
>> > > return EFI_SUCCESS;
>> > > }
>> > >
>> > > EFI_STATUS
>> > > EFIAPI
>> > > CpuIoServiceWrite (
>> > > IN EFI_CPU_IO2_PROTOCOL *This,
>> > > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
>> > > IN UINT64 Address,
>> > > IN UINTN Count,
>> > > IN VOID *Buffer
>> > > )
>> > > {
>> > > EFI_STATUS Status;
>> > > UINT8 InStride;
>> > > UINT8 OutStride;
>> > > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
>> > > UINT8 *Uint8Buffer;
>> > >
>> > > //
>> > > // Make sure the parameters are valid
>> > > //
>> > > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
>> > > if (EFI_ERROR (Status)) {
>> > > return Status;
>> > > }
>> > >
>> > > //
>> > > // Select loop based on the width of the transfer
>> > > //
>> > > InStride = mInStride[Width];
>> > > OutStride = mOutStride[Width];
>> > > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>> > >
>> > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
>> > > if (InStride == 0) {
>> > > switch (OperationWidth) {
>> > > case EfiCpuIoWidthUint8:
>> > > IoWriteFifo8 ((UINTN)Address, Count, Buffer);
>> > > return EFI_SUCCESS;
>> > > case EfiCpuIoWidthUint16:
>> > > IoWriteFifo16 ((UINTN)Address, Count, Buffer);
>> > > return EFI_SUCCESS;
>> > > case EfiCpuIoWidthUint32:
>> > > IoWriteFifo32 ((UINTN)Address, Count, Buffer);
>> > > return EFI_SUCCESS;
>> > > default:
>> > > //
>> > > // The CpuIoCheckParameter call above will ensure that this
>> > > // path is not taken.
>> > > //
>> > > ASSERT (FALSE);
>> > > break;
>> > > }
>> > > }
>> > > #endif
>> > >
>> > > for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address +=
>> > > InStride, Uint8Buffer += OutStride, Count--) {
>> > > if (OperationWidth == EfiCpuIoWidthUint8) {
>> > > IoWrite8 ((UINTN)Address, *Uint8Buffer);
>> > > } else if (OperationWidth == EfiCpuIoWidthUint16) {
>> > > IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
>> > > } else if (OperationWidth == EfiCpuIoWidthUint32) {
>> > > IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
>> > > }
>> > > }
>> > >
>> > > return EFI_SUCCESS;
>> > > }
>> > > > -----Original Message-----
>> > > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On
>> > > > Behalf Of Leo Duran
>> > > > Sent: Wednesday, January 11, 2017 7:56 AM
>> > > > To: edk2-devel@lists.01.org
>> > > > Cc: brijesh.singh@amd.com; Justen, Jordan L
>> > > > <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>;
>> > > > Leo Duran <leo.duran@amd.com>; Kinney, Michael D
>> > > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
>> > > > <jeff.fan@intel.com>
>> > > > Subject: [edk2] [PATCH 0/8] IoLib class library
>> > > >
>> > > > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
>> > > > duplicate implementations of I/O Fifo routines. The patch series
>> > > > moves the I/O Fifo routines into the BaseIoLibIntrinsic library
>> > > > and expands the IoLib class to include the ported I/O Fifo routines.
>> > > >
>> > > > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver
>> > > > support
>> > > > IA32 and X64 natively, and other architectures are supported by
>> > > > simply looping through the basic IoRead/IoWrite routines as
>> appropiate.
>> > > >
>> > > > The intent of this patch series is twofold:
>> > > > 1) Integrate I/O Fifo routines into the IoLib class library.
>> > > > 2) Allow override of IoLib as may be required to support specific
>> > > > hardware implementations, such as AMD's Secure Encrypted
>> > > > Virtualization
>> > > (SEV).
>> > > >
>> > > > Leo Duran (8):
>> > > > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
>> > > > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
>> > > > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
>> > > > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
>> > > > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
>> > > > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib
>> class
>> > > > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
>> > > > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
>> > > >
>> > > > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
>> > > > +++++++++++++++++++++
>> > > > MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
>> > > > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
>> > > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
>> > > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
>> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
>> > > > ++++++++++++++++++
>> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
>> > > > ++++++++++++++++++
>> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
>> > > > ++++++++++++++++++++
>> > > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
>> > > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
>> > > > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
>> > > > +++++++++++++++++++++
>> > > > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
>> > > > +++++++++++++++++++++
>> > > > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
>> > > > +++++++++++++++++++++
>> > > > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
>> > > > +++++++++++++++++++++
>> > > > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
>> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
>> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
>> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
>> > > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
>> > > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
>> > > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
>> > > > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
>> > > > 22 files changed, 1751 insertions(+), 359 deletions(-) rename
>> > > > {UefiCpuPkg/CpuIo2Dxe =>
>> > > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
>> > > > {UefiCpuPkg/CpuIo2Dxe =>
>> > > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
>> > > > {UefiCpuPkg/CpuIo2Dxe =>
>> > > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
>> > > > {UefiCpuPkg/CpuIo2Dxe =>
>> > > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete
>> > > > mode
>> > > > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
>> > > > delete mode 100644
>> > > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
>> > > > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
>> > > >
>> > > > --
>> > > > 1.9.1
>> > > >
>> > > > _______________________________________________
>> > > > edk2-devel mailing list
>> > > > edk2-devel@lists.01.org
>> > > > https://lists.01.org/mailman/listinfo/edk2-devel
>> > > _______________________________________________
>> > > edk2-devel mailing list
>> > > edk2-devel@lists.01.org
>> > > https://lists.01.org/mailman/listinfo/edk2-devel
>> _______________________________________________
>> edk2-devel mailing list
>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-12 4:25 ` Gao, Liming
@ 2017-01-12 17:13 ` Jordan Justen
2017-01-17 2:50 ` Gao, Liming
1 sibling, 0 replies; 25+ messages in thread
From: Jordan Justen @ 2017-01-12 17:13 UTC (permalink / raw)
To: Gao, Liming, Duran, Leo, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Singh, Brijesh, Fan, Jeff, lersek@redhat.com
On 2017-01-11 20:25:43, Gao, Liming wrote:
> Leo:
> Current IO driver does support EfiCpuIoWidthFifoUint#, although
> CpuIo and PeiCpuIo driver doesn't support the optimized FifoIo
> operation. So, I think rework IoLib instance has no risk.
>
I agree with Liming. Based on the IoLib implementation type, the
library instances should either:
1. Use rep i/o
2. Call the appropriate interface for fifo i/o access
Right now you have 1 library instance that always does the rep i/o,
and then several that will never do it.
What happened to the code you mentioned to automatically detect if rep
i/o should be avoided?
-Jordan
>
> >-----Original Message-----
> >From: Duran, Leo [mailto:leo.duran@amd.com]
> >Sent: Thursday, January 12, 2017 9:51 AM
> >To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> >Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> ><jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> >Jeff <jeff.fan@intel.com>; lersek@redhat.com
> >Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >
> >Ummh...
> >
> >> -----Original Message-----
> >> From: Gao, Liming [mailto:liming.gao@intel.com]
> >> Sent: Wednesday, January 11, 2017 7:39 PM
> >> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> >> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> >> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> >> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> >> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >>
> >> Leo:
> >> I suggest you rework IoLib instances PeiIoLib, DxeIoLibCpuIo,
> >> DxeIoLibCpuIo2 library instance first. Then, later you only need to change
> >> CpuIo PEIM and driver, don't need to change library instances again.
> >>
> >> Thanks
> >> Liming
> >[Duran, Leo]
> >If I rework the IoLib instances to use EfiCpuIoWidthFifoUint#, the I/O driver
> >will *not* do the right thing, so the expected IoLib functionality will be
> >broken.
> >Basically, the I/O driver needs to properly support EfiCpuIoWidthFifoUint#
> >types in order for the IoLib instances to work correctly using that type.
> >
> >In contrast, albeit not optimal, the changes I've already made to the IoLIb
> >instances will function correctly with the exiting I/O driver.
> >
> >So it seems like the order t=f changes needs to be:
> >1) Update I/O driver to support EfiCpuIoWidthFifoUint# types
> >2) Then update IoLib instances to use EfiCpuIoWidthFifoUint# types
> >
> >But perhaps my unders5tanding of the current implementation is flawed?
> >
> >Leo.
> >
> >> -----Original Message-----
> >> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> >> Duran, Leo
> >> Sent: Thursday, January 12, 2017 9:35 AM
> >> To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> >> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> >> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> >> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> >> Subject: Re: [edk2] [PATCH 0/8] IoLib class library
> >>
> >> How about this instead:
> >>
> >> 1) I submit a "v2" to take care of the code-style issue, while making all
> >> instances of IoLib fully functional & complaint with the complete IoLib API.
> >> 2) At a later time (soon, I promise), I submit a patch for CpuIo2Dxe to
> >> properly support FiFo types and also rework the IoLib instances to use
> >> EfiCpuIoWidthFifoUint#.
> >>
> >> Is that a deal?
> >> Leo
> >>
> >> > -----Original Message-----
> >> > From: Gao, Liming [mailto:liming.gao@intel.com]
> >> > Sent: Wednesday, January 11, 2017 7:22 PM
> >> > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> >> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> >> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> >> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> >> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >> >
> >> > Leo:
> >> > CpuIo2Dxe supports FifoIo operation, because original logic includes
> >> > FifoIo implementation. CpuIoCheckParameter() checks the parameter,
> >> > doesn't performance operation. And, 64bit IO operation is not
> >> > supported. You add three APIs for 8, 16 and 32 Io operation. So, there is no
> >> lose functionality.
> >> > Last, OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >> It
> >> > still supports all Width.
> >> >
> >> > Besides, I understand your work scope for IO library update. You can
> >> > focus on my comment 1. If you have no bandwidth, you can submit
> >> > bugzillar for comment 2 to update PeiCpuIo and DxeCpuIo driver to base
> >> > on IoLib to implement FifoIo APIs.
> >> >
> >> > Thanks
> >> > Liming
> >> > -----Original Message-----
> >> > From: Duran, Leo [mailto:leo.duran@amd.com]
> >> > Sent: Thursday, January 12, 2017 12:29 AM
> >> > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> >> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> >> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> >> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> >> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >> >
> >> > Liming,
> >> >
> >> > However, here are some issues with trying to use Fifo types via the
> >> > I/O
> >> > protocol:
> >> > 1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo
> >> types:
> >> > //
> >> > // For FIFO type, the target address won't increase during the access,
> >> > // so treat Count as 1
> >> > //
> >> > if (Width >= EfiCpuIoWidthFifoUint8 && Width <=
> >> > EfiCpuIoWidthFifoUint64) {
> >> > Count = 1;
> >> > }
> >> >
> >> > 2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are
> >> > eliminated/truncated:
> >> > //
> >> > // Check to see if Width is in the valid range for I/O Port operations
> >> > //
> >> > Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >> > if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
> >> > return EFI_INVALID_PARAMETER;
> >> > }
> >> >
> >> > 3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite():
> >> > OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8,
> >> > EfiCpuIoWidthUint16, and EfiCpuIoWidthUint32 So the Fifo types are not
> >> > serviced.
> >> >
> >> >
> >> > > -----Original Message-----
> >> > > From: Gao, Liming [mailto:liming.gao@intel.com]
> >> > > Sent: Tuesday, January 10, 2017 10:07 PM
> >> > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> >> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> >> > > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> >> > > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> >> > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >> > >
> >> > > Leo:
> >> > > edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases
> >on
> >> > > IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2
> >> > > library instance IoReadFifo8() implementation can call
> >> > > mCpuIo->Io.Read (mCpuIo, EfiCpuIoWidthFifoUint8, Port, Count,
> >> > > Buffer);
> >> > >
> >> > > Thanks
> >> > > Liming
> >> > > -----Original Message-----
> >> > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf
> >> > > Of Duran, Leo
> >> > > Sent: Wednesday, January 11, 2017 11:37 AM
> >> > > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> >> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> >> > > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> >> > > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> >> > > Subject: Re: [edk2] [PATCH 0/8] IoLib class library
> >> > >
> >> > > Liming...
> >> > >
> >> > > > -----Original Message-----
> >> > > > From: Gao, Liming [mailto:liming.gao@intel.com]
> >> > > > Sent: Tuesday, January 10, 2017 7:42 PM
> >> > > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> >> > > > Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> >> > > > <jordan.l.justen@intel.com>; Kinney, Michael D
> >> > > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> >> > > > <jeff.fan@intel.com>
> >> > > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >> > > >
> >> > > > Leo:
> >> > > > Thanks for your update. Here is my comments.
> >> > > > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can
> >> > > > base on CPU IO service to do FifoIo operation. They don't
> >> > > > implement them
> >> > > again.
> >> > > > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei
> >> driver
> >> > > can
> >> > > > be updated to base on FifoIo API for their FifoIo implementation.
> >> > >
> >> > > [Duran, Leo] I actually considered that, but the CPU I/O driver does
> >> > > not provide FiFiIo service in its implementation of the
> >> > EFI_CPU_IO2_PROTOCOL.
> >> > > The CPU I/O driver does use the Fifo routines internally, and it
> >> > > does so when that caller request IoRead/IoWrite... see the CPU I/O
> >> > > service
> >> > routines below.
> >> > >
> >> > > > 3) One coding style issue. We don't assign value to the variable
> >> > declaration.
> >> > > > UINT8 *Buffer8 = (UINT8 *)Buffer;
> >> > > > ==>
> >> > > > UINT8 *Buffer8;
> >> > > > Buffer8 = (UINT8 *)Buffer;
> >> > >
> >> > > [Duran, Leo] OK, I'll change that.
> >> > >
> >> > > >
> >> > > > Thanks
> >> > > > Liming
> >> > > [Duran, Leo]
> >> > >
> >> > > EFI_STATUS
> >> > > EFIAPI
> >> > > CpuIoServiceRead (
> >> > > IN EFI_CPU_IO2_PROTOCOL *This,
> >> > > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> >> > > IN UINT64 Address,
> >> > > IN UINTN Count,
> >> > > OUT VOID *Buffer
> >> > > )
> >> > > {
> >> > > EFI_STATUS Status;
> >> > > UINT8 InStride;
> >> > > UINT8 OutStride;
> >> > > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> >> > > UINT8 *Uint8Buffer;
> >> > >
> >> > > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> >> > > if (EFI_ERROR (Status)) {
> >> > > return Status;
> >> > > }
> >> > >
> >> > > //
> >> > > // Select loop based on the width of the transfer
> >> > > //
> >> > > InStride = mInStride[Width];
> >> > > OutStride = mOutStride[Width];
> >> > > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >> > >
> >> > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> >> > > if (InStride == 0) {
> >> > > switch (OperationWidth) {
> >> > > case EfiCpuIoWidthUint8:
> >> > > IoReadFifo8 ((UINTN)Address, Count, Buffer);
> >> > > return EFI_SUCCESS;
> >> > > case EfiCpuIoWidthUint16:
> >> > > IoReadFifo16 ((UINTN)Address, Count, Buffer);
> >> > > return EFI_SUCCESS;
> >> > > case EfiCpuIoWidthUint32:
> >> > > IoReadFifo32 ((UINTN)Address, Count, Buffer);
> >> > > return EFI_SUCCESS;
> >> > > default:
> >> > > //
> >> > > // The CpuIoCheckParameter call above will ensure that this
> >> > > // path is not taken.
> >> > > //
> >> > > ASSERT (FALSE);
> >> > > break;
> >> > > }
> >> > > }
> >> > > #endif
> >> > >
> >> > > for (Uint8Buffer = Buffer; Count > 0; Address += InStride,
> >> > > Uint8Buffer += OutStride, Count--) {
> >> > > if (OperationWidth == EfiCpuIoWidthUint8) {
> >> > > *Uint8Buffer = IoRead8 ((UINTN)Address);
> >> > > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> >> > > *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
> >> > > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> >> > > *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
> >> > > }
> >> > > }
> >> > >
> >> > > return EFI_SUCCESS;
> >> > > }
> >> > >
> >> > > EFI_STATUS
> >> > > EFIAPI
> >> > > CpuIoServiceWrite (
> >> > > IN EFI_CPU_IO2_PROTOCOL *This,
> >> > > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> >> > > IN UINT64 Address,
> >> > > IN UINTN Count,
> >> > > IN VOID *Buffer
> >> > > )
> >> > > {
> >> > > EFI_STATUS Status;
> >> > > UINT8 InStride;
> >> > > UINT8 OutStride;
> >> > > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> >> > > UINT8 *Uint8Buffer;
> >> > >
> >> > > //
> >> > > // Make sure the parameters are valid
> >> > > //
> >> > > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> >> > > if (EFI_ERROR (Status)) {
> >> > > return Status;
> >> > > }
> >> > >
> >> > > //
> >> > > // Select loop based on the width of the transfer
> >> > > //
> >> > > InStride = mInStride[Width];
> >> > > OutStride = mOutStride[Width];
> >> > > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >> > >
> >> > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> >> > > if (InStride == 0) {
> >> > > switch (OperationWidth) {
> >> > > case EfiCpuIoWidthUint8:
> >> > > IoWriteFifo8 ((UINTN)Address, Count, Buffer);
> >> > > return EFI_SUCCESS;
> >> > > case EfiCpuIoWidthUint16:
> >> > > IoWriteFifo16 ((UINTN)Address, Count, Buffer);
> >> > > return EFI_SUCCESS;
> >> > > case EfiCpuIoWidthUint32:
> >> > > IoWriteFifo32 ((UINTN)Address, Count, Buffer);
> >> > > return EFI_SUCCESS;
> >> > > default:
> >> > > //
> >> > > // The CpuIoCheckParameter call above will ensure that this
> >> > > // path is not taken.
> >> > > //
> >> > > ASSERT (FALSE);
> >> > > break;
> >> > > }
> >> > > }
> >> > > #endif
> >> > >
> >> > > for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address +=
> >> > > InStride, Uint8Buffer += OutStride, Count--) {
> >> > > if (OperationWidth == EfiCpuIoWidthUint8) {
> >> > > IoWrite8 ((UINTN)Address, *Uint8Buffer);
> >> > > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> >> > > IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
> >> > > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> >> > > IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
> >> > > }
> >> > > }
> >> > >
> >> > > return EFI_SUCCESS;
> >> > > }
> >> > > > -----Original Message-----
> >> > > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On
> >> > > > Behalf Of Leo Duran
> >> > > > Sent: Wednesday, January 11, 2017 7:56 AM
> >> > > > To: edk2-devel@lists.01.org
> >> > > > Cc: brijesh.singh@amd.com; Justen, Jordan L
> >> > > > <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>;
> >> > > > Leo Duran <leo.duran@amd.com>; Kinney, Michael D
> >> > > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> >> > > > <jeff.fan@intel.com>
> >> > > > Subject: [edk2] [PATCH 0/8] IoLib class library
> >> > > >
> >> > > > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> >> > > > duplicate implementations of I/O Fifo routines. The patch series
> >> > > > moves the I/O Fifo routines into the BaseIoLibIntrinsic library
> >> > > > and expands the IoLib class to include the ported I/O Fifo routines.
> >> > > >
> >> > > > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver
> >> > > > support
> >> > > > IA32 and X64 natively, and other architectures are supported by
> >> > > > simply looping through the basic IoRead/IoWrite routines as
> >> appropiate.
> >> > > >
> >> > > > The intent of this patch series is twofold:
> >> > > > 1) Integrate I/O Fifo routines into the IoLib class library.
> >> > > > 2) Allow override of IoLib as may be required to support specific
> >> > > > hardware implementations, such as AMD's Secure Encrypted
> >> > > > Virtualization
> >> > > (SEV).
> >> > > >
> >> > > > Leo Duran (8):
> >> > > > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> >> > > > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> >> > > > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> >> > > > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> >> > > > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> >> > > > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib
> >> class
> >> > > > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
> >> > > > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
> >> > > >
> >> > > > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
> >> > > > +++++++++++++++++++++
> >> > > > MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> >> > > > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> >> > > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
> >> > > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
> >> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> >> > > > ++++++++++++++++++
> >> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> >> > > > ++++++++++++++++++
> >> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> >> > > > ++++++++++++++++++++
> >> > > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
> >> > > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
> >> > > > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
> >> > > > +++++++++++++++++++++
> >> > > > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
> >> > > > +++++++++++++++++++++
> >> > > > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
> >> > > > +++++++++++++++++++++
> >> > > > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
> >> > > > +++++++++++++++++++++
> >> > > > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
> >> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
> >> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> >> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> >> > > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
> >> > > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
> >> > > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> >> > > > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
> >> > > > 22 files changed, 1751 insertions(+), 359 deletions(-) rename
> >> > > > {UefiCpuPkg/CpuIo2Dxe =>
> >> > > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
> >> > > > {UefiCpuPkg/CpuIo2Dxe =>
> >> > > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
> >> > > > {UefiCpuPkg/CpuIo2Dxe =>
> >> > > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
> >> > > > {UefiCpuPkg/CpuIo2Dxe =>
> >> > > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete
> >> > > > mode
> >> > > > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> >> > > > delete mode 100644
> >> > > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> >> > > > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
> >> > > >
> >> > > > --
> >> > > > 1.9.1
> >> > > >
> >> > > > _______________________________________________
> >> > > > edk2-devel mailing list
> >> > > > edk2-devel@lists.01.org
> >> > > > https://lists.01.org/mailman/listinfo/edk2-devel
> >> > > _______________________________________________
> >> > > edk2-devel mailing list
> >> > > edk2-devel@lists.01.org
> >> > > https://lists.01.org/mailman/listinfo/edk2-devel
> >> _______________________________________________
> >> edk2-devel mailing list
> >> edk2-devel@lists.01.org
> >> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 0/8] IoLib class library
2017-01-12 4:25 ` Gao, Liming
2017-01-12 17:13 ` Jordan Justen
@ 2017-01-17 2:50 ` Gao, Liming
1 sibling, 0 replies; 25+ messages in thread
From: Gao, Liming @ 2017-01-17 2:50 UTC (permalink / raw)
To: Gao, Liming, Duran, Leo, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Justen, Jordan L, Singh, Brijesh, Fan, Jeff,
lersek@redhat.com
Leo:
I have pushed your patches in edk2 trunk 13a50a6fe1dc...2b631390f9f5.
>-----Original Message-----
>From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Gao,
>Liming
>Sent: Thursday, January 12, 2017 12:26 PM
>To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
>Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
><jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
>Jeff <jeff.fan@intel.com>; lersek@redhat.com
>Subject: Re: [edk2] [PATCH 0/8] IoLib class library
>
>Leo:
> Current IO driver does support EfiCpuIoWidthFifoUint#, although CpuIo and
>PeiCpuIo driver doesn't support the optimized FifoIo operation. So, I think
>rework IoLib instance has no risk.
>
>Thanks
>Liming
>>-----Original Message-----
>>From: Duran, Leo [mailto:leo.duran@amd.com]
>>Sent: Thursday, January 12, 2017 9:51 AM
>>To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
>>Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>><jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
>>Jeff <jeff.fan@intel.com>; lersek@redhat.com
>>Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>>
>>Ummh...
>>
>>> -----Original Message-----
>>> From: Gao, Liming [mailto:liming.gao@intel.com]
>>> Sent: Wednesday, January 11, 2017 7:39 PM
>>> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
>>> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>>> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>Fan,
>>> Jeff <jeff.fan@intel.com>; lersek@redhat.com
>>> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>>>
>>> Leo:
>>> I suggest you rework IoLib instances PeiIoLib, DxeIoLibCpuIo,
>>> DxeIoLibCpuIo2 library instance first. Then, later you only need to change
>>> CpuIo PEIM and driver, don't need to change library instances again.
>>>
>>> Thanks
>>> Liming
>>[Duran, Leo]
>>If I rework the IoLib instances to use EfiCpuIoWidthFifoUint#, the I/O driver
>>will *not* do the right thing, so the expected IoLib functionality will be
>>broken.
>>Basically, the I/O driver needs to properly support EfiCpuIoWidthFifoUint#
>>types in order for the IoLib instances to work correctly using that type.
>>
>>In contrast, albeit not optimal, the changes I've already made to the IoLIb
>>instances will function correctly with the exiting I/O driver.
>>
>>So it seems like the order t=f changes needs to be:
>>1) Update I/O driver to support EfiCpuIoWidthFifoUint# types
>>2) Then update IoLib instances to use EfiCpuIoWidthFifoUint# types
>>
>>But perhaps my unders5tanding of the current implementation is flawed?
>>
>>Leo.
>>
>>> -----Original Message-----
>>> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
>>> Duran, Leo
>>> Sent: Thursday, January 12, 2017 9:35 AM
>>> To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
>>> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>>> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>Fan,
>>> Jeff <jeff.fan@intel.com>; lersek@redhat.com
>>> Subject: Re: [edk2] [PATCH 0/8] IoLib class library
>>>
>>> How about this instead:
>>>
>>> 1) I submit a "v2" to take care of the code-style issue, while making all
>>> instances of IoLib fully functional & complaint with the complete IoLib API.
>>> 2) At a later time (soon, I promise), I submit a patch for CpuIo2Dxe to
>>> properly support FiFo types and also rework the IoLib instances to use
>>> EfiCpuIoWidthFifoUint#.
>>>
>>> Is that a deal?
>>> Leo
>>>
>>> > -----Original Message-----
>>> > From: Gao, Liming [mailto:liming.gao@intel.com]
>>> > Sent: Wednesday, January 11, 2017 7:22 PM
>>> > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
>>> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>>> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>>> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
>>> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>>> >
>>> > Leo:
>>> > CpuIo2Dxe supports FifoIo operation, because original logic includes
>>> > FifoIo implementation. CpuIoCheckParameter() checks the parameter,
>>> > doesn't performance operation. And, 64bit IO operation is not
>>> > supported. You add three APIs for 8, 16 and 32 Io operation. So, there is
>no
>>> lose functionality.
>>> > Last, OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width &
>0x03);
>>> It
>>> > still supports all Width.
>>> >
>>> > Besides, I understand your work scope for IO library update. You can
>>> > focus on my comment 1. If you have no bandwidth, you can submit
>>> > bugzillar for comment 2 to update PeiCpuIo and DxeCpuIo driver to base
>>> > on IoLib to implement FifoIo APIs.
>>> >
>>> > Thanks
>>> > Liming
>>> > -----Original Message-----
>>> > From: Duran, Leo [mailto:leo.duran@amd.com]
>>> > Sent: Thursday, January 12, 2017 12:29 AM
>>> > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
>>> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>>> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>>> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
>>> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>>> >
>>> > Liming,
>>> >
>>> > However, here are some issues with trying to use Fifo types via the
>>> > I/O
>>> > protocol:
>>> > 1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo
>>> types:
>>> > //
>>> > // For FIFO type, the target address won't increase during the access,
>>> > // so treat Count as 1
>>> > //
>>> > if (Width >= EfiCpuIoWidthFifoUint8 && Width <=
>>> > EfiCpuIoWidthFifoUint64) {
>>> > Count = 1;
>>> > }
>>> >
>>> > 2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are
>>> > eliminated/truncated:
>>> > //
>>> > // Check to see if Width is in the valid range for I/O Port operations
>>> > //
>>> > Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>>> > if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
>>> > return EFI_INVALID_PARAMETER;
>>> > }
>>> >
>>> > 3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite():
>>> > OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8,
>>> > EfiCpuIoWidthUint16, and EfiCpuIoWidthUint32 So the Fifo types are not
>>> > serviced.
>>> >
>>> >
>>> > > -----Original Message-----
>>> > > From: Gao, Liming [mailto:liming.gao@intel.com]
>>> > > Sent: Tuesday, January 10, 2017 10:07 PM
>>> > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
>>> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>>> > > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>>> > > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
>>> > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>>> > >
>>> > > Leo:
>>> > > edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases
>>on
>>> > > IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2
>>> > > library instance IoReadFifo8() implementation can call
>>> > > mCpuIo->Io.Read (mCpuIo, EfiCpuIoWidthFifoUint8, Port, Count,
>>> > > Buffer);
>>> > >
>>> > > Thanks
>>> > > Liming
>>> > > -----Original Message-----
>>> > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf
>>> > > Of Duran, Leo
>>> > > Sent: Wednesday, January 11, 2017 11:37 AM
>>> > > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
>>> > > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
>>> > > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
>>> > > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
>>> > > Subject: Re: [edk2] [PATCH 0/8] IoLib class library
>>> > >
>>> > > Liming...
>>> > >
>>> > > > -----Original Message-----
>>> > > > From: Gao, Liming [mailto:liming.gao@intel.com]
>>> > > > Sent: Tuesday, January 10, 2017 7:42 PM
>>> > > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
>>> > > > Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
>>> > > > <jordan.l.justen@intel.com>; Kinney, Michael D
>>> > > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
>>> > > > <jeff.fan@intel.com>
>>> > > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>>> > > >
>>> > > > Leo:
>>> > > > Thanks for your update. Here is my comments.
>>> > > > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can
>>> > > > base on CPU IO service to do FifoIo operation. They don't
>>> > > > implement them
>>> > > again.
>>> > > > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei
>>> driver
>>> > > can
>>> > > > be updated to base on FifoIo API for their FifoIo implementation.
>>> > >
>>> > > [Duran, Leo] I actually considered that, but the CPU I/O driver does
>>> > > not provide FiFiIo service in its implementation of the
>>> > EFI_CPU_IO2_PROTOCOL.
>>> > > The CPU I/O driver does use the Fifo routines internally, and it
>>> > > does so when that caller request IoRead/IoWrite... see the CPU I/O
>>> > > service
>>> > routines below.
>>> > >
>>> > > > 3) One coding style issue. We don't assign value to the variable
>>> > declaration.
>>> > > > UINT8 *Buffer8 = (UINT8 *)Buffer;
>>> > > > ==>
>>> > > > UINT8 *Buffer8;
>>> > > > Buffer8 = (UINT8 *)Buffer;
>>> > >
>>> > > [Duran, Leo] OK, I'll change that.
>>> > >
>>> > > >
>>> > > > Thanks
>>> > > > Liming
>>> > > [Duran, Leo]
>>> > >
>>> > > EFI_STATUS
>>> > > EFIAPI
>>> > > CpuIoServiceRead (
>>> > > IN EFI_CPU_IO2_PROTOCOL *This,
>>> > > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
>>> > > IN UINT64 Address,
>>> > > IN UINTN Count,
>>> > > OUT VOID *Buffer
>>> > > )
>>> > > {
>>> > > EFI_STATUS Status;
>>> > > UINT8 InStride;
>>> > > UINT8 OutStride;
>>> > > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
>>> > > UINT8 *Uint8Buffer;
>>> > >
>>> > > Status = CpuIoCheckParameter (FALSE, Width, Address, Count,
>Buffer);
>>> > > if (EFI_ERROR (Status)) {
>>> > > return Status;
>>> > > }
>>> > >
>>> > > //
>>> > > // Select loop based on the width of the transfer
>>> > > //
>>> > > InStride = mInStride[Width];
>>> > > OutStride = mOutStride[Width];
>>> > > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>>> > >
>>> > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
>>> > > if (InStride == 0) {
>>> > > switch (OperationWidth) {
>>> > > case EfiCpuIoWidthUint8:
>>> > > IoReadFifo8 ((UINTN)Address, Count, Buffer);
>>> > > return EFI_SUCCESS;
>>> > > case EfiCpuIoWidthUint16:
>>> > > IoReadFifo16 ((UINTN)Address, Count, Buffer);
>>> > > return EFI_SUCCESS;
>>> > > case EfiCpuIoWidthUint32:
>>> > > IoReadFifo32 ((UINTN)Address, Count, Buffer);
>>> > > return EFI_SUCCESS;
>>> > > default:
>>> > > //
>>> > > // The CpuIoCheckParameter call above will ensure that this
>>> > > // path is not taken.
>>> > > //
>>> > > ASSERT (FALSE);
>>> > > break;
>>> > > }
>>> > > }
>>> > > #endif
>>> > >
>>> > > for (Uint8Buffer = Buffer; Count > 0; Address += InStride,
>>> > > Uint8Buffer += OutStride, Count--) {
>>> > > if (OperationWidth == EfiCpuIoWidthUint8) {
>>> > > *Uint8Buffer = IoRead8 ((UINTN)Address);
>>> > > } else if (OperationWidth == EfiCpuIoWidthUint16) {
>>> > > *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
>>> > > } else if (OperationWidth == EfiCpuIoWidthUint32) {
>>> > > *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
>>> > > }
>>> > > }
>>> > >
>>> > > return EFI_SUCCESS;
>>> > > }
>>> > >
>>> > > EFI_STATUS
>>> > > EFIAPI
>>> > > CpuIoServiceWrite (
>>> > > IN EFI_CPU_IO2_PROTOCOL *This,
>>> > > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
>>> > > IN UINT64 Address,
>>> > > IN UINTN Count,
>>> > > IN VOID *Buffer
>>> > > )
>>> > > {
>>> > > EFI_STATUS Status;
>>> > > UINT8 InStride;
>>> > > UINT8 OutStride;
>>> > > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
>>> > > UINT8 *Uint8Buffer;
>>> > >
>>> > > //
>>> > > // Make sure the parameters are valid
>>> > > //
>>> > > Status = CpuIoCheckParameter (FALSE, Width, Address, Count,
>Buffer);
>>> > > if (EFI_ERROR (Status)) {
>>> > > return Status;
>>> > > }
>>> > >
>>> > > //
>>> > > // Select loop based on the width of the transfer
>>> > > //
>>> > > InStride = mInStride[Width];
>>> > > OutStride = mOutStride[Width];
>>> > > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
>>> > >
>>> > > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
>>> > > if (InStride == 0) {
>>> > > switch (OperationWidth) {
>>> > > case EfiCpuIoWidthUint8:
>>> > > IoWriteFifo8 ((UINTN)Address, Count, Buffer);
>>> > > return EFI_SUCCESS;
>>> > > case EfiCpuIoWidthUint16:
>>> > > IoWriteFifo16 ((UINTN)Address, Count, Buffer);
>>> > > return EFI_SUCCESS;
>>> > > case EfiCpuIoWidthUint32:
>>> > > IoWriteFifo32 ((UINTN)Address, Count, Buffer);
>>> > > return EFI_SUCCESS;
>>> > > default:
>>> > > //
>>> > > // The CpuIoCheckParameter call above will ensure that this
>>> > > // path is not taken.
>>> > > //
>>> > > ASSERT (FALSE);
>>> > > break;
>>> > > }
>>> > > }
>>> > > #endif
>>> > >
>>> > > for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address +=
>>> > > InStride, Uint8Buffer += OutStride, Count--) {
>>> > > if (OperationWidth == EfiCpuIoWidthUint8) {
>>> > > IoWrite8 ((UINTN)Address, *Uint8Buffer);
>>> > > } else if (OperationWidth == EfiCpuIoWidthUint16) {
>>> > > IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
>>> > > } else if (OperationWidth == EfiCpuIoWidthUint32) {
>>> > > IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
>>> > > }
>>> > > }
>>> > >
>>> > > return EFI_SUCCESS;
>>> > > }
>>> > > > -----Original Message-----
>>> > > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On
>>> > > > Behalf Of Leo Duran
>>> > > > Sent: Wednesday, January 11, 2017 7:56 AM
>>> > > > To: edk2-devel@lists.01.org
>>> > > > Cc: brijesh.singh@amd.com; Justen, Jordan L
>>> > > > <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>;
>>> > > > Leo Duran <leo.duran@amd.com>; Kinney, Michael D
>>> > > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
>>> > > > <jeff.fan@intel.com>
>>> > > > Subject: [edk2] [PATCH 0/8] IoLib class library
>>> > > >
>>> > > > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
>>> > > > duplicate implementations of I/O Fifo routines. The patch series
>>> > > > moves the I/O Fifo routines into the BaseIoLibIntrinsic library
>>> > > > and expands the IoLib class to include the ported I/O Fifo routines.
>>> > > >
>>> > > > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver
>>> > > > support
>>> > > > IA32 and X64 natively, and other architectures are supported by
>>> > > > simply looping through the basic IoRead/IoWrite routines as
>>> appropiate.
>>> > > >
>>> > > > The intent of this patch series is twofold:
>>> > > > 1) Integrate I/O Fifo routines into the IoLib class library.
>>> > > > 2) Allow override of IoLib as may be required to support specific
>>> > > > hardware implementations, such as AMD's Secure Encrypted
>>> > > > Virtualization
>>> > > (SEV).
>>> > > >
>>> > > > Leo Duran (8):
>>> > > > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
>>> > > > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
>>> > > > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
>>> > > > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
>>> > > > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
>>> > > > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib
>>> class
>>> > > > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
>>> > > > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
>>> > > >
>>> > > > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
>>> > > > +++++++++++++++++++++
>>> > > > MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
>>> > > > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
>>> > > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
>>> > > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
>>> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
>>> > > > ++++++++++++++++++
>>> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
>>> > > > ++++++++++++++++++
>>> > > > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
>>> > > > ++++++++++++++++++++
>>> > > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
>>> > > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
>>> > > > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
>>> > > > +++++++++++++++++++++
>>> > > > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
>>> > > > +++++++++++++++++++++
>>> > > > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
>>> > > > +++++++++++++++++++++
>>> > > > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
>>> > > > +++++++++++++++++++++
>>> > > > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
>>> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
>>> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
>>> > > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
>>> > > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
>>> > > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
>>> > > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
>>> > > > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
>>> > > > 22 files changed, 1751 insertions(+), 359 deletions(-) rename
>>> > > > {UefiCpuPkg/CpuIo2Dxe =>
>>> > > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
>>> > > > {UefiCpuPkg/CpuIo2Dxe =>
>>> > > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
>>> > > > {UefiCpuPkg/CpuIo2Dxe =>
>>> > > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
>>> > > > {UefiCpuPkg/CpuIo2Dxe =>
>>> > > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete
>>> > > > mode
>>> > > > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
>>> > > > delete mode 100644
>>> > > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
>>> > > > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
>>> > > >
>>> > > > --
>>> > > > 1.9.1
>>> > > >
>>> > > > _______________________________________________
>>> > > > edk2-devel mailing list
>>> > > > edk2-devel@lists.01.org
>>> > > > https://lists.01.org/mailman/listinfo/edk2-devel
>>> > > _______________________________________________
>>> > > edk2-devel mailing list
>>> > > edk2-devel@lists.01.org
>>> > > https://lists.01.org/mailman/listinfo/edk2-devel
>>> _______________________________________________
>>> edk2-devel mailing list
>>> edk2-devel@lists.01.org
>>> https://lists.01.org/mailman/listinfo/edk2-devel
>_______________________________________________
>edk2-devel mailing list
>edk2-devel@lists.01.org
>https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 0/8] IoLib class library
2017-01-11 4:06 ` Gao, Liming
2017-01-11 16:29 ` Duran, Leo
@ 2017-01-12 0:25 ` Duran, Leo
1 sibling, 0 replies; 25+ messages in thread
From: Duran, Leo @ 2017-01-12 0:25 UTC (permalink / raw)
To: Gao, Liming, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Justen, Jordan L, Singh, Brijesh, Fan, Jeff,
lersek@redhat.com
Liming, et al,
Bottom line, in my estimation:
Supporting EfiCpuIoWidthFifoUint# via the CPU I/O protocol would require significant rework of the CpuIo2Dxe driver.
(Which frankly is a bit beyond of the scope of my proposed patch set)
So, if you are in agreement, I'm prepared to submit a "v2" to correct the coding-style issues.
Thanks,
Leo.
> -----Original Message-----
> From: Duran, Leo
> Sent: Wednesday, January 11, 2017 10:29 AM
> To: 'Gao, Liming' <liming.gao@intel.com>; edk2-devel@lists.01.org
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>; Fan,
> Jeff <jeff.fan@intel.com>; lersek@redhat.com
> Subject: RE: [edk2] [PATCH 0/8] IoLib class library
>
> Liming,
>
> However, here are some issues with trying to use Fifo types via the I/O
> protocol:
> 1) CpuIo2Dxe.c - CpuIoCheckParameter(): Count is forced to 1 for Fifo types:
> //
> // For FIFO type, the target address won't increase during the access,
> // so treat Count as 1
> //
> if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64)
> {
> Count = 1;
> }
>
> 2) CpuIo2Dxe.c - CpuIoCheckParameter():Fifo types are
> eliminated/truncated:
> //
> // Check to see if Width is in the valid range for I/O Port operations
> //
> Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
> return EFI_INVALID_PARAMETER;
> }
>
> 3) CpuIo2Dxe.c - CpuIoServiceRead()/CpuIoServiceWrite():
> OperationWidth is only serviced for these cases: EfiCpuIoWidthUint8,
> EfiCpuIoWidthUint16, and EfiCpuIoWidthUint32 So the Fifo types are not
> serviced.
>
>
> > -----Original Message-----
> > From: Gao, Liming [mailto:liming.gao@intel.com]
> > Sent: Tuesday, January 10, 2017 10:07 PM
> > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> >
> > Leo:
> > edk2\UefiCpuPkg\CpuIo2Dxe\CpuIo2Dxe.c CpuIoServiceRead() bases on
> > IoReadFifo8() for EfiCpuIoWidthFifoUint8 width. So, IoLibCupIo2
> > library instance IoReadFifo8() implementation can call mCpuIo->Io.Read
> > (mCpuIo, EfiCpuIoWidthFifoUint8, Port, Count, Buffer);
> >
> > Thanks
> > Liming
> > -----Original Message-----
> > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> > Duran, Leo
> > Sent: Wednesday, January 11, 2017 11:37 AM
> > To: Gao, Liming <liming.gao@intel.com>; edk2-devel@lists.01.org
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Justen, Jordan L
> > <jordan.l.justen@intel.com>; Singh, Brijesh <brijesh.singh@amd.com>;
> > Fan, Jeff <jeff.fan@intel.com>; lersek@redhat.com
> > Subject: Re: [edk2] [PATCH 0/8] IoLib class library
> >
> > Liming...
> >
> > > -----Original Message-----
> > > From: Gao, Liming [mailto:liming.gao@intel.com]
> > > Sent: Tuesday, January 10, 2017 7:42 PM
> > > To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> > > Cc: Singh, Brijesh <brijesh.singh@amd.com>; Justen, Jordan L
> > > <jordan.l.justen@intel.com>; Kinney, Michael D
> > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > > <jeff.fan@intel.com>
> > > Subject: RE: [edk2] [PATCH 0/8] IoLib class library
> > >
> > > Leo:
> > > Thanks for your update. Here is my comments.
> > > 1) PeiIoLib, DxeIoLibCpuIo, DxeIoLibCpuIo2 library instance can base
> > > on CPU IO service to do FifoIo operation. They don't implement them
> > again.
> > > 2) IntelFrameworkModulePkg CpuIoDxe and UefiCpuPkg CpuIoPei driver
> > can
> > > be updated to base on FifoIo API for their FifoIo implementation.
> >
> > [Duran, Leo] I actually considered that, but the CPU I/O driver does
> > not provide FiFiIo service in its implementation of the
> EFI_CPU_IO2_PROTOCOL.
> > The CPU I/O driver does use the Fifo routines internally, and it does
> > so when that caller request IoRead/IoWrite... see the CPU I/O service
> routines below.
> >
> > > 3) One coding style issue. We don't assign value to the variable
> declaration.
> > > UINT8 *Buffer8 = (UINT8 *)Buffer;
> > > ==>
> > > UINT8 *Buffer8;
> > > Buffer8 = (UINT8 *)Buffer;
> >
> > [Duran, Leo] OK, I'll change that.
> >
> > >
> > > Thanks
> > > Liming
> > [Duran, Leo]
> >
> > EFI_STATUS
> > EFIAPI
> > CpuIoServiceRead (
> > IN EFI_CPU_IO2_PROTOCOL *This,
> > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> > IN UINT64 Address,
> > IN UINTN Count,
> > OUT VOID *Buffer
> > )
> > {
> > EFI_STATUS Status;
> > UINT8 InStride;
> > UINT8 OutStride;
> > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> > UINT8 *Uint8Buffer;
> >
> > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> > if (EFI_ERROR (Status)) {
> > return Status;
> > }
> >
> > //
> > // Select loop based on the width of the transfer
> > //
> > InStride = mInStride[Width];
> > OutStride = mOutStride[Width];
> > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >
> > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> > if (InStride == 0) {
> > switch (OperationWidth) {
> > case EfiCpuIoWidthUint8:
> > IoReadFifo8 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint16:
> > IoReadFifo16 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint32:
> > IoReadFifo32 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > default:
> > //
> > // The CpuIoCheckParameter call above will ensure that this
> > // path is not taken.
> > //
> > ASSERT (FALSE);
> > break;
> > }
> > }
> > #endif
> >
> > for (Uint8Buffer = Buffer; Count > 0; Address += InStride,
> > Uint8Buffer += OutStride, Count--) {
> > if (OperationWidth == EfiCpuIoWidthUint8) {
> > *Uint8Buffer = IoRead8 ((UINTN)Address);
> > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> > *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
> > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> > *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
> > }
> > }
> >
> > return EFI_SUCCESS;
> > }
> >
> > EFI_STATUS
> > EFIAPI
> > CpuIoServiceWrite (
> > IN EFI_CPU_IO2_PROTOCOL *This,
> > IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> > IN UINT64 Address,
> > IN UINTN Count,
> > IN VOID *Buffer
> > )
> > {
> > EFI_STATUS Status;
> > UINT8 InStride;
> > UINT8 OutStride;
> > EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth;
> > UINT8 *Uint8Buffer;
> >
> > //
> > // Make sure the parameters are valid
> > //
> > Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
> > if (EFI_ERROR (Status)) {
> > return Status;
> > }
> >
> > //
> > // Select loop based on the width of the transfer
> > //
> > InStride = mInStride[Width];
> > OutStride = mOutStride[Width];
> > OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
> >
> > #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
> > if (InStride == 0) {
> > switch (OperationWidth) {
> > case EfiCpuIoWidthUint8:
> > IoWriteFifo8 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint16:
> > IoWriteFifo16 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > case EfiCpuIoWidthUint32:
> > IoWriteFifo32 ((UINTN)Address, Count, Buffer);
> > return EFI_SUCCESS;
> > default:
> > //
> > // The CpuIoCheckParameter call above will ensure that this
> > // path is not taken.
> > //
> > ASSERT (FALSE);
> > break;
> > }
> > }
> > #endif
> >
> > for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride,
> > Uint8Buffer += OutStride, Count--) {
> > if (OperationWidth == EfiCpuIoWidthUint8) {
> > IoWrite8 ((UINTN)Address, *Uint8Buffer);
> > } else if (OperationWidth == EfiCpuIoWidthUint16) {
> > IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
> > } else if (OperationWidth == EfiCpuIoWidthUint32) {
> > IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
> > }
> > }
> >
> > return EFI_SUCCESS;
> > }
> > > -----Original Message-----
> > > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf
> > > Of Leo Duran
> > > Sent: Wednesday, January 11, 2017 7:56 AM
> > > To: edk2-devel@lists.01.org
> > > Cc: brijesh.singh@amd.com; Justen, Jordan L
> > > <jordan.l.justen@intel.com>; Gao, Liming <liming.gao@intel.com>; Leo
> > > Duran <leo.duran@amd.com>; Kinney, Michael D
> > > <michael.d.kinney@intel.com>; lersek@redhat.com; Fan, Jeff
> > > <jeff.fan@intel.com>
> > > Subject: [edk2] [PATCH 0/8] IoLib class library
> > >
> > > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> > > duplicate implementations of I/O Fifo routines. The patch series
> > > moves the I/O Fifo routines into the BaseIoLibIntrinsic library and
> > > expands the IoLib class to include the ported I/O Fifo routines.
> > >
> > > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support
> > > IA32 and X64 natively, and other architectures are supported by
> > > simply looping through the basic IoRead/IoWrite routines as appropiate.
> > >
> > > The intent of this patch series is twofold:
> > > 1) Integrate I/O Fifo routines into the IoLib class library.
> > > 2) Allow override of IoLib as may be required to support specific
> > > hardware implementations, such as AMD's Secure Encrypted
> > > Virtualization
> > (SEV).
> > >
> > > Leo Duran (8):
> > > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> > > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> > > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> > > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> > > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> > > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
> > > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib class library
> > > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
> > >
> > > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Include/Library/IoLib.h | 158 ++++++++++++++++
> > > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 1 +
> > > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 1 +
> > > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 182
> > > ++++++++++++++++++
> > > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 179
> > > ++++++++++++++++++
> > > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201
> > > ++++++++++++++++++++
> > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 1 +
> > > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 1 +
> > > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Library/DxeIoLibEsal/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 203
> > > +++++++++++++++++++++
> > > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 203
> > > +++++++++++++++++++++
> > > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ------
> > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +-----
> > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> > > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ------
> > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 3 +-
> > > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> > > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ------------------
> > > 22 files changed, 1751 insertions(+), 359 deletions(-) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (94%) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (94%) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (95%) rename
> > > {UefiCpuPkg/CpuIo2Dxe =>
> > > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (95%) delete
> > > mode
> > > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> > > delete mode 100644
> > > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> > > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
> > >
> > > --
> > > 1.9.1
> > >
> > > _______________________________________________
> > > edk2-devel mailing list
> > > edk2-devel@lists.01.org
> > > https://lists.01.org/mailman/listinfo/edk2-devel
> > _______________________________________________
> > edk2-devel mailing list
> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 25+ messages in thread