* [PATCH v3 01/10] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
@ 2017-01-13 20:09 ` Leo Duran
2017-01-13 20:09 ` [PATCH v3 02/10] UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library Leo Duran
` (10 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:09 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate
implementations of I/O Fifo routines. This patch clones the I/O Fifo
routines into the BaseIoLibIntrinsic library and expands the IoLib class
to include the ported I/O Fifo routines.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Include/Library/IoLib.h | 152 ++++++++++++++++
.../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm | 141 +++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm | 137 ++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 169 +++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 171 ++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 +++++++++++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm | 127 +++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm | 126 +++++++++++++
9 files changed, 1229 insertions(+), 1 deletion(-)
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
create mode 100644 MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
diff --git a/MdePkg/Include/Library/IoLib.h b/MdePkg/Include/Library/IoLib.h
index a0dd16b..b6df4c1 100644
--- a/MdePkg/Include/Library/IoLib.h
+++ b/MdePkg/Include/Library/IoLib.h
@@ -2,6 +2,8 @@
Provide services to access I/O Ports and MMIO registers.
Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -76,6 +78,56 @@ IoWrite8 (
);
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
Reads an 8-bit I/O port, performs a bitwise OR, and writes the
result back to the 8-bit I/O port.
@@ -368,6 +420,56 @@ IoWrite16 (
);
/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
Reads a 16-bit I/O port, performs a bitwise OR, and writes the
result back to the 16-bit I/O port.
@@ -669,6 +771,56 @@ IoWrite32 (
);
/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ );
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
Reads a 32-bit I/O port, performs a bitwise OR, and writes the
result back to the 32-bit I/O port.
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
index 29b9e8b..8844b1c 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -8,6 +8,7 @@
#
# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -16,7 +17,6 @@
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
-#
##
[Defines]
@@ -43,12 +43,16 @@ [Sources.IA32]
IoLibMsc.c | MSFT
IoLibIcc.c | INTEL
IoLib.c
+ Ia32/IoFifo.nasm
+ Ia32/IoFifo.asm
[Sources.X64]
IoLibGcc.c | GCC
IoLibMsc.c | MSFT
IoLibIcc.c | INTEL
IoLib.c
+ X64/IoFifo.nasm
+ X64/IoFifo.asm
[Sources.EBC]
IoLibEbc.c
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
new file mode 100644
index 0000000..da767d1
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
@@ -0,0 +1,141 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoReadFifo8 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insb
+ pop edi
+ ret
+IoReadFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoReadFifo16 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insw
+ pop edi
+ ret
+IoReadFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoReadFifo32 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insd
+ pop edi
+ ret
+IoReadFifo32 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo8 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsb
+ pop esi
+ ret
+IoWriteFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo16 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsw
+ pop esi
+ ret
+IoWriteFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo32 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsd
+ pop esi
+ ret
+IoWriteFifo32 ENDP
+
+ END
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
new file mode 100644
index 0000000..bcaa743
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
@@ -0,0 +1,137 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insb
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insw
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; OUT VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insd
+ pop edi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsb
+ pop esi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsw
+ pop esi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsd
+ pop esi
+ ret
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
index b9f4c5e..5ce12ca 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
@@ -3,6 +3,8 @@
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -221,6 +223,173 @@ IoWrite64 (
return 0;
}
+/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
/**
Reads an 8-bit MMIO register.
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
index e12a5ae..dd87190 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
@@ -4,6 +4,8 @@
EBC does not support port I/O. All APIs in this file ASSERT().
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -169,3 +171,172 @@ IoWrite32 (
ASSERT (FALSE);
return 0;
}
+
+/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ ASSERT (FALSE);
+}
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
index 6b0bf6a..e388549 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
@@ -2,6 +2,8 @@
Common I/O Library routines.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -147,6 +149,7 @@ IoRead64 (
return 0;
}
+
/**
Writes an 8-bit I/O port.
@@ -252,6 +255,204 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8;
+
+ Buffer8 = (UINT8 *)Buffer;
+ while (Count--) {
+ *Buffer8++ = IoRead8 (Port);
+ }
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16;
+
+ Buffer16 = (UINT16 *)Buffer;
+ while (Count--) {
+ *Buffer16++ = IoRead16 (Port);
+ }
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32;
+
+ Buffer32 = (UINT32 *)Buffer;
+ while (Count--) {
+ *Buffer32++ = IoRead32 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ UINT8 *Buffer8;
+
+ Buffer8 = (UINT8 *)Buffer;
+ while (Count--) {
+ IoWrite8 (Port, *Buffer8++);
+ }
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ UINT16 *Buffer16;
+
+ Buffer16 = (UINT16 *)Buffer;
+ while (Count--) {
+ IoWrite16 (Port, *Buffer16++);
+ }
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ UINT32 *Buffer32;
+
+ Buffer32 = (UINT32 *)Buffer;
+ while (Count--) {
+ IoWrite32 (Port, *Buffer32++);
+ }
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
new file mode 100644
index 0000000..87c6107
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
@@ -0,0 +1,127 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insb
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insw
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insd
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo32 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsb
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsw
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsd
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo32 ENDP
+
+ END
+
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
new file mode 100644
index 0000000..7bd72d0
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
@@ -0,0 +1,126 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
+; This program and the accompanying materials are licensed and made available
+; under the terms and conditions of the BSD License which accompanies this
+; distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insb
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insw
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; OUT VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insd
+ mov rdi, r8 ; restore rdi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsb
+ mov rsi, r8 ; restore rsi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsw
+ mov rsi, r8 ; restore rsi
+ ret
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsd
+ mov rsi, r8 ; restore rsi
+ ret
+
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v3 02/10] UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
2017-01-13 20:09 ` [PATCH v3 01/10] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library Leo Duran
@ 2017-01-13 20:09 ` Leo Duran
2017-01-16 0:49 ` Fan, Jeff
2017-01-13 20:09 ` [PATCH v3 03/10] UefiCpuPkg: Modify CpuIoPei to support " Leo Duran
` (9 subsequent siblings)
11 siblings, 1 reply; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:09 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
The Fifo routines from the UefiCpuPkg/CpuIo2Dxe driver have been
moved to the new BaseIoLibIntrinsic (IoLib class) library.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 13 ++-
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +--
UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm | 140 ---------------------------
UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm | 136 --------------------------
UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ----------------------------------
UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm | 126 ------------------------
UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm | 125 ------------------------
7 files changed, 10 insertions(+), 717 deletions(-)
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
index 6ccfc40..60f4bbc 100644
--- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
+++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
@@ -2,6 +2,8 @@
Produces the CPU I/O 2 Protocol.
Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -13,7 +15,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "CpuIo2Dxe.h"
-#include "IoFifo.h"
//
// Handle for the CPU I/O 2 Protocol
@@ -412,7 +413,9 @@ CpuIoServiceRead (
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
-#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+ //
+ // Fifo operations supported for (mInStride[Width] == 0)
+ //
if (InStride == 0) {
switch (OperationWidth) {
case EfiCpuIoWidthUint8:
@@ -433,7 +436,6 @@ CpuIoServiceRead (
break;
}
}
-#endif
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
@@ -518,7 +520,9 @@ CpuIoServiceWrite (
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
-#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+ //
+ // Fifo operations supported for (mInStride[Width] == 0)
+ //
if (InStride == 0) {
switch (OperationWidth) {
case EfiCpuIoWidthUint8:
@@ -539,7 +543,6 @@ CpuIoServiceWrite (
break;
}
}
-#endif
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
index 920ede7..5503662 100644
--- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
+++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
@@ -2,6 +2,8 @@
# Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
#
# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -30,15 +32,6 @@ [Defines]
[Sources]
CpuIo2Dxe.c
CpuIo2Dxe.h
- IoFifo.h
-
-[Sources.IA32]
- Ia32/IoFifo.nasm
- Ia32/IoFifo.asm
-
-[Sources.X64]
- X64/IoFifo.nasm
- X64/IoFifo.asm
[Packages]
MdePkg/MdePkg.dec
diff --git a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm b/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm
deleted file mode 100644
index b1cc25e..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm
+++ /dev/null
@@ -1,140 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .586P
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insw
- pop edi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insd
- pop edi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsw
- pop esi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsd
- pop esi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm b/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm
deleted file mode 100644
index daa90a9..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm
+++ /dev/null
@@ -1,136 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo16)
-ASM_PFX(IoReadFifo16):
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insw
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo32)
-ASM_PFX(IoReadFifo32):
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insd
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo16)
-ASM_PFX(IoWriteFifo16):
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsw
- pop esi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo32)
-ASM_PFX(IoWriteFifo32):
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsd
- pop esi
- ret
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/IoFifo.h b/UefiCpuPkg/CpuIo2Dxe/IoFifo.h
deleted file mode 100644
index 9978f8b..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/IoFifo.h
+++ /dev/null
@@ -1,176 +0,0 @@
-/** @file
- I/O FIFO routines
-
- Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials are licensed and made available
- under the terms and conditions of the BSD License which accompanies this
- distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _IO_FIFO_H_INCLUDED_
-#define _IO_FIFO_H_INCLUDED_
-
-/**
- Reads an 8-bit I/O port fifo into a block of memory.
-
- Reads the 8-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Reads a 16-bit I/O port fifo into a block of memory.
-
- Reads the 16-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo16 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Reads a 32-bit I/O port fifo into a block of memory.
-
- Reads the 32-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo32 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes a block of memory into an 8-bit I/O port fifo.
-
- Writes the 8-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
-
- This function must guarantee that all I/O write and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to store the write data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes a block of memory into a 16-bit I/O port fifo.
-
- Writes the 16-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
-
- This function must guarantee that all I/O write and write operations are
- serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to store the write data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo16 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes a block of memory into a 32-bit I/O port fifo.
-
- Writes the 32-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
-
- This function must guarantee that all I/O write and write operations are
- serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to store the write data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo32 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-#endif
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm b/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm
deleted file mode 100644
index 1a3f0ef..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm
+++ /dev/null
@@ -1,126 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insw
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insd
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsb
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsw
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsd
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm b/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm
deleted file mode 100644
index bb3d1da..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm
+++ /dev/null
@@ -1,125 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-;
-; This program and the accompanying materials are licensed and made available
-; under the terms and conditions of the BSD License which accompanies this
-; distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- DEFAULT REL
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo16)
-ASM_PFX(IoReadFifo16):
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insw
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo32)
-ASM_PFX(IoReadFifo32):
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insd
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsb
- mov rsi, r8 ; restore rsi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo16)
-ASM_PFX(IoWriteFifo16):
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsw
- mov rsi, r8 ; restore rsi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo32)
-ASM_PFX(IoWriteFifo32):
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsd
- mov rsi, r8 ; restore rsi
- ret
-
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v3 02/10] UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library
2017-01-13 20:09 ` [PATCH v3 02/10] UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library Leo Duran
@ 2017-01-16 0:49 ` Fan, Jeff
0 siblings, 0 replies; 19+ messages in thread
From: Fan, Jeff @ 2017-01-16 0:49 UTC (permalink / raw)
To: Leo Duran, edk2-devel@lists.01.org
Cc: Gao, Liming, Kinney, Michael D, Justen, Jordan L,
lersek@redhat.com, brijesh.singh@amd.com
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
-----Original Message-----
From: Leo Duran [mailto:leo.duran@amd.com]
Sent: Saturday, January 14, 2017 4:10 AM
To: edk2-devel@lists.01.org
Cc: Gao, Liming; Kinney, Michael D; Fan, Jeff; Justen, Jordan L; lersek@redhat.com; brijesh.singh@amd.com; Leo Duran
Subject: [PATCH v3 02/10] UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library
The Fifo routines from the UefiCpuPkg/CpuIo2Dxe driver have been moved to the new BaseIoLibIntrinsic (IoLib class) library.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 13 ++-
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +--
UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm | 140 --------------------------- UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm | 136 --------------------------
UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 ----------------------------------
UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm | 126 ------------------------
UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm | 125 ------------------------
7 files changed, 10 insertions(+), 717 deletions(-) delete mode 100644 UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h delete mode 100644 UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm
diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
index 6ccfc40..60f4bbc 100644
--- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
+++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
@@ -2,6 +2,8 @@
Produces the CPU I/O 2 Protocol.
Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -13,7 +15,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "CpuIo2Dxe.h"
-#include "IoFifo.h"
//
// Handle for the CPU I/O 2 Protocol
@@ -412,7 +413,9 @@ CpuIoServiceRead (
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
-#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+ //
+ // Fifo operations supported for (mInStride[Width] == 0) //
if (InStride == 0) {
switch (OperationWidth) {
case EfiCpuIoWidthUint8:
@@ -433,7 +436,6 @@ CpuIoServiceRead (
break;
}
}
-#endif
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) { @@ -518,7 +520,9 @@ CpuIoServiceWrite (
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
-#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+ //
+ // Fifo operations supported for (mInStride[Width] == 0) //
if (InStride == 0) {
switch (OperationWidth) {
case EfiCpuIoWidthUint8:
@@ -539,7 +543,6 @@ CpuIoServiceWrite (
break;
}
}
-#endif
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) { diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
index 920ede7..5503662 100644
--- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
+++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
@@ -2,6 +2,8 @@
# Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
#
# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR> #
# This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License # which accompanies this distribution. The full text of the license may be found at @@ -30,15 +32,6 @@ [Defines] [Sources]
CpuIo2Dxe.c
CpuIo2Dxe.h
- IoFifo.h
-
-[Sources.IA32]
- Ia32/IoFifo.nasm
- Ia32/IoFifo.asm
-
-[Sources.X64]
- X64/IoFifo.nasm
- X64/IoFifo.asm
[Packages]
MdePkg/MdePkg.dec
diff --git a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm b/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm
deleted file mode 100644
index b1cc25e..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.asm
+++ /dev/null
@@ -1,140 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> -; -; This program and the accompanying materials are licensed and made available -; under the terms and conditions of the BSD License which accompanies this -; distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .586P
- .model flat,C
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insw
- pop edi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insd
- pop edi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsw
- pop esi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsd
- pop esi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm b/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm
deleted file mode 100644
index daa90a9..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/Ia32/IoFifo.nasm
+++ /dev/null
@@ -1,136 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> -; -; This program and the accompanying materials are licensed and made available -; under the terms and conditions of the BSD License which accompanies this -; distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo16)
-ASM_PFX(IoReadFifo16):
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insw
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo32)
-ASM_PFX(IoReadFifo32):
- push edi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov edi, [esp + 16]
-rep insd
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo16)
-ASM_PFX(IoWriteFifo16):
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsw
- pop esi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo32)
-ASM_PFX(IoWriteFifo32):
- push esi
- cld
- mov dx, [esp + 8]
- mov ecx, [esp + 12]
- mov esi, [esp + 16]
-rep outsd
- pop esi
- ret
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/IoFifo.h b/UefiCpuPkg/CpuIo2Dxe/IoFifo.h deleted file mode 100644 index 9978f8b..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/IoFifo.h
+++ /dev/null
@@ -1,176 +0,0 @@
-/** @file
- I/O FIFO routines
-
- Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
-
- This program and the accompanying materials are licensed and made available
- under the terms and conditions of the BSD License which accompanies this
- distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _IO_FIFO_H_INCLUDED_
-#define _IO_FIFO_H_INCLUDED_
-
-/**
- Reads an 8-bit I/O port fifo into a block of memory.
-
- Reads the 8-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Reads a 16-bit I/O port fifo into a block of memory.
-
- Reads the 16-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo16 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Reads a 32-bit I/O port fifo into a block of memory.
-
- Reads the 32-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo32 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes a block of memory into an 8-bit I/O port fifo.
-
- Writes the 8-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
-
- This function must guarantee that all I/O write and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to store the write data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes a block of memory into a 16-bit I/O port fifo.
-
- Writes the 16-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
-
- This function must guarantee that all I/O write and write operations are
- serialized.
-
- If 16-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to store the write data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo16 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes a block of memory into a 32-bit I/O port fifo.
-
- Writes the 32-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the write data is
- retrieved from the provided Buffer.
-
- This function must guarantee that all I/O write and write operations are
- serialized.
-
- If 32-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to write.
- @param Count The number of times to write I/O port.
- @param Buffer The buffer to store the write data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo32 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-#endif
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm b/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm
deleted file mode 100644
index 1a3f0ef..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.asm
+++ /dev/null
@@ -1,126 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> -; -; This program and the accompanying materials are licensed and made available -; under the terms and conditions of the BSD License which accompanies this -; distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- .code
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insw
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoReadFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insd
- mov rdi, r8 ; restore rdi
- ret
-IoReadFifo32 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo8 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsb
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo8 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo16 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsw
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo16 ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-IoWriteFifo32 PROC
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsd
- mov rsi, r8 ; restore rsi
- ret
-IoWriteFifo32 ENDP
-
- END
-
diff --git a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm b/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm
deleted file mode 100644
index bb3d1da..0000000
--- a/UefiCpuPkg/CpuIo2Dxe/X64/IoFifo.nasm
+++ /dev/null
@@ -1,125 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR> -; -; This program and the accompanying materials are licensed and made available -; under the terms and conditions of the BSD License which accompanies this -; distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- DEFAULT REL
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo16)
-ASM_PFX(IoReadFifo16):
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insw
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo32)
-ASM_PFX(IoReadFifo32):
- cld
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insd
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsb
- mov rsi, r8 ; restore rsi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo16 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo16)
-ASM_PFX(IoWriteFifo16):
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsw
- mov rsi, r8 ; restore rsi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo32 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo32)
-ASM_PFX(IoWriteFifo32):
- cld
- xchg rcx, rdx
- xchg rsi, r8 ; rsi: buffer address; r8: save rsi
-rep outsd
- mov rsi, r8 ; restore rsi
- ret
-
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v3 03/10] UefiCpuPkg: Modify CpuIoPei to support new IoLib library
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
2017-01-13 20:09 ` [PATCH v3 01/10] MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library Leo Duran
2017-01-13 20:09 ` [PATCH v3 02/10] UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library Leo Duran
@ 2017-01-13 20:09 ` Leo Duran
2017-01-16 0:49 ` Fan, Jeff
2017-01-13 20:09 ` [PATCH v3 04/10] IntelFrameworkModulePkg: Modify CpuIoDxe " Leo Duran
` (8 subsequent siblings)
11 siblings, 1 reply; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:09 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
The IO_PPI supports Fifo types by invoking the Fifo routines in the
new BaseIoLibIntrinsic (IoLib class) library.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
UefiCpuPkg/CpuIoPei/CpuIoPei.c | 52 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/UefiCpuPkg/CpuIoPei/CpuIoPei.c b/UefiCpuPkg/CpuIoPei/CpuIoPei.c
index 3c5c8a7..b6d538b 100644
--- a/UefiCpuPkg/CpuIoPei/CpuIoPei.c
+++ b/UefiCpuPkg/CpuIoPei/CpuIoPei.c
@@ -2,6 +2,8 @@
Produces the CPU I/O PPI.
Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -375,6 +377,31 @@ CpuIoServiceRead (
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
+
+ //
+ // Fifo operations supported for (mInStride[Width] == 0)
+ //
+ if (InStride == 0) {
+ switch (OperationWidth) {
+ case EfiPeiCpuIoWidthUint8:
+ IoReadFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPeiCpuIoWidthUint16:
+ IoReadFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPeiCpuIoWidthUint32:
+ IoReadFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ }
+
Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiPeiCpuIoWidthUint8) {
@@ -447,6 +474,31 @@ CpuIoServiceWrite (
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
+
+ //
+ // Fifo operations supported for (mInStride[Width] == 0)
+ //
+ if (InStride == 0) {
+ switch (OperationWidth) {
+ case EfiPeiCpuIoWidthUint8:
+ IoWriteFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPeiCpuIoWidthUint16:
+ IoWriteFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPeiCpuIoWidthUint32:
+ IoWriteFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ }
+
Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiPeiCpuIoWidthUint8) {
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v3 03/10] UefiCpuPkg: Modify CpuIoPei to support new IoLib library
2017-01-13 20:09 ` [PATCH v3 03/10] UefiCpuPkg: Modify CpuIoPei to support " Leo Duran
@ 2017-01-16 0:49 ` Fan, Jeff
0 siblings, 0 replies; 19+ messages in thread
From: Fan, Jeff @ 2017-01-16 0:49 UTC (permalink / raw)
To: Leo Duran, edk2-devel@lists.01.org
Cc: Gao, Liming, Kinney, Michael D, Justen, Jordan L,
lersek@redhat.com, brijesh.singh@amd.com
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
-----Original Message-----
From: Leo Duran [mailto:leo.duran@amd.com]
Sent: Saturday, January 14, 2017 4:10 AM
To: edk2-devel@lists.01.org
Cc: Gao, Liming; Kinney, Michael D; Fan, Jeff; Justen, Jordan L; lersek@redhat.com; brijesh.singh@amd.com; Leo Duran
Subject: [PATCH v3 03/10] UefiCpuPkg: Modify CpuIoPei to support new IoLib library
The IO_PPI supports Fifo types by invoking the Fifo routines in the new BaseIoLibIntrinsic (IoLib class) library.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
UefiCpuPkg/CpuIoPei/CpuIoPei.c | 52 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/UefiCpuPkg/CpuIoPei/CpuIoPei.c b/UefiCpuPkg/CpuIoPei/CpuIoPei.c index 3c5c8a7..b6d538b 100644
--- a/UefiCpuPkg/CpuIoPei/CpuIoPei.c
+++ b/UefiCpuPkg/CpuIoPei/CpuIoPei.c
@@ -2,6 +2,8 @@
Produces the CPU I/O PPI.
Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -375,6 +377,31 @@ CpuIoServiceRead (
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
+
+ //
+ // Fifo operations supported for (mInStride[Width] == 0) // if
+ (InStride == 0) {
+ switch (OperationWidth) {
+ case EfiPeiCpuIoWidthUint8:
+ IoReadFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPeiCpuIoWidthUint16:
+ IoReadFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPeiCpuIoWidthUint32:
+ IoReadFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ }
+
Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiPeiCpuIoWidthUint8) { @@ -447,6 +474,31 @@ CpuIoServiceWrite (
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03);
+
+ //
+ // Fifo operations supported for (mInStride[Width] == 0) // if
+ (InStride == 0) {
+ switch (OperationWidth) {
+ case EfiPeiCpuIoWidthUint8:
+ IoWriteFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPeiCpuIoWidthUint16:
+ IoWriteFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPeiCpuIoWidthUint32:
+ IoWriteFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ }
+
Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiPeiCpuIoWidthUint8) {
--
1.9.1
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v3 04/10] IntelFrameworkModulePkg: Modify CpuIoDxe to support new IoLib library
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
` (2 preceding siblings ...)
2017-01-13 20:09 ` [PATCH v3 03/10] UefiCpuPkg: Modify CpuIoPei to support " Leo Duran
@ 2017-01-13 20:09 ` Leo Duran
2017-01-16 0:50 ` Fan, Jeff
2017-01-13 20:09 ` [PATCH v3 05/10] MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class Leo Duran
` (7 subsequent siblings)
11 siblings, 1 reply; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:09 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
The IO_PROTOCOL supports Fifo types by invoking the Fifo routines in the
new BaseIoLibIntrinsic (IoLib class) library.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c | 52 ++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c b/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
index e48b638..9db9dbe 100644
--- a/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
+++ b/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
@@ -2,6 +2,8 @@
Uses the services of the I/O Library to produce the CPU I/O Protocol
Copyright (c) 2004 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -410,6 +412,31 @@ CpuIoServiceRead (
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+
+ //
+ // Fifo operations supported for (mInStride[Width] == 0)
+ //
+ if (InStride == 0) {
+ switch (OperationWidth) {
+ case EfiCpuIoWidthUint8:
+ IoReadFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint16:
+ IoReadFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint32:
+ IoReadFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ }
+
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
*Uint8Buffer = IoRead8 ((UINTN)Address);
@@ -492,6 +519,31 @@ CpuIoServiceWrite (
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+
+ //
+ // Fifo operations supported for (mInStride[Width] == 0)
+ //
+ if (InStride == 0) {
+ switch (OperationWidth) {
+ case EfiCpuIoWidthUint8:
+ IoWriteFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint16:
+ IoWriteFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint32:
+ IoWriteFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ }
+
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
IoWrite8 ((UINTN)Address, *Uint8Buffer);
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v3 04/10] IntelFrameworkModulePkg: Modify CpuIoDxe to support new IoLib library
2017-01-13 20:09 ` [PATCH v3 04/10] IntelFrameworkModulePkg: Modify CpuIoDxe " Leo Duran
@ 2017-01-16 0:50 ` Fan, Jeff
0 siblings, 0 replies; 19+ messages in thread
From: Fan, Jeff @ 2017-01-16 0:50 UTC (permalink / raw)
To: Leo Duran, edk2-devel@lists.01.org
Cc: Gao, Liming, Kinney, Michael D, Justen, Jordan L,
lersek@redhat.com, brijesh.singh@amd.com
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
-----Original Message-----
From: Leo Duran [mailto:leo.duran@amd.com]
Sent: Saturday, January 14, 2017 4:10 AM
To: edk2-devel@lists.01.org
Cc: Gao, Liming; Kinney, Michael D; Fan, Jeff; Justen, Jordan L; lersek@redhat.com; brijesh.singh@amd.com; Leo Duran
Subject: [PATCH v3 04/10] IntelFrameworkModulePkg: Modify CpuIoDxe to support new IoLib library
The IO_PROTOCOL supports Fifo types by invoking the Fifo routines in the new BaseIoLibIntrinsic (IoLib class) library.
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c | 52 ++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c b/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
index e48b638..9db9dbe 100644
--- a/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
+++ b/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
@@ -2,6 +2,8 @@
Uses the services of the I/O Library to produce the CPU I/O Protocol
Copyright (c) 2004 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -410,6 +412,31 @@ CpuIoServiceRead (
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+
+ //
+ // Fifo operations supported for (mInStride[Width] == 0) // if
+ (InStride == 0) {
+ switch (OperationWidth) {
+ case EfiCpuIoWidthUint8:
+ IoReadFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint16:
+ IoReadFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint32:
+ IoReadFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ }
+
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
*Uint8Buffer = IoRead8 ((UINTN)Address); @@ -492,6 +519,31 @@ CpuIoServiceWrite (
InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+
+ //
+ // Fifo operations supported for (mInStride[Width] == 0) // if
+ (InStride == 0) {
+ switch (OperationWidth) {
+ case EfiCpuIoWidthUint8:
+ IoWriteFifo8 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint16:
+ IoWriteFifo16 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiCpuIoWidthUint32:
+ IoWriteFifo32 ((UINTN)Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The CpuIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ }
+
for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (OperationWidth == EfiCpuIoWidthUint8) {
IoWrite8 ((UINTN)Address, *Uint8Buffer);
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v3 05/10] MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
` (3 preceding siblings ...)
2017-01-13 20:09 ` [PATCH v3 04/10] IntelFrameworkModulePkg: Modify CpuIoDxe " Leo Duran
@ 2017-01-13 20:09 ` Leo Duran
2017-01-13 20:09 ` [PATCH v3 06/10] MdePkg/PeiIoLibCpuIo: " Leo Duran
` (6 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:09 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
.../Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h | 71 +++++-
MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 260 ++++++++++++++++++++-
2 files changed, 320 insertions(+), 11 deletions(-)
diff --git a/MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h b/MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h
index 160bedf..c84ce6b 100644
--- a/MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h
+++ b/MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h
@@ -2,6 +2,8 @@
Internal include file of DXE CPU IO2 Library.
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
@@ -29,8 +31,10 @@
Reads registers in the EFI CPU I/O space.
Reads the I/O port specified by Port with registers width specified by Width.
- The read value is returned. If such operations are not supported, then ASSERT().
+ The read value is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -42,16 +46,18 @@
UINT64
EFIAPI
IoReadWorker (
- IN UINTN Port,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
);
/**
Writes registers in the EFI CPU I/O space.
Writes the I/O port specified by Port with registers width and value specified by Width
- and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ and Data respectively. Data is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -64,9 +70,59 @@ IoReadWorker (
UINT64
EFIAPI
IoWriteWorker (
- IN UINTN Port,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Data
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ );
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
);
/**
@@ -79,6 +135,7 @@ IoWriteWorker (
@param Address The MMIO register to read.
The caller is responsible for aligning the Address if required.
@param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
@return Data read from registers in the EFI system memory space.
diff --git a/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c b/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c
index 110f66c..4182e29 100644
--- a/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c
+++ b/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c
@@ -2,6 +2,8 @@
I/O Library instance based on EFI_CPU_IO2_PROTOCOL.
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
@@ -50,8 +52,10 @@ IoLibConstructor (
Reads registers in the EFI CPU I/O space.
Reads the I/O port specified by Port with registers width specified by Width.
- The read value is returned. If such operations are not supported, then ASSERT().
+ The read value is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -67,8 +71,8 @@ IoReadWorker (
IN EFI_CPU_IO_PROTOCOL_WIDTH Width
)
{
- EFI_STATUS Status;
- UINT64 Data;
+ EFI_STATUS Status;
+ UINT64 Data;
Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
ASSERT_EFI_ERROR (Status);
@@ -80,8 +84,10 @@ IoReadWorker (
Writes registers in the EFI CPU I/O space.
Writes the I/O port specified by Port with registers width and value specified by Width
- and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ and Data respectively. Data is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -108,6 +114,68 @@ IoWriteWorker (
}
/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
Reads memory-mapped registers in the EFI system memory space.
Reads the MMIO registers specified by Address with registers width specified by Width.
@@ -397,6 +465,190 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v3 06/10] MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
` (4 preceding siblings ...)
2017-01-13 20:09 ` [PATCH v3 05/10] MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class Leo Duran
@ 2017-01-13 20:09 ` Leo Duran
2017-01-13 20:09 ` [PATCH v3 07/10] MdePkg/DxeIoLibEsal: " Leo Duran
` (5 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:09 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 261 +++++++++++++++++++++++++++++++++++
1 file changed, 261 insertions(+)
diff --git a/MdePkg/Library/PeiIoLibCpuIo/IoLib.c b/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
index 1f50a12..e09bec9 100644
--- a/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
+++ b/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
@@ -2,6 +2,8 @@
I/O Library. The implementations are based on EFI_PEI_SERVICE->CpuIo interface.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -20,6 +22,81 @@
#include <Library/BaseLib.h>
#include <Library/PeiServicesTablePointerLib.h>
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ CONST EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+ EFI_STATUS Status;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+ ASSERT (CpuIo != NULL);
+
+ Status = CpuIo->Io.Read (PeiServices, CpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ CONST EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+ EFI_STATUS Status;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+ ASSERT (CpuIo != NULL);
+
+ Status = CpuIo->Io.Write (PeiServices, CpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
/**
Reads an 8-bit I/O port.
@@ -297,6 +374,190 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v3 07/10] MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
` (5 preceding siblings ...)
2017-01-13 20:09 ` [PATCH v3 06/10] MdePkg/PeiIoLibCpuIo: " Leo Duran
@ 2017-01-13 20:09 ` Leo Duran
2017-01-13 20:09 ` [PATCH v3 08/10] MdePkg/SmmIoLibSmmCpuIo2: " Leo Duran
` (4 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:09 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Library/DxeIoLibEsal/IoLib.c | 278 +++++++++++++++++++++++++++++++++++-
1 file changed, 276 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Library/DxeIoLibEsal/IoLib.c b/MdePkg/Library/DxeIoLibEsal/IoLib.c
index 3a58b51..ab186a6 100644
--- a/MdePkg/Library/DxeIoLibEsal/IoLib.c
+++ b/MdePkg/Library/DxeIoLibEsal/IoLib.c
@@ -2,6 +2,8 @@
I/O Library basic function implementation and worker functions.
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -18,8 +20,10 @@
Reads registers in the EFI CPU I/O space.
Reads the I/O port specified by Port with registers width specified by Width.
- The read value is returned. If such operations are not supported, then ASSERT().
+ The read value is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -60,8 +64,10 @@ IoReadWorker (
Writes registers in the EFI CPU I/O space.
Writes the I/O port specified by Port with registers width and value specified by Width
- and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ and Data respectively. Data is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -98,6 +104,90 @@ IoWriteWorker (
}
/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ SAL_RETURN_REGS ReturnReg;
+
+ ReturnReg = EsalCall (
+ EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
+ EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
+ IoReadFunctionId,
+ (UINT64)Width,
+ Port,
+ Count,
+ (UINT64)Buffer,
+ 0,
+ 0,
+ 0
+ );
+ ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
+}
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ SAL_RETURN_REGS ReturnReg;
+
+ ReturnReg = EsalCall (
+ EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
+ EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
+ IoWriteFunctionId,
+ (UINT64)Width,
+ Port,
+ Count,
+ (UINT64)Buffer,
+ 0,
+ 0,
+ 0
+ );
+ ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
+}
+
+/**
Reads memory-mapped registers in the EFI system memory space.
Reads the MMIO registers specified by Address with registers width specified by Width.
@@ -397,6 +487,190 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v3 08/10] MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
` (6 preceding siblings ...)
2017-01-13 20:09 ` [PATCH v3 07/10] MdePkg/DxeIoLibEsal: " Leo Duran
@ 2017-01-13 20:09 ` Leo Duran
2017-01-13 20:09 ` [PATCH v3 09/10] IntelFrameworkPkg/DxeIoLibCpuIo: " Leo Duran
` (3 subsequent siblings)
11 siblings, 0 replies; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:09 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 216 +++++++++++++++++++++++++++++++
1 file changed, 216 insertions(+)
diff --git a/MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c b/MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c
index 7c8a603..0279bde 100644
--- a/MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c
+++ b/MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c
@@ -4,6 +4,8 @@
are based on EFI_CPU_IO_PROTOCOL.
Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -367,6 +369,220 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT8 *Buffer8;
+
+ Buffer8 = (UINT8 *)Buffer;
+ while (Count--) {
+ *Buffer8++ = IoRead8 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ UINT8 *Buffer8;
+
+ Buffer8 = (UINT8 *)Buffer;
+ while (Count--) {
+ IoWrite8 (Port, *Buffer8++);
+ }
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT16 *Buffer16;
+
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ Buffer16 = (UINT16 *)Buffer;
+ while (Count--) {
+ *Buffer16++ = IoRead16 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ UINT16 *Buffer16;
+
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ Buffer16 = (UINT16 *)Buffer;
+ while (Count--) {
+ IoWrite16 (Port, *Buffer16++);
+ }
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ UINT32 *Buffer32;
+
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ Buffer32 = (UINT32 *)Buffer;
+ while (Count--) {
+ *Buffer32++ = IoRead32 (Port);
+ }
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ UINT32 *Buffer32;
+
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ Buffer32 = (UINT32 *)Buffer;
+ while (Count--) {
+ IoWrite32 (Port, *Buffer32++);
+ }
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v3 09/10] IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
` (7 preceding siblings ...)
2017-01-13 20:09 ` [PATCH v3 08/10] MdePkg/SmmIoLibSmmCpuIo2: " Leo Duran
@ 2017-01-13 20:09 ` Leo Duran
2017-01-16 0:54 ` Fan, Jeff
2017-01-13 20:10 ` [PATCH v3 10/10] OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library Leo Duran
` (2 subsequent siblings)
11 siblings, 1 reply; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:09 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
.../Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h | 70 +++++-
IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 248 +++++++++++++++++++++
2 files changed, 311 insertions(+), 7 deletions(-)
diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h
index 66c73fe..c15bca8 100644
--- a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h
+++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h
@@ -5,6 +5,8 @@
all source code of this library instance.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -35,8 +37,10 @@
Reads registers in the EFI CPU I/O space.
Reads the I/O port specified by Port with registers width specified by Width.
- The read value is returned. If such operations are not supported, then ASSERT().
+ The read value is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -48,16 +52,18 @@
UINT64
EFIAPI
IoReadWorker (
- IN UINTN Port,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
);
/**
Writes registers in the EFI CPU I/O space.
Writes the I/O port specified by Port with registers width and value specified by Width
- and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ and Data respectively. Data is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -70,9 +76,59 @@ IoReadWorker (
UINT64
EFIAPI
IoWriteWorker (
- IN UINTN Port,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Data
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ );
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
);
/**
diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
index c1c48d5..1dbc362 100644
--- a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
+++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
@@ -4,6 +4,8 @@
are based on EFI_CPU_IO_PROTOCOL.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -113,6 +115,68 @@ IoWriteWorker (
}
/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
Reads memory-mapped registers in the EFI system memory space.
Reads the MMIO registers specified by Address with registers width specified by Width.
@@ -402,6 +466,190 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v3 09/10] IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
2017-01-13 20:09 ` [PATCH v3 09/10] IntelFrameworkPkg/DxeIoLibCpuIo: " Leo Duran
@ 2017-01-16 0:54 ` Fan, Jeff
0 siblings, 0 replies; 19+ messages in thread
From: Fan, Jeff @ 2017-01-16 0:54 UTC (permalink / raw)
To: Leo Duran, edk2-devel@lists.01.org
Cc: Gao, Liming, Kinney, Michael D, Justen, Jordan L,
lersek@redhat.com, brijesh.singh@amd.com
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
-----Original Message-----
From: Leo Duran [mailto:leo.duran@amd.com]
Sent: Saturday, January 14, 2017 4:10 AM
To: edk2-devel@lists.01.org
Cc: Gao, Liming; Kinney, Michael D; Fan, Jeff; Justen, Jordan L; lersek@redhat.com; brijesh.singh@amd.com; Leo Duran
Subject: [PATCH v3 09/10] IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
.../Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h | 70 +++++-
IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 248 +++++++++++++++++++++
2 files changed, 311 insertions(+), 7 deletions(-)
diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h
index 66c73fe..c15bca8 100644
--- a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h
+++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h
@@ -5,6 +5,8 @@
all source code of this library instance.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at @@ -35,8 +37,10 @@
Reads registers in the EFI CPU I/O space.
Reads the I/O port specified by Port with registers width specified by Width.
- The read value is returned. If such operations are not supported, then ASSERT().
+ The read value is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -48,16 +52,18 @@
UINT64
EFIAPI
IoReadWorker (
- IN UINTN Port,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
);
/**
Writes registers in the EFI CPU I/O space.
Writes the I/O port specified by Port with registers width and value specified by Width
- and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ and Data respectively. Data is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -70,9 +76,59 @@ IoReadWorker (
UINT64
EFIAPI
IoWriteWorker (
- IN UINTN Port,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Data
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ );
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
);
/**
diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
index c1c48d5..1dbc362 100644
--- a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
+++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
@@ -4,6 +4,8 @@
are based on EFI_CPU_IO_PROTOCOL.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at @@ -113,6 +115,68 @@ IoWriteWorker ( }
/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
Reads memory-mapped registers in the EFI system memory space.
Reads the MMIO registers specified by Address with registers width specified by Width.
@@ -402,6 +466,190 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer); }
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer); }
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer); }
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer); }
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is stored in the
+ provided Buffer.
+
+ This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer); }
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is retrieved
+ from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer); }
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH v3 10/10] OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
` (8 preceding siblings ...)
2017-01-13 20:09 ` [PATCH v3 09/10] IntelFrameworkPkg/DxeIoLibCpuIo: " Leo Duran
@ 2017-01-13 20:10 ` Leo Duran
2017-01-14 13:00 ` [PATCH v3 00/10] " Gao, Liming
2017-01-14 22:19 ` Jordan Justen
11 siblings, 0 replies; 19+ messages in thread
From: Leo Duran @ 2017-01-13 20:10 UTC (permalink / raw)
To: edk2-devel
Cc: liming.gao, michael.d.kinney, jeff.fan, jordan.l.justen, lersek,
brijesh.singh, Leo Duran
The Fifo routines from the QuemuFwCfgLib library have been ported
to the new BaseIoLibIntrinsic (IoLib class) library.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 -----------------------
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +---------------------
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +--
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +--
OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ---------------------
5 files changed, 3 insertions(+), 172 deletions(-)
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
diff --git a/OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm b/OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
deleted file mode 100644
index faa22e9..0000000
--- a/OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
+++ /dev/null
@@ -1,55 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
-
- mov dx, [esp + 4]
- mov ecx, [esp + 8]
- push edi
- mov edi, [esp + 16]
-rep insb
- pop edi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port,
-; IN UINTN Size,
-; IN VOID *Buffer
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
-
- mov dx, [esp + 4]
- mov ecx, [esp + 8]
- push esi
- mov esi, [esp + 16]
-rep outsb
- pop esi
- ret
-
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c
index 0bbf121..a228c02 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c
@@ -2,6 +2,7 @@
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
Copyright (C) 2013, Red Hat, Inc.
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -26,59 +27,6 @@
/**
- Reads an 8-bit I/O port fifo into a block of memory.
-
- Reads the 8-bit I/O fifo port specified by Port.
-
- The port is read Count times, and the read data is
- stored in the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoReadFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-/**
- Writes an 8-bit I/O port fifo from a block of memory.
-
- Writes the 8-bit I/O fifo port specified by Port.
-
- The port is written Count times, and the data are obtained
- from the provided Buffer.
-
- This function must guarantee that all I/O read and write operations are
- serialized.
-
- If 8-bit I/O port operations are not supported, then ASSERT().
-
- @param Port The I/O port to read.
- @param Count The number of times to read I/O port.
- @param Buffer The buffer to store the read data into.
-
-**/
-VOID
-EFIAPI
-IoWriteFifo8 (
- IN UINTN Port,
- IN UINTN Count,
- OUT VOID *Buffer
- );
-
-
-/**
Selects a firmware configuration item for reading.
Following this call, any data read from this item will start from
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf
index 66ac778..6894760 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf
@@ -4,6 +4,7 @@
#
# Copyright (C) 2013, Red Hat, Inc.
# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -36,12 +37,6 @@ [Sources]
QemuFwCfgLib.c
QemuFwCfgPeiDxe.c
-[Sources.IA32]
- Ia32/IoLibExAsm.nasm
-
-[Sources.X64]
- X64/IoLibExAsm.nasm
-
[Packages]
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf
index c1d6a54..7a96575 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf
@@ -4,6 +4,7 @@
#
# Copyright (C) 2013, Red Hat, Inc.
# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -34,12 +35,6 @@ [Sources]
QemuFwCfgLib.c
QemuFwCfgSec.c
-[Sources.IA32]
- Ia32/IoLibExAsm.nasm
-
-[Sources.X64]
- X64/IoLibExAsm.nasm
-
[Packages]
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
diff --git a/OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm b/OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
deleted file mode 100644
index f1078f2..0000000
--- a/OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
+++ /dev/null
@@ -1,52 +0,0 @@
-;------------------------------------------------------------------------------
-;
-; Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
-; This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution. The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php.
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
- DEFAULT REL
- SECTION .text
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoReadFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoReadFifo8)
-ASM_PFX(IoReadFifo8):
-
- xchg rcx, rdx
- xchg rdi, r8 ; rdi: buffer address; r8: save rdi
-rep insb
- mov rdi, r8 ; restore rdi
- ret
-
-;------------------------------------------------------------------------------
-; VOID
-; EFIAPI
-; IoWriteFifo8 (
-; IN UINTN Port, // rcx
-; IN UINTN Size, // rdx
-; IN VOID *Buffer // r8
-; );
-;------------------------------------------------------------------------------
-global ASM_PFX(IoWriteFifo8)
-ASM_PFX(IoWriteFifo8):
-
- xchg rcx, rdx
- xchg rsi, r8 ; rdi: buffer address; r8: save rdi
-rep outsb
- mov rsi, r8 ; restore rdi
- ret
-
--
1.9.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v3 00/10] IoLib class library
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
` (9 preceding siblings ...)
2017-01-13 20:10 ` [PATCH v3 10/10] OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library Leo Duran
@ 2017-01-14 13:00 ` Gao, Liming
2017-01-14 22:19 ` Jordan Justen
11 siblings, 0 replies; 19+ messages in thread
From: Gao, Liming @ 2017-01-14 13:00 UTC (permalink / raw)
To: Leo Duran, edk2-devel@lists.01.org
Cc: Kinney, Michael D, Fan, Jeff, Justen, Jordan L, lersek@redhat.com,
brijesh.singh@amd.com
Leo:
Thanks for your update. I have no other comments. Reviewed-by: Liming Gao <liming.gao@intel.com>
Thanks
Liming
-----Original Message-----
From: Leo Duran [mailto:leo.duran@amd.com]
Sent: Saturday, January 14, 2017 4:10 AM
To: edk2-devel@lists.01.org
Cc: Gao, Liming <liming.gao@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>; Fan, Jeff <jeff.fan@intel.com>; Justen, Jordan L <jordan.l.justen@intel.com>; lersek@redhat.com; brijesh.singh@amd.com; Leo Duran <leo.duran@amd.com>
Subject: [PATCH v3 00/10] IoLib class library
The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate
implementations of I/O Fifo routines. The patch series moves the I/O Fifo
routines into the BaseIoLibIntrinsic library and expands the IoLib class
to include the ported I/O Fifo routines.
The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support IA32
and X64 natively, and other architectures are supported by simply looping
through the basic IoRead/IoWrite routines as appropiate.
The intent of this patch series is twofold:
1) Integrate I/O Fifo routines into the IoLib class library.
2) Allow override of IoLib as may be required to support specific hardware
implementations, such as AMD's Secure Encrypted Virtualization (SEV).
Changes since v2:
- Rework DxeIoLibEsal to use FiFo routines via the CPU I/O interfaces.
Changes only to: [PATCH v2 07/10] MdePkg/DxeIoLibEsal
Leo Duran (10):
MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library
UefiCpuPkg: Modify CpuIoPei to support new IoLib library
IntelFrameworkModulePkg: Modify CpuIoDxe to support new IoLib library
MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c | 52 ++++
.../Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h | 70 +++++-
IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 248 ++++++++++++++++++
MdePkg/Include/Library/IoLib.h | 152 +++++++++++
.../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
.../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 19 +-
.../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 19 +-
MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 169 +++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 171 +++++++++++++
MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 +++++++++++++++
.../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 19 +-
.../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 19 +-
.../Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h | 71 +++++-
MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 260 ++++++++++++++++++-
MdePkg/Library/DxeIoLibEsal/IoLib.c | 278 ++++++++++++++++++++-
MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 261 +++++++++++++++++++
MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 216 ++++++++++++++++
OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ----
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +---
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ----
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 13 +-
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 -------------
UefiCpuPkg/CpuIoPei/CpuIoPei.c | 52 ++++
26 files changed, 2239 insertions(+), 419 deletions(-)
rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (85%)
rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (86%)
rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (83%)
rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (84%)
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
--
1.9.1
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [PATCH v3 00/10] IoLib class library
2017-01-13 20:09 [PATCH v3 00/10] IoLib class library Leo Duran
` (10 preceding siblings ...)
2017-01-14 13:00 ` [PATCH v3 00/10] " Gao, Liming
@ 2017-01-14 22:19 ` Jordan Justen
2017-01-15 16:52 ` Duran, Leo
2017-01-17 3:07 ` Laszlo Ersek
11 siblings, 2 replies; 19+ messages in thread
From: Jordan Justen @ 2017-01-14 22:19 UTC (permalink / raw)
To: Leo Duran, edk2-devel
Cc: brijesh.singh, liming.gao, Leo Duran, michael.d.kinney, lersek,
jeff.fan
I haven't worked with ESAL enough to know if the EsalCall calls in
patch 7 are correct. Patches 1-6 & 8-10:
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
On 2017-01-13 12:09:50, Leo Duran wrote:
> The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate
> implementations of I/O Fifo routines. The patch series moves the I/O Fifo
> routines into the BaseIoLibIntrinsic library and expands the IoLib class
> to include the ported I/O Fifo routines.
>
> The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support IA32
> and X64 natively, and other architectures are supported by simply looping
> through the basic IoRead/IoWrite routines as appropiate.
>
> The intent of this patch series is twofold:
> 1) Integrate I/O Fifo routines into the IoLib class library.
> 2) Allow override of IoLib as may be required to support specific hardware
> implementations, such as AMD's Secure Encrypted Virtualization (SEV).
>
> Changes since v2:
> - Rework DxeIoLibEsal to use FiFo routines via the CPU I/O interfaces.
> Changes only to: [PATCH v2 07/10] MdePkg/DxeIoLibEsal
>
> Leo Duran (10):
> MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library
> UefiCpuPkg: Modify CpuIoPei to support new IoLib library
> IntelFrameworkModulePkg: Modify CpuIoDxe to support new IoLib library
> MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
> OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
>
> IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c | 52 ++++
> .../Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h | 70 +++++-
> IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 248 ++++++++++++++++++
> MdePkg/Include/Library/IoLib.h | 152 +++++++++++
> .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 19 +-
> .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 19 +-
> MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 169 +++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 171 +++++++++++++
> MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 +++++++++++++++
> .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 19 +-
> .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 19 +-
> .../Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h | 71 +++++-
> MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 260 ++++++++++++++++++-
> MdePkg/Library/DxeIoLibEsal/IoLib.c | 278 ++++++++++++++++++++-
> MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 261 +++++++++++++++++++
> MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 216 ++++++++++++++++
> OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ----
> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +---
> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ----
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 13 +-
> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 -------------
> UefiCpuPkg/CpuIoPei/CpuIoPei.c | 52 ++++
> 26 files changed, 2239 insertions(+), 419 deletions(-)
> rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (85%)
> rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (86%)
> rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (83%)
> rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (84%)
> delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
>
> --
> 1.9.1
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [PATCH v3 00/10] IoLib class library
2017-01-14 22:19 ` Jordan Justen
@ 2017-01-15 16:52 ` Duran, Leo
2017-01-17 3:07 ` Laszlo Ersek
1 sibling, 0 replies; 19+ messages in thread
From: Duran, Leo @ 2017-01-15 16:52 UTC (permalink / raw)
To: Jordan Justen, edk2-devel@lists.01.org
Cc: Singh, Brijesh, liming.gao@intel.com, michael.d.kinney@intel.com,
lersek@redhat.com, jeff.fan@intel.com
Thanks Jordan.
Please see my reply below.
Leo
> -----Original Message-----
> From: Jordan Justen [mailto:jordan.l.justen@intel.com]
> Sent: Saturday, January 14, 2017 4:19 PM
> To: Duran, Leo <leo.duran@amd.com>; edk2-devel@lists.01.org
> Cc: Singh, Brijesh <brijesh.singh@amd.com>; liming.gao@intel.com; Duran,
> Leo <leo.duran@amd.com>; michael.d.kinney@intel.com;
> lersek@redhat.com; jeff.fan@intel.com
> Subject: Re: [edk2] [PATCH v3 00/10] IoLib class library
>
> I haven't worked with ESAL enough to know if the EsalCall calls in patch 7 are
> correct.
[Duran, Leo]
Section 10.3.1 (Extended SAL Base I/O Services Class) in Volume 4 of the of the PI spec
describes ESAL I/O as a proxy for CPU I/O interfaces, which are taken care of on patches 2, 3 and 4.
> Patches 1-6 & 8-10:
> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
>
> On 2017-01-13 12:09:50, Leo Duran wrote:
> > The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have
> > duplicate implementations of I/O Fifo routines. The patch series moves
> > the I/O Fifo routines into the BaseIoLibIntrinsic library and expands
> > the IoLib class to include the ported I/O Fifo routines.
> >
> > The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support
> > IA32 and X64 natively, and other architectures are supported by simply
> > looping through the basic IoRead/IoWrite routines as appropiate.
> >
> > The intent of this patch series is twofold:
> > 1) Integrate I/O Fifo routines into the IoLib class library.
> > 2) Allow override of IoLib as may be required to support specific
> > hardware implementations, such as AMD's Secure Encrypted Virtualization
> (SEV).
> >
> > Changes since v2:
> > - Rework DxeIoLibEsal to use FiFo routines via the CPU I/O interfaces.
> > Changes only to: [PATCH v2 07/10] MdePkg/DxeIoLibEsal
> >
> > Leo Duran (10):
> > MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
> > UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library
> > UefiCpuPkg: Modify CpuIoPei to support new IoLib library
> > IntelFrameworkModulePkg: Modify CpuIoDxe to support new IoLib library
> > MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
> > MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
> > MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
> > MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
> > IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
> > OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
> >
> > IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c | 52 ++++
> > .../Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h | 70 +++++-
> > IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 248
> ++++++++++++++++++
> > MdePkg/Include/Library/IoLib.h | 152 +++++++++++
> > .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
> > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 19 +-
> > .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 19 +-
> > MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 169 +++++++++++++
> > MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 171 +++++++++++++
> > MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 +++++++++++++++
> > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 19 +-
> > .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 19 +-
> > .../Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h | 71 +++++-
> > MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 260
> ++++++++++++++++++-
> > MdePkg/Library/DxeIoLibEsal/IoLib.c | 278
> ++++++++++++++++++++-
> > MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 261
> +++++++++++++++++++
> > MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 216
> ++++++++++++++++
> > OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ----
> > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +---
> > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
> > OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
> > OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ----
> > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 13 +-
> > UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
> > UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 -------------
> > UefiCpuPkg/CpuIoPei/CpuIoPei.c | 52 ++++
> > 26 files changed, 2239 insertions(+), 419 deletions(-) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (85%) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (86%) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (83%) rename
> > {UefiCpuPkg/CpuIo2Dxe =>
> > MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (84%) delete mode
> > 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
> > delete mode 100644
> OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
> > delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
> >
> > --
> > 1.9.1
> >
> > _______________________________________________
> > edk2-devel mailing list
> > edk2-devel@lists.01.org
> > https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [PATCH v3 00/10] IoLib class library
2017-01-14 22:19 ` Jordan Justen
2017-01-15 16:52 ` Duran, Leo
@ 2017-01-17 3:07 ` Laszlo Ersek
1 sibling, 0 replies; 19+ messages in thread
From: Laszlo Ersek @ 2017-01-17 3:07 UTC (permalink / raw)
To: Jordan Justen, Leo Duran, edk2-devel
Cc: brijesh.singh, liming.gao, michael.d.kinney, jeff.fan
On 01/14/17 23:19, Jordan Justen wrote:
> I haven't worked with ESAL enough to know if the EsalCall calls in
> patch 7 are correct. Patches 1-6 & 8-10:
>
> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Leo, Jordan, sorry for falling back on reviewing patch #10; I was just
getting around it.
I did review Leo's
[PATCH v4 9/9] Modify QemuFwCfgLib to use new BaseIoFifoLib library.
https://lists.01.org/pipermail/edk2-devel/2017-January/006273.html
and in this series,
[PATCH v3 10/10] OvmfPkg: Modify QemuFwCfgLib to use new IoLib class
library
is nearly identical (#include differences, INF differences, copyright
notice differences, plus a new commit message).
After the fact, but still for the record, for patch #10:
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Thanks
Laszlo
>
> On 2017-01-13 12:09:50, Leo Duran wrote:
>> The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate
>> implementations of I/O Fifo routines. The patch series moves the I/O Fifo
>> routines into the BaseIoLibIntrinsic library and expands the IoLib class
>> to include the ported I/O Fifo routines.
>>
>> The Fifo routines moved from the UefiCpuPkg/CpuIo2Dxe driver support IA32
>> and X64 natively, and other architectures are supported by simply looping
>> through the basic IoRead/IoWrite routines as appropiate.
>>
>> The intent of this patch series is twofold:
>> 1) Integrate I/O Fifo routines into the IoLib class library.
>> 2) Allow override of IoLib as may be required to support specific hardware
>> implementations, such as AMD's Secure Encrypted Virtualization (SEV).
>>
>> Changes since v2:
>> - Rework DxeIoLibEsal to use FiFo routines via the CPU I/O interfaces.
>> Changes only to: [PATCH v2 07/10] MdePkg/DxeIoLibEsal
>>
>> Leo Duran (10):
>> MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library
>> UefiCpuPkg: Modify CpuIo2Dxe to use new IoLib library
>> UefiCpuPkg: Modify CpuIoPei to support new IoLib library
>> IntelFrameworkModulePkg: Modify CpuIoDxe to support new IoLib library
>> MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
>> MdePkg/PeiIoLibCpuIo: Add new Fifo routines in IoLib class
>> MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
>> MdePkg/SmmIoLibSmmCpuIo2: Add new Fifo routines in IoLib class
>> IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class
>> OvmfPkg: Modify QemuFwCfgLib to use new IoLib class library
>>
>> IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c | 52 ++++
>> .../Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h | 70 +++++-
>> IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c | 248 ++++++++++++++++++
>> MdePkg/Include/Library/IoLib.h | 152 +++++++++++
>> .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 6 +-
>> .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm | 19 +-
>> .../Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm | 19 +-
>> MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c | 169 +++++++++++++
>> MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c | 171 +++++++++++++
>> MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c | 201 +++++++++++++++
>> .../Library/BaseIoLibIntrinsic}/X64/IoFifo.asm | 19 +-
>> .../Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm | 19 +-
>> .../Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h | 71 +++++-
>> MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 260 ++++++++++++++++++-
>> MdePkg/Library/DxeIoLibEsal/IoLib.c | 278 ++++++++++++++++++++-
>> MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 261 +++++++++++++++++++
>> MdePkg/Library/SmmIoLibSmmCpuIo2/IoLib.c | 216 ++++++++++++++++
>> OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm | 55 ----
>> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.c | 54 +---
>> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLib.inf | 7 +-
>> OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgSecLib.inf | 7 +-
>> OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm | 52 ----
>> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c | 13 +-
>> UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf | 11 +-
>> UefiCpuPkg/CpuIo2Dxe/IoFifo.h | 176 -------------
>> UefiCpuPkg/CpuIoPei/CpuIoPei.c | 52 ++++
>> 26 files changed, 2239 insertions(+), 419 deletions(-)
>> rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.asm (85%)
>> rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/Ia32/IoFifo.nasm (86%)
>> rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.asm (83%)
>> rename {UefiCpuPkg/CpuIo2Dxe => MdePkg/Library/BaseIoLibIntrinsic}/X64/IoFifo.nasm (84%)
>> delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/Ia32/IoLibExAsm.nasm
>> delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/X64/IoLibExAsm.nasm
>> delete mode 100644 UefiCpuPkg/CpuIo2Dxe/IoFifo.h
>>
>> --
>> 1.9.1
>>
>> _______________________________________________
>> edk2-devel mailing list
>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
>
^ permalink raw reply [flat|nested] 19+ messages in thread