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20:Akd3fZUVMs/TtSrhvOg/GOQhHO+qgGf5+E2JV4OqRzs6TKRARjJWR0DDoRj3mOC+W0cgAsknBiKGofp38Qlm23VfNT+f7NteHHGmTzpCYKXNtANlDMfM5gUO2S38d4Xa+NWH1WMycBobMCKlOv1r8Ct28y5tjPabacG9NH6BB3p6OQO5degBGJ26NYdimwaPA0PmXh9ABeORcGymp145y83ud04Lrbihv4VFXr2KMM3QhiPlwOp0nXMAqrTnSuMW X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2017 20:10:39.5399 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR12MB1238 Subject: [PATCH v3 03/10] UefiCpuPkg: Modify CpuIoPei to support new IoLib library X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Jan 2017 20:10:43 -0000 Content-Type: text/plain The IO_PPI supports Fifo types by invoking the Fifo routines in the new BaseIoLibIntrinsic (IoLib class) library. Cc: Jeff Fan Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brijesh Singh Signed-off-by: Leo Duran --- UefiCpuPkg/CpuIoPei/CpuIoPei.c | 52 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/UefiCpuPkg/CpuIoPei/CpuIoPei.c b/UefiCpuPkg/CpuIoPei/CpuIoPei.c index 3c5c8a7..b6d538b 100644 --- a/UefiCpuPkg/CpuIoPei/CpuIoPei.c +++ b/UefiCpuPkg/CpuIoPei/CpuIoPei.c @@ -2,6 +2,8 @@ Produces the CPU I/O PPI. Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -375,6 +377,31 @@ CpuIoServiceRead ( InStride = mInStride[Width]; OutStride = mOutStride[Width]; OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03); + + // + // Fifo operations supported for (mInStride[Width] == 0) + // + if (InStride == 0) { + switch (OperationWidth) { + case EfiPeiCpuIoWidthUint8: + IoReadFifo8 ((UINTN)Address, Count, Buffer); + return EFI_SUCCESS; + case EfiPeiCpuIoWidthUint16: + IoReadFifo16 ((UINTN)Address, Count, Buffer); + return EFI_SUCCESS; + case EfiPeiCpuIoWidthUint32: + IoReadFifo32 ((UINTN)Address, Count, Buffer); + return EFI_SUCCESS; + default: + // + // The CpuIoCheckParameter call above will ensure that this + // path is not taken. + // + ASSERT (FALSE); + break; + } + } + Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00); for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) { if (OperationWidth == EfiPeiCpuIoWidthUint8) { @@ -447,6 +474,31 @@ CpuIoServiceWrite ( InStride = mInStride[Width]; OutStride = mOutStride[Width]; OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH) (Width & 0x03); + + // + // Fifo operations supported for (mInStride[Width] == 0) + // + if (InStride == 0) { + switch (OperationWidth) { + case EfiPeiCpuIoWidthUint8: + IoWriteFifo8 ((UINTN)Address, Count, Buffer); + return EFI_SUCCESS; + case EfiPeiCpuIoWidthUint16: + IoWriteFifo16 ((UINTN)Address, Count, Buffer); + return EFI_SUCCESS; + case EfiPeiCpuIoWidthUint32: + IoWriteFifo32 ((UINTN)Address, Count, Buffer); + return EFI_SUCCESS; + default: + // + // The CpuIoCheckParameter call above will ensure that this + // path is not taken. + // + ASSERT (FALSE); + break; + } + } + Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00); for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) { if (OperationWidth == EfiPeiCpuIoWidthUint8) { -- 1.9.1