From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C4C9181ECE for ; Sat, 21 Jan 2017 22:44:00 -0800 (PST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP; 21 Jan 2017 22:44:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,267,1477983600"; d="scan'208";a="216185506" Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.13]) by fmsmga004.fm.intel.com with ESMTP; 21 Jan 2017 22:43:59 -0800 From: Hao Wu To: edk2-devel@lists.01.org Cc: Hao Wu , Michael Kinney , Liming Gao , Eric Dong Date: Sun, 22 Jan 2017 14:43:54 +0800 Message-Id: <1485067434-12064-2-git-send-email-hao.a.wu@intel.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1485067434-12064-1-git-send-email-hao.a.wu@intel.com> References: <1485067434-12064-1-git-send-email-hao.a.wu@intel.com> Subject: [PATCH 1/1] MdePkg: Refine casting expression result to bigger size X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 22 Jan 2017 06:44:00 -0000 There are cases that the operands of an expression are all with rank less than UINT64/INT64 and the result of the expression is casted to UINT64/INT64 to fit the target size. An example will be: UINT32 a,b; // a and b can be any unsigned int type with rank less than UINT64, like // UINT8, UINT16, etc. UINT64 c; c = (UINT64) (a + b); Some static code checkers may warn that the expression result might overflow within the rank of int (integer promotions) and the result is then cast to a bigger size. For the consideration of generated binaries size, the commit will keep the size of the operands as the size of int, and explitly add a type cast before converting the result to UINT64/INT64. 1). When there is no operand with type UINTN (UINTN) (a + b) -> (UINTN)(UINT32) (a + b) or (UINT64) (a + b) -> (UINT64)(UINT32) (a + b) 2). Otherwise (UINT64) (a + b) -> (UINT64)(UINTN) (a + b) Cc: Michael Kinney Cc: Liming Gao Cc: Eric Dong Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu --- MdePkg/Library/BaseLib/String.c | 4 ++-- MdePkg/Library/BasePeCoffLib/BasePeCoff.c | 4 ++-- MdePkg/Library/BaseS3PciLib/S3PciLib.c | 4 ++-- MdePkg/Library/SmmMemoryAllocationLib/MemoryAllocationLib.c | 4 ++-- MdePkg/Library/UefiMemoryAllocationLib/MemoryAllocationLib.c | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/MdePkg/Library/BaseLib/String.c b/MdePkg/Library/BaseLib/String.c index e84bf50..82aa405 100644 --- a/MdePkg/Library/BaseLib/String.c +++ b/MdePkg/Library/BaseLib/String.c @@ -586,7 +586,7 @@ InternalHexCharToUintn ( return Char - L'0'; } - return (UINTN) (10 + InternalCharToUpper (Char) - L'A'); + return (UINTN)(UINT32) (10 + InternalCharToUpper (Char) - L'A'); } /** @@ -1211,7 +1211,7 @@ InternalAsciiHexCharToUintn ( return Char - '0'; } - return (UINTN) (10 + InternalBaseLibAsciiToUpper (Char) - 'A'); + return (UINTN)(UINT32) (10 + InternalBaseLibAsciiToUpper (Char) - 'A'); } diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c index 33cad23..d7f5fd0 100644 --- a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c @@ -15,7 +15,7 @@ PeCoffLoaderGetPeHeader() routine will do basic check for PE/COFF header. PeCoffLoaderGetImageInfo() routine will do basic check for whole PE/COFF image. - Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -703,7 +703,7 @@ PeCoffLoaderGetImageInfo ( // DebugDirectoryEntryFileOffset = 0; - SectionHeaderOffset = (UINTN)( + SectionHeaderOffset = (UINTN)(UINT32)( ImageContext->PeCoffHeaderOffset + sizeof (UINT32) + sizeof (EFI_IMAGE_FILE_HEADER) + diff --git a/MdePkg/Library/BaseS3PciLib/S3PciLib.c b/MdePkg/Library/BaseS3PciLib/S3PciLib.c index e29f7fe..d712c64 100644 --- a/MdePkg/Library/BaseS3PciLib/S3PciLib.c +++ b/MdePkg/Library/BaseS3PciLib/S3PciLib.c @@ -3,7 +3,7 @@ the PCI operations to be replayed during an S3 resume. This library class maps directly on top of the PciLib class. - Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions @@ -25,7 +25,7 @@ #include #define PCILIB_TO_COMMON_ADDRESS(Address) \ - ((UINT64) ((((UINTN) ((Address>>20) & 0xff)) << 24) + (((UINTN) ((Address>>15) & 0x1f)) << 16) + (((UINTN) ((Address>>12) & 0x07)) << 8) + ((UINTN) (Address & 0xfff )))) + ((UINT64)(UINTN) ((((UINTN) ((Address>>20) & 0xff)) << 24) + (((UINTN) ((Address>>15) & 0x1f)) << 16) + (((UINTN) ((Address>>12) & 0x07)) << 8) + ((UINTN) (Address & 0xfff )))) /** Saves a PCI configuration value to the boot script. diff --git a/MdePkg/Library/SmmMemoryAllocationLib/MemoryAllocationLib.c b/MdePkg/Library/SmmMemoryAllocationLib/MemoryAllocationLib.c index 937165a..8321b6c 100644 --- a/MdePkg/Library/SmmMemoryAllocationLib/MemoryAllocationLib.c +++ b/MdePkg/Library/SmmMemoryAllocationLib/MemoryAllocationLib.c @@ -12,7 +12,7 @@ allocation for the Reserved memory types are not supported and will always return NULL. - Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -343,7 +343,7 @@ InternalAllocateAlignedPages ( Status = gSmst->SmmFreePages (Memory, UnalignedPages); ASSERT_EFI_ERROR (Status); } - Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages)); + Memory = (EFI_PHYSICAL_ADDRESS)(UINTN) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages)); UnalignedPages = RealPages - Pages - UnalignedPages; if (UnalignedPages > 0) { // diff --git a/MdePkg/Library/UefiMemoryAllocationLib/MemoryAllocationLib.c b/MdePkg/Library/UefiMemoryAllocationLib/MemoryAllocationLib.c index 3da5e211..d818f9c 100644 --- a/MdePkg/Library/UefiMemoryAllocationLib/MemoryAllocationLib.c +++ b/MdePkg/Library/UefiMemoryAllocationLib/MemoryAllocationLib.c @@ -2,7 +2,7 @@ Support routines for memory allocation routines based on boot services for Dxe phase drivers. - Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -216,7 +216,7 @@ InternalAllocateAlignedPages ( Status = gBS->FreePages (Memory, UnalignedPages); ASSERT_EFI_ERROR (Status); } - Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages)); + Memory = (EFI_PHYSICAL_ADDRESS)(UINTN) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages)); UnalignedPages = RealPages - Pages - UnalignedPages; if (UnalignedPages > 0) { // -- 1.9.5.msysgit.0