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Thu, 16 Feb 2017 21:02:26 +0000 From: Leo Duran To: CC: Leo Duran , Feng Tian , Star Zeng , Laszlo Ersek , Brijesh Singh Date: Thu, 16 Feb 2017 15:02:03 -0600 Message-ID: <1487278926-14303-2-git-send-email-leo.duran@amd.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1487278926-14303-1-git-send-email-leo.duran@amd.com> References: <1487278926-14303-1-git-send-email-leo.duran@amd.com> MIME-Version: 1.0 X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: DM5PR13CA0037.namprd13.prod.outlook.com (10.168.240.151) To BN6PR12MB1236.namprd12.prod.outlook.com (10.168.227.22) X-MS-Office365-Filtering-Correlation-Id: f01f91e8-98c2-4a68-b6aa-08d456af1cec X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(48565401081); SRVR:BN6PR12MB1236; X-Microsoft-Exchange-Diagnostics: 1; BN6PR12MB1236; 3:7FPgkwd/eeTpjlRXNIJDvRp9q5pqqX9aLoM00E6Mu2+YN5LyRWztC4I/9rHTS+wCr7YN//Rj0PNkOB6ETuufJQl17Vs9D0dhvz6La/BM0XL+oyciYvrDN5/ihTbo9t0yVp+uhtmI13QthymhlRnXPF6K955+aG2OhnfsSsD7qOdxWpSwvFCC7/n0TW8l9/kB7kyq4/fIpK8EcYyV5yIcEqFNF9gjbOc67Z5gkeK0o7TRwtjyfQ85Ug8KQu/rFCqKwCZbtJlrv7/rf2OeCEBGxyRgMa3BR5oLGpddq6MVKr4=; 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20:8+CP2Rbd56OJnOUDj0gzFn6bMSRuNNeh1mrTEm0LuhR/zLvS6dLATZdvdeY60X9/vmq9aoJwigqEje58gwWfR9M+1nhbJZIx0FV2T3RGHotNpk/lD3fsC9IP3l/KJ0XodxpSP8ntYMpDgVn5V1c3shvXazTTVHkUeS2xiQSwZ4iLxiuKmnbnZ1u51AHcuX0XtnpYXrqen6ZRhEiJJnX4nZHAnDM1O6mwFpVEZ16HK4p+KozPIJ11AjzoF53P1+6q X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Feb 2017 21:02:26.6169 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1236 Subject: [PATCH v3 1/4] MdeModulePkg: Add PCD PcdPteMemoryEncryptionAddressOrMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Feb 2017 21:02:28 -0000 Content-Type: text/plain This PCD holds the address mask for page table entries when memory encryption is enabled on AMD processors supporting the Secure Encrypted Virtualization (SEV) feature. Cc: Feng Tian Cc: Star Zeng Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brijesh Singh Signed-off-by: Leo Duran Reviewed-by: Star Zeng --- MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 5 +++- MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 29 +++++++++++++++++------- MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h | 6 +++++ MdeModulePkg/MdeModulePkg.dec | 8 +++++++ 4 files changed, 39 insertions(+), 9 deletions(-) diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf index 2bc41be..d62bd9b 100644 --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf @@ -6,6 +6,8 @@ # needed to run the DXE Foundation. # # Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
+# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License # which accompanies this distribution. The full text of the license may be found at @@ -111,7 +113,8 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress ## CONSUMES [Pcd.IA32,Pcd.X64] - gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ## CONSUMES [Pcd.IA32,Pcd.X64,Pcd.ARM,Pcd.AARCH64] gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack ## SOMETIMES_CONSUMES diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c index 790f6ab..89b116a 100644 --- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c +++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c @@ -16,6 +16,8 @@ 3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -65,20 +67,24 @@ Split2MPageTo4K ( EFI_PHYSICAL_ADDRESS PhysicalAddress4K; UINTN IndexOfPageTableEntries; PAGE_TABLE_4K_ENTRY *PageTableEntry; + UINT64 AddressSetMask; PageTableEntry = AllocatePages (1); ASSERT (PageTableEntry != NULL); + + AddressSetMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); + // // Fill in 2M page entry. // - *PageEntry2M = (UINT64) (UINTN) PageTableEntry | IA32_PG_P | IA32_PG_RW; + *PageEntry2M = (UINT64)(UINTN)PageTableEntry | (AddressSetMask & PAGING_2M_ADDRESS_MASK_64) | IA32_PG_P | IA32_PG_RW; PhysicalAddress4K = PhysicalAddress; for (IndexOfPageTableEntries = 0; IndexOfPageTableEntries < 512; IndexOfPageTableEntries++, PageTableEntry++, PhysicalAddress4K += SIZE_4KB) { // // Fill in the Page Table entries // - PageTableEntry->Uint64 = (UINT64) PhysicalAddress4K; + PageTableEntry->Uint64 = (UINT64)PhysicalAddress4K | (AddressSetMask & PAGING_4K_ADDRESS_MASK_64); PageTableEntry->Bits.ReadWrite = 1; PageTableEntry->Bits.Present = 1; if ((PhysicalAddress4K >= StackBase) && (PhysicalAddress4K < StackBase + StackSize)) { @@ -110,13 +116,17 @@ Split1GPageTo2M ( EFI_PHYSICAL_ADDRESS PhysicalAddress2M; UINTN IndexOfPageDirectoryEntries; PAGE_TABLE_ENTRY *PageDirectoryEntry; + UINT64 AddressSetMask; PageDirectoryEntry = AllocatePages (1); ASSERT (PageDirectoryEntry != NULL); + + AddressSetMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); + // // Fill in 1G page entry. // - *PageEntry1G = (UINT64) (UINTN) PageDirectoryEntry | IA32_PG_P | IA32_PG_RW; + *PageEntry1G = (UINT64)(UINTN)PageDirectoryEntry | (AddressSetMask & PAGING_1G_ADDRESS_MASK_64) | IA32_PG_P | IA32_PG_RW; PhysicalAddress2M = PhysicalAddress; for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress2M += SIZE_2MB) { @@ -129,7 +139,7 @@ Split1GPageTo2M ( // // Fill in the Page Directory entries // - PageDirectoryEntry->Uint64 = (UINT64) PhysicalAddress2M; + PageDirectoryEntry->Uint64 = (UINT64)PhysicalAddress2M | (AddressSetMask & PAGING_2M_ADDRESS_MASK_64); PageDirectoryEntry->Bits.ReadWrite = 1; PageDirectoryEntry->Bits.Present = 1; PageDirectoryEntry->Bits.MustBe1 = 1; @@ -171,6 +181,7 @@ CreateIdentityMappingPageTables ( VOID *Hob; BOOLEAN Page1GSupport; PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry; + UINT64 AddressSetMask; Page1GSupport = FALSE; if (PcdGetBool(PcdUse1GPageTable)) { @@ -229,6 +240,8 @@ CreateIdentityMappingPageTables ( BigPageAddress = (UINTN) AllocatePages (TotalPagesNum); ASSERT (BigPageAddress != 0); + AddressSetMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); + // // By architecture only one PageMapLevel4 exists - so lets allocate storage for it. // @@ -248,7 +261,7 @@ CreateIdentityMappingPageTables ( // // Make a PML4 Entry // - PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry; + PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | (AddressSetMask & PAGING_4K_ADDRESS_MASK_64); PageMapLevel4Entry->Bits.ReadWrite = 1; PageMapLevel4Entry->Bits.Present = 1; @@ -262,7 +275,7 @@ CreateIdentityMappingPageTables ( // // Fill in the Page Directory entries // - PageDirectory1GEntry->Uint64 = (UINT64)PageAddress; + PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | (AddressSetMask & PAGING_1G_ADDRESS_MASK_64); PageDirectory1GEntry->Bits.ReadWrite = 1; PageDirectory1GEntry->Bits.Present = 1; PageDirectory1GEntry->Bits.MustBe1 = 1; @@ -280,7 +293,7 @@ CreateIdentityMappingPageTables ( // // Fill in a Page Directory Pointer Entries // - PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry; + PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | (AddressSetMask & PAGING_4K_ADDRESS_MASK_64); PageDirectoryPointerEntry->Bits.ReadWrite = 1; PageDirectoryPointerEntry->Bits.Present = 1; @@ -294,7 +307,7 @@ CreateIdentityMappingPageTables ( // // Fill in the Page Directory entries // - PageDirectoryEntry->Uint64 = (UINT64)PageAddress; + PageDirectoryEntry->Uint64 = (UINT64)PageAddress | (AddressSetMask & PAGING_2M_ADDRESS_MASK_64); PageDirectoryEntry->Bits.ReadWrite = 1; PageDirectoryEntry->Bits.Present = 1; PageDirectoryEntry->Bits.MustBe1 = 1; diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h index 20c31f5..2e0691e 100644 --- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h +++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.h @@ -8,6 +8,8 @@ 4) AMD64 Architecture Programmer's Manual Volume 2: System Programming Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -23,6 +25,10 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #define SYS_CODE64_SEL 0x38 +#define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull +#define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull +#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull + #pragma pack(1) typedef union { diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 273cd7e..15119d0 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -6,6 +6,8 @@ # Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
# Copyright (c) 2016, Linaro Ltd. All rights reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
+# # This program and the accompanying materials are licensed and made available under # the terms and conditions of the BSD License that accompanies this distribution. # The full text of the license may be found at @@ -1682,6 +1684,12 @@ # @Prompt A list of system FMP ImageTypeId GUIDs gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x0}|VOID*|0x30001046 + ## This PCD holds the address mask for page table entries when memory encryption is + # enabled on AMD processors supporting the Secure Encrypted Virtualization (SEV) feature. + # This mask should be applied when creating 1:1 virtual to physical mapping tables. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask|0x0|UINT64|0x30001047 + [PcdsPatchableInModule] ## Specify memory size with page number for PEI code when # Loading Module at Fixed Address feature is enabled. -- 2.7.4