[PATCH 2/4] ArmPkg/ArmLib: AARCH64: set frame pointer in cache maintenance routine

[Ard Biesheuvel <ard.biesheuvel@linaro.org>]

Stack and unstack the frame pointer according to the AAPCS in
AArch64AllDataCachesOperation ().

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
index 5cee7c1519c3..c35c05fdf681 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
@@ -273,7 +273,7 @@ ASM_FUNC(ArmDisableBranchPrediction)
 ASM_FUNC(AArch64AllDataCachesOperation)
 // We can use regs 0-7 and 9-15 without having to save/restore.
 // Save our link register on the stack. - The stack must always be quad-word aligned
-  str   x30, [sp, #-16]!
+  stp   x29, x30, [sp, #-16]!
   mov   x1, x0                  // Save Function call in x1
   mrs   x6, clidr_el1           // Read EL1 CLIDR
   and   x3, x6, #0x7000000      // Mask out all but Level of Coherency (LoC)
@@ -324,7 +324,7 @@ L_Skip:
 L_Finished:
   dsb   sy
   isb
-  ldr   x30, [sp], #0x10
+  ldp   x29, x30, [sp], #0x10
   ret
 
 
-- 
2.7.4