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From: Hao Wu <hao.a.wu@intel.com>
To: edk2-devel@lists.01.org
Cc: Hao Wu <hao.a.wu@intel.com>, Jeff Fan <jeff.fan@intel.com>
Subject: [PATCH v3 04/12] IntelFrameworkModulePkg: Refine casting expression result to bigger size
Date: Sat, 25 Feb 2017 13:12:27 +0800	[thread overview]
Message-ID: <1487999555-9764-5-git-send-email-hao.a.wu@intel.com> (raw)
In-Reply-To: <1487999555-9764-1-git-send-email-hao.a.wu@intel.com>

There are cases that the operands of an expression are all with rank less
than UINT64/INT64 and the result of the expression is explicitly cast to
UINT64/INT64 to fit the target size.

An example will be:
UINT32 a,b;
// a and b can be any unsigned int type with rank less than UINT64, like
// UINT8, UINT16, etc.
UINT64 c;
c = (UINT64) (a + b);

Some static code checkers may warn that the expression result might
overflow within the rank of "int" (integer promotions) and the result is
then cast to a bigger size.

The commit refines codes by the following rules:
1). When the expression is possible to overflow the range of unsigned int/
int:
c = (UINT64)a + b;

2). When the expression will not overflow within the rank of "int", remove
the explicit type casts:
c = a + b;

3). When the expression will be cast to pointer of possible greater size:
UINT32 a,b;
VOID *c;
c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b);

4). When one side of a comparison expression contains only operands with
rank less than UINT32:
UINT8 a;
UINT16 b;
UINTN c;
if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...}

For rule 4), if we remove the 'UINTN' type cast like:
if (a + b > c) {...}
The VS compiler will complain with warning C4018 (signed/unsigned
mismatch, level 3 warning) due to promoting 'a + b' to type 'int'.

Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c |  4 ++--
 IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/BiosSnp16.c       |  4 ++--
 IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/Misc.c            | 14 +++++++-------
 IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/BiosVideo.c       |  4 ++--
 IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c           |  6 +++---
 IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c    |  4 ++--
 IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c          |  2 +-
 IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c          |  4 ++--
 IntelFrameworkModulePkg/Library/LegacyBootManagerLib/LegacyBm.c  |  2 +-
 IntelFrameworkModulePkg/Universal/BdsDxe/FrontPage.c             |  4 ++--
 IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c               |  4 ++--
 11 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
index a597d99..742d009 100644
--- a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
+++ b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c
@@ -1,7 +1,7 @@
 /** @file
   ConsoleOut Routines that speak VGA.
 
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions
@@ -418,7 +418,7 @@ BiosKeyboardDriverBindingStart (
     // Check bit 6 of Feature Byte 2.
     // If it is set, then Int 16 Func 09 is supported
     //
-    if (*(UINT8 *)(UINTN) ((Regs.X.ES << 4) + Regs.X.BX + 0x06) & 0x40) {
+    if (*(UINT8 *) (((UINTN) Regs.X.ES << 4) + Regs.X.BX + 0x06) & 0x40) {
       //
       // Get Keyboard Functionality
       //
diff --git a/IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/BiosSnp16.c b/IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/BiosSnp16.c
index a2a7797..b586a91 100644
--- a/IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/BiosSnp16.c
+++ b/IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/BiosSnp16.c
@@ -1,6 +1,6 @@
 /** @file
 
-Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions
@@ -1858,7 +1858,7 @@ Undi16SimpleNetworkIsr (
 
       CopyMem (
         Frame,
-        (VOID *)(UINTN) ((SimpleNetworkDevice->Isr.FrameSegSel << 4) + SimpleNetworkDevice->Isr.FrameOffset),
+        (VOID *) (((UINTN) SimpleNetworkDevice->Isr.FrameSegSel << 4) + SimpleNetworkDevice->Isr.FrameOffset),
         SimpleNetworkDevice->Isr.BufferLength
         );
       Frame = Frame + SimpleNetworkDevice->Isr.BufferLength;
diff --git a/IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/Misc.c b/IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/Misc.c
index 4750b2f..a1dc867 100644
--- a/IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/Misc.c
+++ b/IntelFrameworkModulePkg/Csm/BiosThunk/Snp16Dxe/Misc.c
@@ -1,7 +1,7 @@
 /** @file
   Helper Routines that use a PXE-enabled NIC option ROM.
  
-Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions
@@ -49,7 +49,7 @@ CacheVectorAddress (
 {
   UINT32  *Address;
 
-  Address                          = (UINT32 *)(UINTN) (IVT_BASE + VectorNumber * 4);
+  Address                          = (UINT32 *) ((UINTN) IVT_BASE + VectorNumber * 4);
   CachedVectorAddress[VectorNumber] = *Address;
   return EFI_SUCCESS;
 }
@@ -68,7 +68,7 @@ RestoreCachedVectorAddress (
 {
   UINT32  *Address;
 
-  Address  = (UINT32 *)(UINTN) (IVT_BASE + VectorNumber * 4);
+  Address  = (UINT32 *) ((UINTN) IVT_BASE + VectorNumber * 4);
   *Address = CachedVectorAddress[VectorNumber];
   return EFI_SUCCESS;
 }
@@ -469,7 +469,7 @@ LaunchBaseCode (
 
   RomIdTableAddress = (UNDI_ROMID_T *) (RomAddress + OPTION_ROM_PTR->PxeRomIdOffset);
 
-  if ((UINTN) (OPTION_ROM_PTR->PxeRomIdOffset + RomIdTableAddress->StructLength) > RomLength) {
+  if (((UINT32)OPTION_ROM_PTR->PxeRomIdOffset + RomIdTableAddress->StructLength) > RomLength) {
     DEBUG ((DEBUG_ERROR, "ROM ID Offset Error\n\r"));
     return EFI_NOT_FOUND;
   }
@@ -754,10 +754,10 @@ LaunchBaseCode (
   Print_Undi_Loader_Table (UndiLoaderTable);
 
   DEBUG ((DEBUG_NET, "Display the PXENV+ and !PXE tables exported by NIC\n\r"));
-  Print_PXENV_Table ((VOID *)(UINTN)((UndiLoaderTable->PXENVptr.Segment << 4) | UndiLoaderTable->PXENVptr.Offset));
-  Print_PXE_Table ((VOID *)(UINTN)((UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset));
+  Print_PXENV_Table ((VOID *)(((UINTN)UndiLoaderTable->PXENVptr.Segment << 4) | UndiLoaderTable->PXENVptr.Offset));
+  Print_PXE_Table ((VOID *)(((UINTN)UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset));
 
-  Pxe = (PXE_T *)(UINTN)((UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset);
+  Pxe = (PXE_T *)(((UINTN)UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset);
   SimpleNetworkDevice->Nii.Id = (UINT64)(UINTN) Pxe;
 
   gBS->FreePool (Buffer);
diff --git a/IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/BiosVideo.c b/IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/BiosVideo.c
index f1c8b29..08672cf 100644
--- a/IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/BiosVideo.c
+++ b/IntelFrameworkModulePkg/Csm/BiosThunk/VideoDxe/BiosVideo.c
@@ -1,7 +1,7 @@
 /** @file
   ConsoleOut Routines that speak VGA.
 
-Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions
@@ -1714,7 +1714,7 @@ BiosVideoCheckForVbe (
     //
     // Make sure the FrameBufferSize does not exceed the max available frame buffer size reported by VEB.
     //
-    ASSERT (CurrentModeData->FrameBufferSize <= (UINTN)(BiosVideoPrivate->VbeInformationBlock->TotalMemory * 64 * 1024));
+    ASSERT (CurrentModeData->FrameBufferSize <= ((UINT32)BiosVideoPrivate->VbeInformationBlock->TotalMemory * 64 * 1024));
     
     BiosVideoPrivate->ModeData = ModeBuffer;
   }
diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
index dd2e2b9..3ead2d9 100644
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c
@@ -1,6 +1,6 @@
 /** @file
 
-Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions
@@ -144,7 +144,7 @@ LegacyBiosGetLegacyRegion (
      );
 
   if (Regs.X.AX == 0) {
-    *LegacyMemoryAddress  = (VOID *) (UINTN) ((Regs.X.DS << 4) + Regs.X.BX);
+    *LegacyMemoryAddress  = (VOID *) (((UINTN) Regs.X.DS << 4) + Regs.X.BX);
     Status = EFI_SUCCESS;
   } else {
     Status = EFI_OUT_OF_RESOURCES;
@@ -728,7 +728,7 @@ InstallSmbiosEventCallback (
   }
   
   if ((mStructureTableAddress != 0) && 
-      (mStructureTablePages < (UINTN) EFI_SIZE_TO_PAGES (EntryPointStructure->TableLength))) {
+      (mStructureTablePages < EFI_SIZE_TO_PAGES ((UINT32)EntryPointStructure->TableLength))) {
     //
     // If original buffer is not enough for the new SMBIOS table, free original buffer and re-allocate
     //
diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
index 52bcae2..1e098b3 100644
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c
@@ -1,6 +1,6 @@
 /** @file
 
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
 
 This program and the accompanying materials
 are licensed and made available under the terms and conditions
@@ -91,7 +91,7 @@ PrintBbsTable (
     //
     // Print DescString
     //
-    String = (CHAR8 *)(UINTN)((BbsTable[Index].DescStringSegment << 4) + BbsTable[Index].DescStringOffset);
+    String = (CHAR8 *)(((UINTN)BbsTable[Index].DescStringSegment << 4) + BbsTable[Index].DescStringOffset);
     if (String != NULL) {
       DEBUG ((EFI_D_INFO," ("));
       for (SubIndex = 0; String[SubIndex] != 0; SubIndex++) {
diff --git a/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c b/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c
index 628424d..d1da635 100644
--- a/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c
+++ b/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsBoot.c
@@ -227,7 +227,7 @@ BdsBuildLegacyDevNameString (
   //
   // If current BBS entry has its description then use it.
   //
-  StringDesc = (UINT8 *) (UINTN) ((CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);
+  StringDesc = (UINT8 *) (((UINTN) CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);
   if (NULL != StringDesc) {
     //
     // Only get fisrt 32 characters, this is suggested by BBS spec
diff --git a/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c b/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c
index 2ba511a..48938b0 100644
--- a/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c
+++ b/IntelFrameworkModulePkg/Library/GenericBdsLib/BdsMisc.c
@@ -569,11 +569,11 @@ CharToUint (
   )
 {
   if ((Char >= L'0') && (Char <= L'9')) {
-    return (UINTN) (Char - L'0');
+    return (Char - L'0');
   }
 
   if ((Char >= L'A') && (Char <= L'F')) {
-    return (UINTN) (Char - L'A' + 0xA);
+    return (Char - L'A' + 0xA);
   }
 
   ASSERT (FALSE);
diff --git a/IntelFrameworkModulePkg/Library/LegacyBootManagerLib/LegacyBm.c b/IntelFrameworkModulePkg/Library/LegacyBootManagerLib/LegacyBm.c
index 080a436..76902ec 100644
--- a/IntelFrameworkModulePkg/Library/LegacyBootManagerLib/LegacyBm.c
+++ b/IntelFrameworkModulePkg/Library/LegacyBootManagerLib/LegacyBm.c
@@ -176,7 +176,7 @@ LegacyBmBuildLegacyDevNameString (
   //
   // If current BBS entry has its description then use it.
   //
-  StringDesc = (CHAR8 *) (UINTN) ((CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);
+  StringDesc = (CHAR8 *) (((UINTN) CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);
   if (NULL != StringDesc) {
     //
     // Only get fisrt 32 characters, this is suggested by BBS spec
diff --git a/IntelFrameworkModulePkg/Universal/BdsDxe/FrontPage.c b/IntelFrameworkModulePkg/Universal/BdsDxe/FrontPage.c
index c771974..3bae0be 100644
--- a/IntelFrameworkModulePkg/Universal/BdsDxe/FrontPage.c
+++ b/IntelFrameworkModulePkg/Universal/BdsDxe/FrontPage.c
@@ -1,7 +1,7 @@
 /** @file
   FrontPage routines to handle the callbacks and browser calls
 
-Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
 which accompanies this distribution.  The full text of the license may be found at
@@ -620,7 +620,7 @@ ConvertProcessorToString (
 
   if (Base10Exponent >= 6) {
     FreqMhz = ProcessorFrequency;
-    for (Index = 0; Index < (UINTN) (Base10Exponent - 6); Index++) {
+    for (Index = 0; Index < ((UINT32)Base10Exponent - 6); Index++) {
       FreqMhz *= 10;
     }
   } else {
diff --git a/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c b/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
index 9db9dbe..9474606 100644
--- a/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
+++ b/IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIo.c
@@ -1,7 +1,7 @@
 /** @file
   Uses the services of the I/O Library to produce the CPU I/O Protocol
 
-Copyright (c) 2004 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>
 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
 
 This program and the accompanying materials                          
@@ -141,7 +141,7 @@ CpuIoCheckParameter (
   //
   // Check to see if Address is aligned
   //
-  if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {
+  if ((Address & ((UINT64)mInStride[Width] - 1)) != 0) {
     return EFI_UNSUPPORTED;
   }
 
-- 
1.9.5.msysgit.0



  parent reply	other threads:[~2017-02-25  5:12 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-25  5:12 [PATCH v3 00/12] Refine casting expression result to bigger size Hao Wu
2017-02-25  5:12 ` [PATCH v3 01/12] MdePkg: " Hao Wu
2017-02-25  5:12 ` [PATCH v3 02/12] MdeModulePkg: " Hao Wu
2017-03-06  1:37   ` Tian, Feng
2017-02-25  5:12 ` [PATCH v3 03/12] FatPkg: " Hao Wu
2017-02-27  5:07   ` Ni, Ruiyu
2017-02-25  5:12 ` Hao Wu [this message]
2017-02-27  7:06   ` [PATCH v3 04/12] IntelFrameworkModulePkg: " Fan, Jeff
2017-02-25  5:12 ` [PATCH v3 05/12] IntelFsp2WrapperPkg: " Hao Wu
2017-02-25  5:51   ` Yao, Jiewen
2017-02-25  5:12 ` [PATCH v3 06/12] IntelFspWrapperPkg: " Hao Wu
2017-02-25  5:51   ` Yao, Jiewen
2017-02-25  5:12 ` [PATCH v3 07/12] NetworkPkg: " Hao Wu
2017-02-27  2:21   ` Wu, Jiaxin
2017-02-25  5:12 ` [PATCH v3 08/12] PcAtChipsetPkg: " Hao Wu
2017-02-27  7:24   ` Ni, Ruiyu
2017-02-25  5:12 ` [PATCH v3 09/12] SecurityPkg/Opal: " Hao Wu
2017-03-06  1:40   ` Dong, Eric
2017-02-25  5:12 ` [PATCH v3 10/12] ShellPkg: " Hao Wu
2017-02-27  2:22   ` Ni, Ruiyu
2017-02-27 16:38   ` Carsey, Jaben
2017-02-25  5:12 ` [PATCH v3 11/12] SourceLevelDebugPkg: " Hao Wu
2017-02-27  7:27   ` Fan, Jeff
2017-02-25  5:12 ` [PATCH v3 12/12] UefiCpuPkg: " Hao Wu
2017-02-27  7:27   ` Fan, Jeff

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