From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x234.google.com (mail-wr0-x234.google.com [IPv6:2a00:1450:400c:c0c::234]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B3C41821D3 for ; Wed, 1 Mar 2017 08:31:52 -0800 (PST) Received: by mail-wr0-x234.google.com with SMTP id g10so34008402wrg.2 for ; Wed, 01 Mar 2017 08:31:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=04MSbIgNcsOJKjlD4A5ILRUravY+reYyuGvD7qYTivg=; b=dJ48cffBF3/dI72Ynv1qCo7g9OcghMHAq479a0PrJg/Ka+GWZ+Owp0dcyDBqeUkfvT YmZHUCPfZcpciooAUZUkEmACZZChCgMIUaBSpbgdG25n56Asm1M8YGLcBNEPjDMjFZwy kZ3toJeoVSGQjtajnd7QyV4RKqu+yHjOjV+d0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=04MSbIgNcsOJKjlD4A5ILRUravY+reYyuGvD7qYTivg=; b=Y91p7g1/747YWW/I4hV+NadohepJ90s/X+noghfw9yhAisYzHf122QEFIukWbvL0NU k+nfL/O6ZRsBKHIzwAKhSSmA8u+i6xI+0ffStt6TJayz9ZKZQD+9/c/mUMObvrKzg9WP cSJWdqTkt5xXqsV3wagd8ult4Q+r9E3vuqVqHoH/rq8L1jC4M6rav2gvxsy8qY8HCoXW 20VrbPsRY++Wcs+P1QFJM2bRwkTOeKr7b+/ybWOozHOsAecOh5w056bxE0i14h6qeF8z Xbqp98kEF4Jh80Gjj5ODSI65Fs8rOEITNw8lm2l8B4dDhn9/frsKVyI8YaZcNSTsERgV pXCA== X-Gm-Message-State: AMke39nV5qs2VvYQC3oGNpKHzt5AQfGs8IiZu7HIg0zOf1gQLpAXvQmuy/zZqaoQ9u86uWBT X-Received: by 10.223.139.68 with SMTP id v4mr8646267wra.70.1488385911231; Wed, 01 Mar 2017 08:31:51 -0800 (PST) Received: from localhost.localdomain ([105.147.1.203]) by smtp.gmail.com with ESMTPSA id 11sm7275292wrb.10.2017.03.01.08.31.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Mar 2017 08:31:50 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, lersek@redhat.com Cc: Ard Biesheuvel Date: Wed, 1 Mar 2017 16:31:39 +0000 Message-Id: <1488385903-30267-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488385903-30267-1-git-send-email-ard.biesheuvel@linaro.org> References: <1488385903-30267-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [PATCH 1/5] ArmPkg/ArmMmuLib AARCH64: use correct return type for exported functions X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Mar 2017 16:31:53 -0000 The routines ArmConfigureMmu() and SetMemoryAttributes() [*] are declared as returning EFI_STATUS in the respective header files, so align the definitions with that. * SetMemoryAttributes() is declared in the wrong header (and defined in ArmMmuLib for AARCH64 and in CpuDxe for ARM) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 52 ++++++++++---------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c index 2f8f99d44a31..df170d20a2c2 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -329,7 +329,7 @@ GetBlockEntryListFromAddress ( } STATIC -RETURN_STATUS +EFI_STATUS UpdateRegionMapping ( IN UINT64 *RootTable, IN UINT64 RegionStart, @@ -347,7 +347,7 @@ UpdateRegionMapping ( // Ensure the Length is aligned on 4KB boundary if ((RegionLength == 0) || ((RegionLength & (SIZE_4KB - 1)) != 0)) { ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER); - return RETURN_INVALID_PARAMETER; + return EFI_INVALID_PARAMETER; } do { @@ -357,7 +357,7 @@ UpdateRegionMapping ( BlockEntry = GetBlockEntryListFromAddress (RootTable, RegionStart, &TableLevel, &BlockEntrySize, &LastBlockEntry); if (BlockEntry == NULL) { // GetBlockEntryListFromAddress() return NULL when it fails to allocate new pages from the Translation Tables - return RETURN_OUT_OF_RESOURCES; + return EFI_OUT_OF_RESOURCES; } if (TableLevel != 3) { @@ -385,11 +385,11 @@ UpdateRegionMapping ( } while ((RegionLength >= BlockEntrySize) && (BlockEntry <= LastBlockEntry)); } while (RegionLength != 0); - return RETURN_SUCCESS; + return EFI_SUCCESS; } STATIC -RETURN_STATUS +EFI_STATUS FillTranslationTable ( IN UINT64 *RootTable, IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryRegion @@ -446,7 +446,7 @@ GcdAttributeToPageAttribute ( return PageAttributes | TT_AF; } -RETURN_STATUS +EFI_STATUS SetMemoryAttributes ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, @@ -454,7 +454,7 @@ SetMemoryAttributes ( IN EFI_PHYSICAL_ADDRESS VirtualMask ) { - RETURN_STATUS Status; + EFI_STATUS Status; UINT64 *TranslationTable; UINT64 PageAttributes; UINT64 PageAttributeMask; @@ -480,18 +480,18 @@ SetMemoryAttributes ( Length, PageAttributes, PageAttributeMask); - if (RETURN_ERROR (Status)) { + if (EFI_ERROR (Status)) { return Status; } // Invalidate all TLB entries so changes are synced ArmInvalidateTlb (); - return RETURN_SUCCESS; + return EFI_SUCCESS; } STATIC -RETURN_STATUS +EFI_STATUS SetMemoryRegionAttribute ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, @@ -499,23 +499,23 @@ SetMemoryRegionAttribute ( IN UINT64 BlockEntryMask ) { - RETURN_STATUS Status; + EFI_STATUS Status; UINT64 *RootTable; RootTable = ArmGetTTBR0BaseAddress (); Status = UpdateRegionMapping (RootTable, BaseAddress, Length, Attributes, BlockEntryMask); - if (RETURN_ERROR (Status)) { + if (EFI_ERROR (Status)) { return Status; } // Invalidate all TLB entries so changes are synced ArmInvalidateTlb (); - return RETURN_SUCCESS; + return EFI_SUCCESS; } -RETURN_STATUS +EFI_STATUS ArmSetMemoryRegionNoExec ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length @@ -536,7 +536,7 @@ ArmSetMemoryRegionNoExec ( ~TT_ADDRESS_MASK_BLOCK_ENTRY); } -RETURN_STATUS +EFI_STATUS ArmClearMemoryRegionNoExec ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length @@ -554,7 +554,7 @@ ArmClearMemoryRegionNoExec ( Mask); } -RETURN_STATUS +EFI_STATUS ArmSetMemoryRegionReadOnly ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length @@ -567,7 +567,7 @@ ArmSetMemoryRegionReadOnly ( ~TT_ADDRESS_MASK_BLOCK_ENTRY); } -RETURN_STATUS +EFI_STATUS ArmClearMemoryRegionReadOnly ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length @@ -580,7 +580,7 @@ ArmClearMemoryRegionReadOnly ( ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK)); } -RETURN_STATUS +EFI_STATUS EFIAPI ArmConfigureMmu ( IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable, @@ -594,11 +594,11 @@ ArmConfigureMmu ( UINTN T0SZ; UINTN RootTableEntryCount; UINT64 TCR; - RETURN_STATUS Status; + EFI_STATUS Status; if(MemoryTable == NULL) { ASSERT (MemoryTable != NULL); - return RETURN_INVALID_PARAMETER; + return EFI_INVALID_PARAMETER; } // Cover the entire GCD memory space @@ -632,7 +632,7 @@ ArmConfigureMmu ( } else { DEBUG ((EFI_D_ERROR, "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n", MaxAddress)); ASSERT (0); // Bigger than 48-bit memory space are not supported - return RETURN_UNSUPPORTED; + return EFI_UNSUPPORTED; } } else if (ArmReadCurrentEL () == AARCH64_EL1) { // Due to Cortex-A57 erratum #822227 we must set TG1[1] == 1, regardless of EPD1. @@ -654,11 +654,11 @@ ArmConfigureMmu ( } else { DEBUG ((EFI_D_ERROR, "ArmConfigureMmu: The MaxAddress 0x%lX is not supported by this MMU configuration.\n", MaxAddress)); ASSERT (0); // Bigger than 48-bit memory space are not supported - return RETURN_UNSUPPORTED; + return EFI_UNSUPPORTED; } } else { ASSERT (0); // UEFI is only expected to run at EL2 and EL1, not EL3. - return RETURN_UNSUPPORTED; + return EFI_UNSUPPORTED; } // @@ -680,7 +680,7 @@ ArmConfigureMmu ( // Allocate pages for translation table TranslationTable = AllocatePages (1); if (TranslationTable == NULL) { - return RETURN_OUT_OF_RESOURCES; + return EFI_OUT_OF_RESOURCES; } // We set TTBR0 just after allocating the table to retrieve its location from the subsequent // functions without needing to pass this value across the functions. The MMU is only enabled @@ -719,7 +719,7 @@ ArmConfigureMmu ( DEBUG_CODE_END (); Status = FillTranslationTable (TranslationTable, MemoryTable); - if (RETURN_ERROR (Status)) { + if (EFI_ERROR (Status)) { goto FREE_TRANSLATION_TABLE; } MemoryTable++; @@ -739,7 +739,7 @@ ArmConfigureMmu ( ArmEnableDataCache (); ArmEnableMmu (); - return RETURN_SUCCESS; + return EFI_SUCCESS; FREE_TRANSLATION_TABLE: FreePages (TranslationTable, 1); -- 2.7.4