From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x236.google.com (mail-wm0-x236.google.com [IPv6:2a00:1450:400c:c09::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3B167821D4 for ; Wed, 1 Mar 2017 08:31:57 -0800 (PST) Received: by mail-wm0-x236.google.com with SMTP id u199so40818082wmd.1 for ; Wed, 01 Mar 2017 08:31:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2mbrcYlKyLj6RdTjUN/QJcGcwnPNy0JaFEaC8njBOjA=; b=Vaeb/hfI6jMEUSiZVI3rgDGIWB95fatx2AZ27J1AYPuCoNblB+v21sLJgb8t1mcoCP L2ekaYUJHgVbpxsf0a69LmJz94BS8rgoiGDwtl4QZXbpSvDJuXUgA1SPF8l4kamOc6w/ yjrJFIgxMGMv0VTSwKOkggspoXBni1+KIs0Dc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2mbrcYlKyLj6RdTjUN/QJcGcwnPNy0JaFEaC8njBOjA=; b=C/io/KlRmdvHu5TNQUpGKqaHp9k2nEn0XOMtuxUi/Kvp1k71cBh0/dgUdulIV5pYRz a8fERprKFs/iY+IwM5K89lGAScGSj0snF3Y9UTGYFpnZ5YvTuebLcI6MR41Wy3aA7ij4 5ik6WARYiIliULC4Sz1ILl88Dt8vS7/e1vN3gnw7mLrJG4QJN8y2j7VKb+LWMAGMO7rQ YqlIn9MlP4QxIB540pYBuqkI764yOdBsvsnuSDeRUAI2eyC64Qa5qj/UQyV4w1ER5hbr VR7s261vg3vUjh9DDmEow4EyyWEmRg+NHd9jLkjJsFkLeMqFcnkxblCKNhamSB6gLuqi sGUA== X-Gm-Message-State: AMke39lhOCHThhxChzqOl8xmzAQai2wM5/8l1uN03AaLl37X6h+4o69NUV8l3sM9vmAfSiM/ X-Received: by 10.28.66.11 with SMTP id p11mr4516420wma.38.1488385915707; Wed, 01 Mar 2017 08:31:55 -0800 (PST) Received: from localhost.localdomain ([105.147.1.203]) by smtp.gmail.com with ESMTPSA id 11sm7275292wrb.10.2017.03.01.08.31.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Mar 2017 08:31:55 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, lersek@redhat.com Cc: Ard Biesheuvel Date: Wed, 1 Mar 2017 16:31:41 +0000 Message-Id: <1488385903-30267-4-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488385903-30267-1-git-send-email-ard.biesheuvel@linaro.org> References: <1488385903-30267-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [PATCH 3/5] ArmPkg/ArmMmuLib: remove VirtualMask arg from ArmSetMemoryAttributes X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Mar 2017 16:31:57 -0000 We no longer make use of the ArmMmuLib 'feature' to create aliased memory ranges with mismatched attributes, and in fact, it was only wired up in the ARM version to begin with. So remove the VirtualMask argument from ArmSetMemoryAttributes()'s prototype, and remove the dead code that referred to it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 2 +- ArmPkg/Include/Library/ArmMmuLib.h | 3 +-- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 3 +-- ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c | 25 +++++--------------- 4 files changed, 9 insertions(+), 24 deletions(-) diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c index d0a3fedd3aa7..8150486217cf 100644 --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c @@ -210,7 +210,7 @@ CpuSetMemoryAttributes ( if (EFI_ERROR (Status) || (RegionArmAttributes != ArmAttributes) || ((BaseAddress + Length) > (RegionBaseAddress + RegionLength))) { - return ArmSetMemoryAttributes (BaseAddress, Length, EfiAttributes, 0); + return ArmSetMemoryAttributes (BaseAddress, Length, EfiAttributes); } else { return EFI_SUCCESS; } diff --git a/ArmPkg/Include/Library/ArmMmuLib.h b/ArmPkg/Include/Library/ArmMmuLib.h index d3a302fa8125..fb7fd006417c 100644 --- a/ArmPkg/Include/Library/ArmMmuLib.h +++ b/ArmPkg/Include/Library/ArmMmuLib.h @@ -66,8 +66,7 @@ EFI_STATUS ArmSetMemoryAttributes ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, - IN UINT64 Attributes, - IN EFI_PHYSICAL_ADDRESS VirtualMask + IN UINT64 Attributes ); #endif diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c index 77f108971f3e..8bd1c6fad95f 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -450,8 +450,7 @@ EFI_STATUS ArmSetMemoryAttributes ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, - IN UINT64 Attributes, - IN EFI_PHYSICAL_ADDRESS VirtualMask + IN UINT64 Attributes ) { EFI_STATUS Status; diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c index 93980d6d12db..1112660b434e 100644 --- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c @@ -469,8 +469,7 @@ EFI_STATUS UpdatePageEntries ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, - IN UINT64 Attributes, - IN EFI_PHYSICAL_ADDRESS VirtualMask + IN UINT64 Attributes ) { EFI_STATUS Status; @@ -575,11 +574,6 @@ UpdatePageEntries ( // Mask in new attributes and/or permissions PageTableEntry |= EntryValue; - if (VirtualMask != 0) { - // Make this virtual address point at a physical page - PageTableEntry &= ~VirtualMask; - } - if (CurrentPageTableEntry != PageTableEntry) { Mva = (VOID *)(UINTN)((((UINTN)FirstLevelIdx) << TT_DESCRIPTOR_SECTION_BASE_SHIFT) + (PageTableIndex << TT_DESCRIPTOR_PAGE_BASE_SHIFT)); if ((CurrentPageTableEntry & TT_DESCRIPTOR_PAGE_CACHEABLE_MASK) == TT_DESCRIPTOR_PAGE_CACHEABLE_MASK) { @@ -606,8 +600,7 @@ EFI_STATUS UpdateSectionEntries ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, - IN UINT64 Attributes, - IN EFI_PHYSICAL_ADDRESS VirtualMask + IN UINT64 Attributes ) { EFI_STATUS Status = EFI_SUCCESS; @@ -680,7 +673,7 @@ UpdateSectionEntries ( // has this descriptor already been coverted to pages? if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(CurrentDescriptor)) { // forward this 1MB range to page table function instead - Status = UpdatePageEntries ((FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT, TT_DESCRIPTOR_SECTION_SIZE, Attributes, VirtualMask); + Status = UpdatePageEntries ((FirstLevelIdx + i) << TT_DESCRIPTOR_SECTION_BASE_SHIFT, TT_DESCRIPTOR_SECTION_SIZE, Attributes); } else { // still a section entry @@ -689,9 +682,6 @@ UpdateSectionEntries ( // mask in new attributes and/or permissions Descriptor |= EntryValue; - if (VirtualMask != 0) { - Descriptor &= ~VirtualMask; - } if (CurrentDescriptor != Descriptor) { Mva = (VOID *)(UINTN)(((UINTN)FirstLevelTable) << TT_DESCRIPTOR_SECTION_BASE_SHIFT); @@ -717,8 +707,7 @@ EFI_STATUS ArmSetMemoryAttributes ( IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, - IN UINT64 Attributes, - IN EFI_PHYSICAL_ADDRESS VirtualMask + IN UINT64 Attributes ) { EFI_STATUS Status; @@ -736,8 +725,7 @@ ArmSetMemoryAttributes ( "SetMemoryAttributes(): MMU section 0x%lx length 0x%lx to %lx\n", BaseAddress, ChunkLength, Attributes)); - Status = UpdateSectionEntries (BaseAddress, ChunkLength, Attributes, - VirtualMask); + Status = UpdateSectionEntries (BaseAddress, ChunkLength, Attributes); FlushTlbs = TRUE; } else { @@ -756,8 +744,7 @@ ArmSetMemoryAttributes ( "SetMemoryAttributes(): MMU page 0x%lx length 0x%lx to %lx\n", BaseAddress, ChunkLength, Attributes)); - Status = UpdatePageEntries (BaseAddress, ChunkLength, Attributes, - VirtualMask); + Status = UpdatePageEntries (BaseAddress, ChunkLength, Attributes); } if (EFI_ERROR (Status)) { -- 2.7.4