From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ot0-x242.google.com (mail-ot0-x242.google.com [IPv6:2607:f8b0:4003:c0f::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B05E580380 for ; Tue, 21 Mar 2017 14:00:08 -0700 (PDT) Received: by mail-ot0-x242.google.com with SMTP id a12so23763981ota.2 for ; Tue, 21 Mar 2017 14:00:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:subject:to:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-transfer-encoding; bh=FplWb6kLd1trYKcGjsiAEfE1kQEOGjaTujOAwxRaIeM=; b=ea8n2MLJXFYv7gHyTYdY7ltqN66QZ2bFQXZlwdtfIS6aAwXjQ2iyirqJd1Rc6X9+qV qWyRA2DV1JfOJPWp7ZB31H5ymXXXgJK12dakQ9FOi/LHueVMphHztw6XfHKzWlt2tL8s iEkNaI5EW50GerYAC+3gVZz1ZeIFe2RhyYUY/oomjX4vfaujDjMugOZ2f1+M6kKaM0hK +26mRh+7WfJ16BdN+oTVemY5u0poNsFeD3aR39FHQhSSmRl2tA2jgAF9ZWmBUsFHQ6RT jC9LLRlpt9iDTheZDTNBfM3asUQhf4s+B4TkQtWvGTIv5YQCeBbNIdXmiVi0iYk8KnDK Q/CA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:subject:to:cc:date:message-id:in-reply-to :references:user-agent:mime-version:content-transfer-encoding; bh=FplWb6kLd1trYKcGjsiAEfE1kQEOGjaTujOAwxRaIeM=; b=Oia5e7EkF5YhufbS7elqYnENxBWGAO25q9CEVxb1RSUFIZEmdWs1nRNCwNGXFCa5ux O3GcRIb89XqAYrOWnYX9461vNXB4s7jrHk6RQoDbJlSSSPUDP8HrFwBmDGhhlrhyWzow aXqPqOiZqwmdZ1cmBwILPN6utAkcx/5pP2X63I1XOJwSXpVhz9STcFSkCuBKKiWeylSk 9PPh6KsxWOYyh1S0F6JYO419uiwKusXvzzxP9iGE3uR8te0ArdQh/KZ6enXc5oiJUYOX tdHruKjW8HcQiP2pIfRZ98v+Y1SljwXXJSraChk3Mn6k4cYaaPOH0Jv09ML7Hpm+0x8f 42qg== X-Gm-Message-State: AFeK/H1KDM1+f4dexAmeao+DoYlmaDs4YY9AE7ud70cjKeDHm9sph9jJXrzuX4SGylf1wQ== X-Received: by 10.157.12.209 with SMTP id o17mr18354992otd.94.1490130008067; Tue, 21 Mar 2017 14:00:08 -0700 (PDT) Received: from [127.0.1.1] ([165.204.77.1]) by smtp.gmail.com with ESMTPSA id w124sm9309244oiw.21.2017.03.21.14.00.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 Mar 2017 14:00:07 -0700 (PDT) From: Brijesh Singh X-Google-Original-From: Brijesh Singh To: michael.d.kinney@intel.com, ersek@redhat.com, edk2-devel@ml01.01.org, liming.gao@intel.com, jordan.l.justen@intel.com Cc: leo.duran@amd.com, brijesh.singh@amd.com, Thomas.Lendacky@amd.com Date: Tue, 21 Mar 2017 17:00:07 -0400 Message-ID: <149013000711.26803.17257061860484502787.stgit@brijesh-build-machine> In-Reply-To: <149012994545.26803.15256468111517327020.stgit@brijesh-build-machine> References: <149012994545.26803.15256468111517327020.stgit@brijesh-build-machine> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Subject: [RFC PATCH v2 10/10] OvmfPkg/QemuVideoDxe: Clear the C-bit from framebuffer region when SEV is enabled X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Mar 2017 21:00:09 -0000 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Since the framebuffer memory region is shared between the guest and hypervisor hence we must clear the memory encryption bit from this memory region when SEV is enabled. Signed-off-by: Brijesh Singh --- OvmfPkg/QemuVideoDxe/Gop.c | 15 +++++++++++++++ OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf | 1 + 2 files changed, 16 insertions(+) diff --git a/OvmfPkg/QemuVideoDxe/Gop.c b/OvmfPkg/QemuVideoDxe/Gop.c index 359e921..96661d1 100644 --- a/OvmfPkg/QemuVideoDxe/Gop.c +++ b/OvmfPkg/QemuVideoDxe/Gop.c @@ -13,6 +13,8 @@ **/ +#include + #include "Qemu.h" STATIC @@ -65,6 +67,19 @@ QemuVideoCompleteModeData ( (VOID**) &FrameBufDesc ); + // + // Framebuffer memory region is shared between hypervisor and guest, + // Clear the memory encryption mask when SEV is active. + // + if (MemEncryptSevIsEnabled ()) { + EFI_STATUS Status; + + Status = MemEncryptSevClearPageEncMask (FrameBufDesc->AddrRangeMin, EFI_SIZE_TO_PAGES (FrameBufDesc->AddrLen)); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_WARN, "Failed to clear memory encryption mask 0x%#Lx+0x%x\n", FrameBufDesc->AddrRangeMin, FrameBufDesc->AddrLen)); + } + } + Mode->FrameBufferBase = FrameBufDesc->AddrRangeMin; Mode->FrameBufferSize = Info->HorizontalResolution * Info->VerticalResolution; Mode->FrameBufferSize = Mode->FrameBufferSize * ((ModeData->ColorDepth + 7) / 8); diff --git a/OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf b/OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf index affb6ff..83ea86c 100644 --- a/OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf +++ b/OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf @@ -60,6 +60,7 @@ UefiBootServicesTableLib UefiDriverEntryPoint UefiLib + MemEncryptSevLib [Protocols] gEfiDriverSupportedEfiVersionProtocolGuid # PROTOCOL ALWAYS_PRODUCED