From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg0-x242.google.com (mail-pg0-x242.google.com [IPv6:2607:f8b0:400e:c05::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1330F2041D9C9 for ; Wed, 29 Mar 2017 01:20:12 -0700 (PDT) Received: by mail-pg0-x242.google.com with SMTP id o123so1763070pga.1 for ; Wed, 29 Mar 2017 01:20:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=philjordan-eu.20150623.gappssmtp.com; s=20150623; h=from:to:subject:date:message-id; bh=14x3XpanfC0Ezvq+Rw5iCXRvB5jNCmvn5dJ0Rbnpppc=; b=gooMwfRLNnsShtcPYvRJr10pBEEa6LMZ2nl3RhCZnEJMAKXRAqCm9Z8A70ZCO5W2QT /AGnSD8p6mZhC8M3BSrvp7rrpRNuRJgQfQyG8PYN6gpv3OxoKKwDKLEYW773tHvx2pFn Mrz1JPBtndm8vNcx1xHxqIhJZS7JS1H/VV5HjTkCPqrw4/wASsHpWQNKJW1KKxSpIHtq D1PDyTsF9B3tuxr1DYPZW3H/O6LZ5SkBcbk3ErZS4JLYQQAe/YCHuwQH1Uq06O9tAGnv cbuRV+59SRxc+ogIgC61k3RijPQuqIRafMRCB6OGzLJ02AHzT9oCCrvYg1m0sAbBQDyX Hpzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id; bh=14x3XpanfC0Ezvq+Rw5iCXRvB5jNCmvn5dJ0Rbnpppc=; b=c89nnCOLqgfcsp+4zY2S7czh6FJxdgDPT/0hlqxtAxFFSxkBIUjglvYJl+Q0Er6vmg KTMJ/kQP0nalUVmFEh6cahgKRLvvfpyZNPPPLPaKjWTe36GbRuL7spShxoCX+xHTirXB WlVYlQFpegUZMpgdxb+uRXkiLzw7J6MKegNltJqH+KnmGWYk763OAQoBc0k9FcjHrbJb Vc4t5HpW2xl47REYNVDvEwIqu638RdZo4/bqdubs7GUv8l/IUvNCRi1sTG370Ew9TuDj 6f7z0n7QPp7hjID1zFy5tBSft5nlQtdpKzGovwVoBhQ2Bku4hcv0Lc2aht1LSL9+1MQw NJIA== X-Gm-Message-State: AFeK/H0cuLy4D+rz+nONiBfbvWmuwvDStiI+gH2yYt3UJZePtJ+DnbKgU7bFLrWDVyJgZw== X-Received: by 10.98.64.129 with SMTP id f1mr35630572pfd.123.1490775611468; Wed, 29 Mar 2017 01:20:11 -0700 (PDT) Received: from localhost.localdomain ([118.82.182.58]) by smtp.gmail.com with ESMTPSA id v26sm11879729pfl.16.2017.03.29.01.20.09 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 29 Mar 2017 01:20:10 -0700 (PDT) From: Phil Dennis-Jordan To: edk2-devel@lists.01.org Date: Wed, 29 Mar 2017 21:19:55 +1300 Message-Id: <1490775597-24007-1-git-send-email-lists@philjordan.eu> X-Mailer: git-send-email 2.3.2 (Apple Git-55) Subject: [RFC PATCH v1 0/2] OvmfPkg/QemuVideoDxe: Add VMWare SVGA2 framebuffer support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Mar 2017 08:20:12 -0000 This extends the QemuVideoDxe driver to support the VMWare SVGA2 display device implemented by Qemu. Drivers for this device exist for guest OSes which do not support Qemu's other display adapters, so supporting it in OVMF is useful in conjunction with those OSes. I've tried to follow the existing pattern for device-specific code in OVMF's QemuVideoDxe driver as much as possible, with the minimum of additional code. I've marked this patch as RFC for 2 main reasons: 1. I've imported VMWare's own header file with device register constants etc. verbatim. (patch 1/2) This doesn't follow any of the EDK2 coding conventions, and it uses the MIT license, not BSD. Only a small percentage of symbols are actually used in the driver. On the other hand, it's obviously the authoritative source. I'm not sure what the correct etiquette is here, define our own constants, or import the authoritative header file? 2. For the functionality this driver uses, 2 I/O ports are used with 32-bit wide reads and writes. Unfortunately, one of them is not 32-bit aligned. This is fine as far as x86/x86-64 is concerned, but neither EDK2's IoLib nor other platforms support such an access pattern. It seems this issue was already encountered/discussed on the edk2-devel list 4 years ago: http://edk2-devel.narkive.com/bwH3r0us/unaligned-i-o I couldn't find any code resulting from that discussion, and Qemu definitely uses unaligned port numbers for the SVGA2 device. (SVGA_IO_MUL is 1 in hw/display/vmware_vga.c) It does not appear to make any provision for non-x86 architectures, so I assume there's no sensible way to drive the device in those cases. The patch therefore only detects the device on x86, where it uses UnalignedIoWrite/Read32() helper functions which I've based on IoLib's aligned ones. I have only tested the GCC version of these. Feel free to suggest a better way of handling the issue. Github feature branch: https://github.com/pmj/edk2/tree/ovmf_vmware_svga2_v1 Phil Dennis-Jordan (2): OvmfPkg: Add SVGA2 device register definition header from VMWare OvmfPkg: Add VMWare SVGA II support in QemuVideoDxe. OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf | 6 + OvmfPkg/QemuVideoDxe/Qemu.h | 50 + OvmfPkg/QemuVideoDxe/UnalignedIoInternal.h | 51 + OvmfPkg/QemuVideoDxe/svga_reg.h | 1558 ++++++++++++++++++++ OvmfPkg/QemuVideoDxe/Driver.c | 67 + OvmfPkg/QemuVideoDxe/Gop.c | 71 +- OvmfPkg/QemuVideoDxe/Initialize.c | 88 ++ OvmfPkg/QemuVideoDxe/UnalignedIoGcc.c | 59 + OvmfPkg/QemuVideoDxe/UnalignedIoIcc.c | 79 + OvmfPkg/QemuVideoDxe/UnalignedIoMsc.c | 81 + OvmfPkg/QemuVideoDxe/UnalignedIoUnsupported.c | 53 + 11 files changed, 2162 insertions(+), 1 deletion(-) create mode 100644 OvmfPkg/QemuVideoDxe/UnalignedIoInternal.h create mode 100644 OvmfPkg/QemuVideoDxe/svga_reg.h create mode 100644 OvmfPkg/QemuVideoDxe/UnalignedIoGcc.c create mode 100644 OvmfPkg/QemuVideoDxe/UnalignedIoIcc.c create mode 100644 OvmfPkg/QemuVideoDxe/UnalignedIoMsc.c create mode 100644 OvmfPkg/QemuVideoDxe/UnalignedIoUnsupported.c -- 2.3.2 (Apple Git-55)