From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7A9E921BC6ADC for ; Sun, 2 Apr 2017 15:45:09 -0700 (PDT) Received: by mail-pg0-x243.google.com with SMTP id g2so25605588pge.2 for ; Sun, 02 Apr 2017 15:45:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=philjordan-eu.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sqyHHuOknZccu4LZYFsywzbrWsNjOGH39e2Oc9WJgVs=; b=tOkRbih4Z8lgqLJJI2uodTIRZsMflpTv/jCZTRyLcrzCP7fPlQwD/YXGL475KpJj5D /ddHNMar0bB8e1auS7eZBJqEsEteMICCQ5j4aYitN7Y47DpefpuApnv9RXBzsa1V2VX5 GGOh9QpJ60vsEeA8cl3cihj1b2vdPiD//qVPUNAEH33n/mY8ycRgmpPRrTkB5E3EWLYJ KrN9S7GLHZHgy7x6i4oStJeLMw+nK5x5Oi04QRTAYjdcENyaw8nzL7JHAztANAt9DSbO iM2GiKy6RzJX3Nz7dCPgwU16A6uJAOjJq8kqNKHPP03Y6D3OAujCsmPkUX1d8A8qCkRL XMKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sqyHHuOknZccu4LZYFsywzbrWsNjOGH39e2Oc9WJgVs=; b=BQwaR+7S+KPC3YNk55DxabJ7zE9T37lGX7+QI0GGngETFBJ1MmhtwUL4YmzQKupk+Z d24GbgV5z8K5ejkqAN22owPYV5QkVJCtfeJOBUTN5ApY1s+80RXofcrQERKdOToatsO0 raHEcVYmJxvRiXMr/vR3xP5TNuvk2w4QC5Azo02yGlliN7gDKelHhXejA2OkM3FWAwDv Fkshu5JZn5zw92Q7La1u5BUg6oR1i5CcodLlClBTu3sN426fTk5p6pVR+KidoTw+92Eq fPKH5MDQxJfHf6ixqtu90KZvYPCDMA25gbxRCQAls3bA1h9MArEsxYSZhHzRwtuZqFCm Bv5w== X-Gm-Message-State: AFeK/H2CWo7qJvyrr4+cyUG2wBcMy5ltefHaW0GNDhdstFI43OOUj1xpBTxYs1xT8lpQnQ== X-Received: by 10.84.160.6 with SMTP id n6mr17454347pla.178.1491173109115; Sun, 02 Apr 2017 15:45:09 -0700 (PDT) Received: from localhost.localdomain ([210.246.60.121]) by smtp.gmail.com with ESMTPSA id l127sm21891336pga.7.2017.04.02.15.45.06 (version=TLS1 cipher=AES128-SHA bits=128/128); Sun, 02 Apr 2017 15:45:08 -0700 (PDT) From: Phil Dennis-Jordan To: edk2-devel@lists.01.org Cc: Phil Dennis-Jordan , Jordan Justen , Laszlo Ersek Date: Mon, 3 Apr 2017 10:44:55 +1200 Message-Id: <1491173097-37305-2-git-send-email-lists@philjordan.eu> X-Mailer: git-send-email 2.3.2 (Apple Git-55) In-Reply-To: <1491173097-37305-1-git-send-email-lists@philjordan.eu> References: <1491173097-37305-1-git-send-email-lists@philjordan.eu> Subject: [PATCH v2 1/3] OvmfPkg: VMWare SVGA2 display device register definitions X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 02 Apr 2017 22:45:09 -0000 From: Phil Dennis-Jordan This adds a header file defining symbolic constants for the VMWare SVGA2 virtual display device in preparation for supporting it in QemuVideoDXE. It is an extract of the file lib/vmware/svga_reg.h from commit 329dd537456f93a806841ec8a8213aed11395def of VMWare's vmware-svga repository at git://git.code.sf.net/p/vmware-svga/git (See also http://vmware-svga.sourceforge.net/ ) Only the bare essentials necessary for initialisation, modesetting and framebuffer access have been kept from the original file. The original file was released by VMWare under the MIT license, this has been retained. Cc: Jordan Justen Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Phil Dennis-Jordan --- Notes: v2: - New, custom header file instead of importing VMWare's verbatim. [Laszlo] OvmfPkg/Include/IndustryStandard/VMWareSVGA2.h | 102 ++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/OvmfPkg/Include/IndustryStandard/VMWareSVGA2.h b/OvmfPkg/Include/IndustryStandard/VMWareSVGA2.h new file mode 100644 index 000000000000..9db553155957 --- /dev/null +++ b/OvmfPkg/Include/IndustryStandard/VMWareSVGA2.h @@ -0,0 +1,102 @@ +/** @file + + Macro and enum definitions of a subset of port numbers, register identifiers + and values required for driving the VMWare SVGA2 virtual display adapter, + also implemented by Qemu. + + This file's contents was extracted from file lib/vmware/svga_reg.h in commit + 329dd537456f93a806841ec8a8213aed11395def of VMWare's vmware-svga repository: + git://git.code.sf.net/p/vmware-svga/git + + + Copyright 1998-2009 VMware, Inc. All rights reserved. + Portions Copyright 2017 Phil Dennis-Jordan + + Permission is hereby granted, free of charge, to any person + obtaining a copy of this software and associated documentation + files (the "Software"), to deal in the Software without + restriction, including without limitation the rights to use, copy, + modify, merge, publish, distribute, sublicense, and/or sell copies + of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be + included in all copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + SOFTWARE. + +**/ + +#ifndef _VMWARE_SVGA2_H_ +#define _VMWARE_SVGA2_H_ + +// +// IDs for recognising the device +// +#define PCI_VENDOR_ID_VMWARE 0x15AD +#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 + +// +// I/O port BAR offsets for register selection and read/write. +// +// The register index is written to the 32-bit index port, followed by a 32-bit +// read or write on the value port to read or set that register's contents. +// +#define SVGA_INDEX_PORT 0x0 +#define SVGA_VALUE_PORT 0x1 + +// +// Some of the device's register indices for basic framebuffer functionality. +// +enum { + SVGA_REG_ID = 0, + SVGA_REG_ENABLE = 1, + SVGA_REG_WIDTH = 2, + SVGA_REG_HEIGHT = 3, + SVGA_REG_MAX_WIDTH = 4, + SVGA_REG_MAX_HEIGHT = 5, + + SVGA_REG_BITS_PER_PIXEL = 7, + + SVGA_REG_RED_MASK = 9, + SVGA_REG_GREEN_MASK = 10, + SVGA_REG_BLUE_MASK = 11, + SVGA_REG_BYTES_PER_LINE = 12, + + SVGA_REG_FB_OFFSET = 14, + + SVGA_REG_FB_SIZE = 16, + SVGA_REG_CAPABILITIES = 17, + + SVGA_REG_HOST_BITS_PER_PIXEL = 28, +}; + +// +// Values used with SVGA_REG_ID for sanity-checking the device and getting +// its version. +// +#define SVGA_MAGIC 0x900000UL +#define SVGA_MAKE_ID(ver) (SVGA_MAGIC << 8 | (ver)) + +#define SVGA_VERSION_2 2 +#define SVGA_ID_2 SVGA_MAKE_ID(SVGA_VERSION_2) + +#define SVGA_VERSION_1 1 +#define SVGA_ID_1 SVGA_MAKE_ID(SVGA_VERSION_1) + +#define SVGA_VERSION_0 0 +#define SVGA_ID_0 SVGA_MAKE_ID(SVGA_VERSION_0) + +// +// One of the capability bits advertised by SVGA_REG_CAPABILITIES. +// +#define SVGA_CAP_8BIT_EMULATION 0x00000100 + +#endif -- 2.3.2 (Apple Git-55)