From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wr0-x233.google.com (mail-wr0-x233.google.com [IPv6:2a00:1450:400c:c0c::233]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2352821A6F106 for ; Wed, 19 Apr 2017 00:11:02 -0700 (PDT) Received: by mail-wr0-x233.google.com with SMTP id c55so8870009wrc.3 for ; Wed, 19 Apr 2017 00:11:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Gv7OVs5yLnPYi2Dbg7lpsMhAdDUJ3kD4pCoBjVcDg8Q=; b=kUiQmqn6W2QNYJJ++KFxxAf7vLKCWmLUR23nxiH6uZaR/O35g1e9Nc8B/LGuk0F0Vx Kno61DuD7ubtbsqAEa+a7U1cb21Bt1r6Nlj6oAO5BiK+WQfjy0VjMKnSVGq+gsf7T/OX RN9TAI/CVw9DOyF2n/yWXzEVcLx4KjXQWVf7s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Gv7OVs5yLnPYi2Dbg7lpsMhAdDUJ3kD4pCoBjVcDg8Q=; b=AjdCC4Y4lDbVwIB6UCRim9phk23xgAgeqbz6qtjsrJv+1UpAdQea5UoRpFcpB2uyP8 MoX33dRH0MX/GWWczR8XVy0bnA2UObUhwm65kBKGv1OwESRZR+oUeR59MrYpcbCXwise MkQNLcZrtxBWHcLrXpWu0mQJSHeZxyuSoPggb2OUMf8eJ23Z3Pa1ovWx1BVBbgMyHjzj +7b5+Do62QSZw1Lb7nXuA6PDmrmipkIxjuZ8U1xyBho6qsRuxjaPQTUvOtHqIxQo/MoN MMkVUPE7ShTyWhPGtXNjtHAlmAHjCBeZxD08WUUmTdu4sA++4JJYbVSUJauF3jqU3Vj4 Ajog== X-Gm-Message-State: AN3rC/7GbG4nKK80oks5l2Tya3TB/v3/GPAyJheDcmA7ZzpXvemk6YBn FVN/zAAlo2wyvrW1 X-Received: by 10.223.138.199 with SMTP id z7mr1391562wrz.66.1492585860128; Wed, 19 Apr 2017 00:11:00 -0700 (PDT) Received: from localhost.localdomain ([105.150.28.134]) by smtp.gmail.com with ESMTPSA id 135sm1275168wmi.1.2017.04.19.00.10.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 19 Apr 2017 00:10:59 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, liming.gao@intel.com, michael.d.kinney@intel.com Cc: leif.lindholm@linaro.org, Ard Biesheuvel Date: Wed, 19 Apr 2017 08:10:43 +0100 Message-Id: <1492585843-10974-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 Subject: [PATCH v2] MdePkg/IndustryStandard: add definitions for ACPI 6.0 IORT X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Apr 2017 07:11:02 -0000 This adds #defines and struct typedefs for the various node types in the ACPI 6.0 IO Remapping Table (IORT). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- v2: added PDF link to file header updated comment style to align with other ACPI header files MdePkg/Include/IndustryStandard/IoRemappingTable.h | 183 ++++++++++++++++++++ 1 file changed, 183 insertions(+) diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h b/MdePkg/Include/IndustryStandard/IoRemappingTable.h new file mode 100644 index 000000000000..310819b03ff5 --- /dev/null +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h @@ -0,0 +1,183 @@ +/** @file + ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049B + + http://infocenter.arm.com/help/topic/com.arm.doc.den0049b/DEN0049B_IO_Remapping_Table.pdf + + Copyright (c) 2017, Linaro Limited. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ + +#ifndef __IO_REMAPPING_TABLE_H__ +#define __IO_REMAPPING_TABLE_H__ + +#include + +#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0 + +#define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0 +#define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1 +#define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2 +#define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3 +#define EFI_ACPI_IORT_TYPE_SMMUv3 0x4 + +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0 + +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0 +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1 +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2 +#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3 + +#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0 +#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1 + +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0 +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1 +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2 +#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3 + +#define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0 +#define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1 + +#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0 +#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1 + +#define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0 +#define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1 + +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0 +#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1 + +#define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0 + +#pragma pack(1) + +/// +/// Table header +/// +typedef struct { + EFI_ACPI_DESCRIPTION_HEADER Header; + INT32 NumNodes; + INT32 NodeOffset; + INT32 Reserved; +} EFI_ACPI_6_0_IO_REMAPPING_TABLE; + +/// +/// Definition for ID mapping table shared by all node types +/// +typedef struct { + UINT32 InputBase; + UINT32 NumIds; + UINT32 OutputBase; + UINT32 OutputReference; + UINT32 Flags; +} EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE; + +/// +/// Node header definition shared by all node types +/// +typedef struct { + UINT8 Type; + UINT16 Length; + UINT8 Revision; + UINT32 Reserved; + UINT32 NumIdMappings; + UINT32 IdReference; +} EFI_ACPI_6_0_IO_REMAPPING_NODE; + +/// +/// Node type 0: ITS node +/// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT32 NumItsIdentifiers; +//UINT32 ItsIdentifiers[NumItsIdentifiers]; +} EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE; + +/// +/// Node type 1: root complex node +/// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT32 CacheCoherent; + UINT8 AllocationHints; + UINT16 Reserved; + UINT8 MemoryAccessFlags; + + UINT32 AtsAttribute; + UINT32 PciSegmentNumber; +} EFI_ACPI_6_0_IO_REMAPPING_RC_NODE; + +/// +/// Node type 2: named component node +/// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT32 Flags; + UINT32 CacheCoherent; + UINT8 AllocationHints; + UINT16 Reserved; + UINT8 MemoryAccessFlags; + UINT8 AddressSizeLimit; +//UINT8 ObjectName[]; +} EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE; + +/// +/// Node type 3: SMMUv1 or SMMUv2 node +/// +typedef struct { + UINT32 Interrupt; + UINT32 InterruptFlags; +} EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT; + +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT64 Base; + UINT64 Span; + UINT32 Model; + UINT32 Flags; + UINT32 GlobalInterruptArrayRef; + UINT32 NumContextInterrupts; + UINT32 ContextInterruptArrayRef; + UINT32 NumPmuInterrupts; + UINT32 PmuInterruptArrayRef; + + UINT32 SMMU_NSgIrpt; + UINT32 SMMU_NSgIrptFlags; + UINT32 SMMU_NSgCfgIrpt; + UINT32 SMMU_NSgCfgIrptFlags; + +//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[NumContextInterrupts]; +//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[NumPmuInterrupts]; +} EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE; + +/// +/// Node type 4: SMMUv4 node +/// +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_NODE Node; + + UINT64 Base; + UINT32 Flags; + UINT32 Reserved; + UINT64 VatosAddress; + UINT32 Model; + UINT32 Event; + UINT32 Pri; + UINT32 Gerr; + UINT32 Sync; +} EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; + +#pragma pack() + +#endif -- 2.7.4