From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C86D721A13499 for ; Thu, 18 May 2017 11:14:43 -0700 (PDT) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 May 2017 11:14:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,359,1491289200"; d="scan'208";a="103837517" Received: from mdkinney-mobl.amr.corp.intel.com ([10.254.56.31]) by fmsmga005.fm.intel.com with ESMTP; 18 May 2017 11:14:30 -0700 From: Michael Kinney To: edk2-devel@lists.01.org Cc: Jeff Fan , Andrew Fish , Laszlo Ersek Date: Thu, 18 May 2017 11:14:28 -0700 Message-Id: <1495131268-25444-1-git-send-email-michael.d.kinney@intel.com> X-Mailer: git-send-email 2.6.3.windows.1 Subject: [Patch] UefiCpuPkg/PiSmmCpuDxeSmm: Add missing JMP instruction X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 May 2017 18:14:43 -0000 https://bugzilla.tianocore.org/show_bug.cgi?id=555 Add JMP instruction in SmiEntry.S file that is missing. This updates SmiEntry.S to match the logic in SmiEntry.asm and SmiEntry.nasm. The default BUILDRULEORDER has .nasm higher priority than .asm or .S, so this issue was not seen with MSFT or GCC tool chain families. The XCODE5 tool chain overrides the BUILDRULEORDER with .S higher than .nasm, so this issue was only seen when using XCODE5 tool chain when IA32 SMM is enabled. Cc: Jeff Fan Cc: Andrew Fish Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S index 62f1697..3243a91 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S @@ -1,6 +1,6 @@ #------------------------------------------------------------------------------ # -# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.
# This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License # which accompanies this distribution. The full text of the license may be found at @@ -159,6 +159,7 @@ L13: rdmsr orw $MSR_EFER_XD,%ax # enable NXE wrmsr + jmp NxeDone SkipNxe: subl $4, %esp NxeDone: -- 2.6.3.windows.1