From: Jun Nie <jun.nie@linaro.org>
To: olivier.martin@arm.com, haojian.zhuang@linaro.org,
edk2-devel@lists.01.org
Cc: shawn.guo@linaro.org, jason.liu@linaro.org, Jun Nie <jun.nie@linaro.org>
Subject: [PATCH] EmbeddedPkg/MmcDxe: Add non-DDR timing mode support
Date: Thu, 8 Jun 2017 16:12:27 +0800 [thread overview]
Message-ID: <1496909547-16085-1-git-send-email-jun.nie@linaro.org> (raw)
Only DDR mode is support for 8bit mode currently. Add
non-DDR case when configuring ECSD.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jun Nie <jun.nie@linaro.org>
---
EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c b/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c
index 574a77e..5c0d7e7 100644
--- a/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c
+++ b/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c
@@ -286,7 +286,10 @@ InitializeEmmcDevice (
}
Status = Host->SetIos (Host, BusClockFreq, 8, TimingMode[Idx]);
if (!EFI_ERROR (Status)) {
- Status = EmmcSetEXTCSD (MmcHostInstance, EXTCSD_BUS_WIDTH, EMMC_BUS_WIDTH_DDR_8BIT);
+ if (Idx < 2)
+ Status = EmmcSetEXTCSD (MmcHostInstance, EXTCSD_BUS_WIDTH, EMMC_BUS_WIDTH_DDR_8BIT);
+ else
+ Status = EmmcSetEXTCSD (MmcHostInstance, EXTCSD_BUS_WIDTH, EMMC_BUS_WIDTH_8BIT);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "InitializeEmmcDevice(): Failed to set EXTCSD bus width, Status:%r\n", Status));
}
--
1.9.1
next reply other threads:[~2017-06-08 8:11 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-08 8:12 Jun Nie [this message]
2017-06-08 8:39 ` [PATCH] EmbeddedPkg/MmcDxe: Add non-DDR timing mode support Haojian Zhuang
2017-06-08 16:55 ` Leif Lindholm
2017-06-09 3:54 ` Jun Nie
2017-06-08 16:51 ` Leif Lindholm
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