public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: Scott Telford <stelford@cadence.com>
To: <edk2-devel@ml01.01.org>, <leif.lindholm@linaro.org>,
	<ard.biesheuvel@linaro.org>, <graeme.gregory@linaro.org>,
	<afish@apple.com>, <michael.d.kinney@intel.com>
Subject: [staging/cadence-aarch64 PATCH v3 0/6] CadencePkg: Add package for Cadence hardware IP support.
Date: Thu, 22 Jun 2017 10:31:55 +0100	[thread overview]
Message-ID: <1498123921-4638-1-git-send-email-stelford@cadence.com> (raw)

Revised patchset following comments from Leif and Ard.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Telford <stelford@cadence.com>

Scott Telford (6):
  CadencePkg: Add libraries for Cadence CSP platform.
  CadencePkg: Add library for Cadence UART.
  CadencePkg: Add PCI host bridge library for Cadence PCIe Root Complex.
  CadencePkg: Add SEC phase implementation for Cadence CSP platform.
  CadencePkg: Add ACPI tables for Cadence CSP platform.
  CadencePkg: Add .dsc, .fdf and .dec files for Cadence CSP platform.

 CadencePkg/AcpiTables/AcpiTables.inf               |  50 ++
 CadencePkg/AcpiTables/CspPlatform.h                |  46 ++
 CadencePkg/AcpiTables/Dsdt.asl                     | 307 ++++++++++
 CadencePkg/AcpiTables/Fadt.aslc                    |  87 +++
 CadencePkg/AcpiTables/Gtdt.aslc                    |  80 +++
 CadencePkg/AcpiTables/Madt.aslc                    |  71 +++
 CadencePkg/AcpiTables/Mcfg.aslc                    |  76 +++
 CadencePkg/CadenceCsp.dsc                          | 672 +++++++++++++++++++++
 CadencePkg/CadenceCsp.fdf                          | 412 +++++++++++++
 CadencePkg/CadenceCspPkg.dec                       |  55 ++
 CadencePkg/Include/Library/CspSerialPortLib.h      |  86 +++
 CadencePkg/Include/Library/CspSysReg.h             |  37 ++
 .../CadenceCspLib/AArch64/ArmPlatformHelper.S      |  55 ++
 CadencePkg/Library/CadenceCspLib/CadenceCspLib.c   | 133 ++++
 CadencePkg/Library/CadenceCspLib/CadenceCspLib.inf |  68 +++
 .../Library/CadenceCspLib/CadenceCspLibMem.c       | 116 ++++
 .../Library/CadenceCspLib/CadenceCspLibSec.inf     |  52 ++
 .../CadenceCspResetSystemLib.c                     |  82 +++
 .../CadenceCspResetSystemLib.inf                   |  40 ++
 .../Library/CadenceCspSecLib/AArch64/CspBoot.S     |  49 ++
 .../Library/CadenceCspSecLib/AArch64/GicV3.S       |  67 ++
 .../Library/CadenceCspSecLib/CadenceCspSecLib.inf  |  44 ++
 CadencePkg/Library/CadenceCspSecLib/CspSec.c       |  79 +++
 .../CadenceCspSerialPortLib/CspSerialPortLib.c     | 523 ++++++++++++++++
 .../CadenceCspSerialPortLib/CspSerialPortLib.inf   |  52 ++
 .../CadenceCspSerialPortLib/CspSerialPortLib.uni   | Bin 0 -> 1622 bytes
 .../Library/CadencePciHostBridgeLib/CdnsPci.c      | 149 +++++
 .../Library/CadencePciHostBridgeLib/CdnsPci.h      |  88 +++
 .../CadencePciHostBridgeLib/CdnsPciHostBridgeLib.c | 188 ++++++
 .../CdnsPciHostBridgeLib.inf                       |  73 +++
 CadencePkg/Sec/AArch64/Arch.c                      |  25 +
 CadencePkg/Sec/AArch64/ArmCortexA5xHelper.S        |  27 +
 CadencePkg/Sec/AArch64/Helper.S                    |  93 +++
 CadencePkg/Sec/AArch64/SecEntryPoint.S             | 139 +++++
 CadencePkg/Sec/Sec.c                               | 335 ++++++++++
 CadencePkg/Sec/Sec.inf                             |  85 +++
 CadencePkg/Sec/SecInternal.h                       | 105 ++++
 37 files changed, 4646 insertions(+)
 create mode 100644 CadencePkg/AcpiTables/AcpiTables.inf
 create mode 100644 CadencePkg/AcpiTables/CspPlatform.h
 create mode 100644 CadencePkg/AcpiTables/Dsdt.asl
 create mode 100644 CadencePkg/AcpiTables/Fadt.aslc
 create mode 100644 CadencePkg/AcpiTables/Gtdt.aslc
 create mode 100644 CadencePkg/AcpiTables/Madt.aslc
 create mode 100644 CadencePkg/AcpiTables/Mcfg.aslc
 create mode 100644 CadencePkg/CadenceCsp.dsc
 create mode 100644 CadencePkg/CadenceCsp.fdf
 create mode 100644 CadencePkg/CadenceCspPkg.dec
 create mode 100644 CadencePkg/Include/Library/CspSerialPortLib.h
 create mode 100644 CadencePkg/Include/Library/CspSysReg.h
 create mode 100644 CadencePkg/Library/CadenceCspLib/AArch64/ArmPlatformHelper.S
 create mode 100644 CadencePkg/Library/CadenceCspLib/CadenceCspLib.c
 create mode 100644 CadencePkg/Library/CadenceCspLib/CadenceCspLib.inf
 create mode 100644 CadencePkg/Library/CadenceCspLib/CadenceCspLibMem.c
 create mode 100644 CadencePkg/Library/CadenceCspLib/CadenceCspLibSec.inf
 create mode 100644 CadencePkg/Library/CadenceCspResetSystemLib/CadenceCspResetSystemLib.c
 create mode 100644 CadencePkg/Library/CadenceCspResetSystemLib/CadenceCspResetSystemLib.inf
 create mode 100644 CadencePkg/Library/CadenceCspSecLib/AArch64/CspBoot.S
 create mode 100644 CadencePkg/Library/CadenceCspSecLib/AArch64/GicV3.S
 create mode 100644 CadencePkg/Library/CadenceCspSecLib/CadenceCspSecLib.inf
 create mode 100644 CadencePkg/Library/CadenceCspSecLib/CspSec.c
 create mode 100644 CadencePkg/Library/CadenceCspSerialPortLib/CspSerialPortLib.c
 create mode 100644 CadencePkg/Library/CadenceCspSerialPortLib/CspSerialPortLib.inf
 create mode 100644 CadencePkg/Library/CadenceCspSerialPortLib/CspSerialPortLib.uni
 create mode 100644 CadencePkg/Library/CadencePciHostBridgeLib/CdnsPci.c
 create mode 100644 CadencePkg/Library/CadencePciHostBridgeLib/CdnsPci.h
 create mode 100644 CadencePkg/Library/CadencePciHostBridgeLib/CdnsPciHostBridgeLib.c
 create mode 100644 CadencePkg/Library/CadencePciHostBridgeLib/CdnsPciHostBridgeLib.inf
 create mode 100644 CadencePkg/Sec/AArch64/Arch.c
 create mode 100644 CadencePkg/Sec/AArch64/ArmCortexA5xHelper.S
 create mode 100644 CadencePkg/Sec/AArch64/Helper.S
 create mode 100644 CadencePkg/Sec/AArch64/SecEntryPoint.S
 create mode 100644 CadencePkg/Sec/Sec.c
 create mode 100644 CadencePkg/Sec/Sec.inf
 create mode 100644 CadencePkg/Sec/SecInternal.h

-- 
2.2.2



             reply	other threads:[~2017-06-22  9:31 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-22  9:31 Scott Telford [this message]
2017-06-22  9:31 ` [staging/cadence-aarch64 PATCH v3 1/6] CadencePkg: Add libraries for Cadence CSP platform Scott Telford
2017-06-22 14:50   ` Leif Lindholm
2017-06-23 18:37     ` Ard Biesheuvel
2017-06-22  9:31 ` [staging/cadence-aarch64 PATCH v3 2/6] CadencePkg: Add library for Cadence UART Scott Telford
2017-06-22 15:02   ` Leif Lindholm
2017-06-23 18:38     ` Ard Biesheuvel
2017-06-22  9:31 ` [staging/cadence-aarch64 PATCH v3 3/6] CadencePkg: Add PCI host bridge library for Cadence PCIe Root Complex Scott Telford
2017-06-22 15:12   ` Leif Lindholm
2017-06-23 18:43     ` Ard Biesheuvel
2017-06-22  9:31 ` [staging/cadence-aarch64 PATCH v3 4/6] CadencePkg: Add SEC phase implementation for Cadence CSP platform Scott Telford
2017-06-22 15:21   ` Leif Lindholm
2017-06-23 18:43     ` Ard Biesheuvel
2017-06-22  9:32 ` [staging/cadence-aarch64 PATCH v3 5/6] CadencePkg: Add ACPI tables " Scott Telford
2017-06-29 16:17   ` Leif Lindholm
2017-06-22  9:32 ` [staging/cadence-aarch64 PATCH v3 6/6] CadencePkg: Add .dsc, .fdf and .dec files " Scott Telford

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1498123921-4638-1-git-send-email-stelford@cadence.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox