From: Jun Nie <jun.nie@linaro.org>
To: ard.biesheuvel@linaro.org, leif.lindholm@linaro.org,
edk2-devel@lists.01.org, evan.lloyd@arm.com,
Alexei.Fedorov@arm.com
Cc: shawn.guo@linaro.org, jason.liu@linaro.org, Jun Nie <jun.nie@linaro.org>
Subject: [PATCH] ArmPlatformPkg: Support different reg offset to PL011
Date: Mon, 3 Jul 2017 10:48:26 +0800 [thread overview]
Message-ID: <1499050106-12875-1-git-send-email-jun.nie@linaro.org> (raw)
ZTE SoC has different offset for some registers and bits.
Add a macro flag to undef/redef those value. The macro
flag can be enabled in BuildOptions section of platform.dsc.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jun Nie <jun.nie@linaro.org>
---
ArmPlatformPkg/Include/Drivers/PL011Uart.h | 40 ++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/ArmPlatformPkg/Include/Drivers/PL011Uart.h b/ArmPlatformPkg/Include/Drivers/PL011Uart.h
index d5e88e8..87fab60 100644
--- a/ArmPlatformPkg/Include/Drivers/PL011Uart.h
+++ b/ArmPlatformPkg/Include/Drivers/PL011Uart.h
@@ -40,6 +40,34 @@
#define UARTPID2 0xFE8
#define UARTPID3 0xFEC
+#ifdef ZX_PL011_FLAG
+#undef UARTDR
+#undef UARTFR
+#undef UARTIBRD
+#undef UARTFBRD
+#undef UARTLCR_H
+#undef UARTCR
+#undef UARTIFLS
+#undef UARTIMSC
+#undef UARTRIS
+#undef UARTMIS
+#undef UARTICR
+#undef UARTDMACR
+
+#define UARTDR 0x004
+#define UARTFR 0x014
+#define UARTIBRD 0x024
+#define UARTFBRD 0x028
+#define UARTLCR_H 0x030
+#define UARTCR 0x034
+#define UARTIFLS 0x038
+#define UARTIMSC 0x040
+#define UARTRIS 0x044
+#define UARTMIS 0x048
+#define UARTICR 0x04c
+#define UARTDMACR 0x050
+#endif
+
// Data status bits
#define UART_DATA_ERROR_MASK 0x0F00
@@ -57,6 +85,18 @@
#define PL011_UARTFR_DSR (1 << 1) // Data set ready
#define PL011_UARTFR_CTS (1 << 0) // Clear to send
+#ifdef ZX_PL011_FLAG
+#undef PL011_UARTFR_RI
+#undef PL011_UARTFR_BUSY
+#undef PL011_UARTFR_DSR
+#undef PL011_UARTFR_CTS
+
+#define PL011_UARTFR_RI 0x001 // Ring indicator
+#define PL011_UARTFR_BUSY 0x100 // UART busy
+#define PL011_UARTFR_DSR 0x008 // Data set ready
+#define PL011_UARTFR_CTS 0x002 // Clear to send
+#endif
+
// Flag reg bits - alternative names
#define UART_TX_EMPTY_FLAG_MASK PL011_UARTFR_TXFE
#define UART_RX_FULL_FLAG_MASK PL011_UARTFR_RXFF
--
1.9.1
next reply other threads:[~2017-07-03 2:47 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-03 2:48 Jun Nie [this message]
2017-07-03 10:58 ` [PATCH] ArmPlatformPkg: Support different reg offset to PL011 Ard Biesheuvel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1499050106-12875-1-git-send-email-jun.nie@linaro.org \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox