From: Abner Chang <abner.chang@hpe.com>
To: edk2-devel@lists.01.org
Subject: [staging/branch RISC-V PATCH 2/4] BaseTools: Support RISC-V GCC 7.1.1.
Date: Tue, 4 Jul 2017 13:29:22 +0800 [thread overview]
Message-ID: <1499146164-26231-3-git-send-email-abner.chang@hpe.com> (raw)
In-Reply-To: <1499146164-26231-1-git-send-email-abner.chang@hpe.com>
Add build tool definition for RISC-V GCC 7.1.1.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Abner Chang <abner.chang@hpe.com>
---
BaseTools/Conf/tools_def.template | 85 ++++++++++++++++++++++++++++++++++++++-
1 file changed, 84 insertions(+), 1 deletion(-)
diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
index 2ae009e..682d8b3 100644
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -3,7 +3,7 @@
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
# Copyright (c) 2015, Hewlett-Packard Development Company, L.P.<BR>
-# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
+# (C) Copyright 2016-2017 Hewlett Packard Enterprise Development LP<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -204,6 +204,8 @@ DEFINE GCC49_X64_PREFIX = ENV(GCC49_BIN)
#
DEFINE GCC53RISCV_RISCV32_PREFIX = ~/riscv/bin/
DEFINE GCC53RISCV_RISCV64_PREFIX = ~/riscv/bin/
+DEFINE GCC711RISCV_RISCV32_PREFIX = ~/riscv/bin/
+DEFINE GCC711RISCV_RISCV64_PREFIX = ~/riscv/bin/
DEFINE UNIX_IASL_BIN = ENV(IASL_PREFIX)iasl
DEFINE WIN_ASL_BIN_DIR = C:\ASL
@@ -4468,6 +4470,19 @@ DEFINE GCC53RISCV_RISCV64_DLINK_FLAGS = DEF(GCC53RISCV_RISCV32_RISCV64_DLI
DEFINE GCC53RISCV_RISCV64_DLINK2_FLAGS = DEF(GCC49_X64_DLINK2_FLAGS)
DEFINE GCC53RISCV_ASM_FLAGS = DEF(GCC49_ASM_FLAGS)
+DEFINE GCC711RISCV_RISCV32_ARCH = rv32imafd
+DEFINE GCC711RISCV_RISCV64_ARCH = rv64imafd
+DEFINE GCC711RISCV_CC_FLAGS_WARNING_DISABLE = -Wno-tautological-compare -Wno-pointer-compare
+DEFINE GCC711RISCV_RISCV32_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) DEF(GCC711RISCV_CC_FLAGS_WARNING_DISABLE) -march=DEF(GCC711RISCV_RISCV32_ARCH) -malign-double -fno-stack-protector -D EFI32 -fno-asynchronous-unwind-tables -Wno-address -Wno-unused-but-set-variable -fpack-struct=8
+DEFINE GCC711RISCV_RISCV64_CC_FLAGS = DEF(GCC44_ALL_CC_FLAGS) DEF(GCC711RISCV_CC_FLAGS_WARNING_DISABLE) -march=DEF(GCC711RISCV_RISCV64_ARCH) -fno-builtin -fno-builtin-memcpy -fno-stack-protector -Wno-address -fno-asynchronous-unwind-tables -Wno-unused-but-set-variable -fpack-struct=8
+DEFINE GCC711RISCV_RISCV32_RISCV64_DLINK_COMMON = -nostdlib -n -q --gc-sections -z common-page-size=0x40
+DEFINE GCC711RISCV_RISCV32_RISCV64_ASLDLINK_FLAGS = DEF(GCC53RISCV_RISCV32_RISCV64_DLINK_COMMON) --entry ReferenceAcpiTable -u ReferenceAcpiTable
+DEFINE GCC711RISCV_RISCV32_RISCV64_DLINK_FLAGS = DEF(GCC53RISCV_RISCV32_RISCV64_DLINK_COMMON) --entry $(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) -Map $(DEST_DIR_DEBUG)/$(BASE_NAME).map
+DEFINE GCC711RISCV_RISCV32_DLINK2_FLAGS = DEF(GCC49_IA32_DLINK2_FLAGS)
+DEFINE GCC711RISCV_RISCV64_DLINK_FLAGS = DEF(GCC53RISCV_RISCV32_RISCV64_DLINK_FLAGS) -melf64lriscv --oformat=elf64-littleriscv --no-relax
+DEFINE GCC711RISCV_RISCV64_DLINK2_FLAGS = DEF(GCC49_X64_DLINK2_FLAGS)
+DEFINE GCC711RISCV_ASM_FLAGS = DEF(GCC49_ASM_FLAGS)
+
####################################################################################
#
# Unix GCC And Intel Linux ACPI Compiler
@@ -5269,6 +5284,74 @@ RELEASE_GCC49_AARCH64_DLINK_FLAGS = DEF(GCC49_AARCH64_DLINK_FLAGS)
####################################################################################
#
+# GCC 7.1.1 RISC-V This configuration is used to compile under Linux to produce
+# PE/COFF binaries using GCC 7.1.1.
+#
+####################################################################################
+
+*_GCC711RISCV_*_*_FAMILY = GCC
+
+*_GCC711RISCV_*_MAKE_PATH = DEF(GCC49_IA32_PREFIX)make
+*_GCC711RISCV_*_PP_FLAGS = DEF(GCC_PP_FLAGS)
+*_GCC711RISCV_*_ASLPP_FLAGS = DEF(GCC_ASLPP_FLAGS)
+*_GCC711RISCV_*_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS)
+*_GCC711RISCV_*_VFRPP_FLAGS = DEF(GCC_VFRPP_FLAGS)
+*_GCC711RISCV_*_APP_FLAGS =
+*_GCC711RISCV_*_ASL_FLAGS = DEF(IASL_FLAGS)
+*_GCC711RISCV_*_ASL_OUTFLAGS = DEF(IASL_OUTFLAGS)
+
+##################
+# GCC711RISCV RISCV32 definitions
+##################
+
+*_GCC711RISCV_RISCV32_OBJCOPY_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-objcopy
+*_GCC711RISCV_RISCV32_SLINK_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc-ar
+*_GCC711RISCV_RISCV32_DLINK_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-ld
+*_GCC711RISCV_RISCV32_ASLDLINK_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-ld
+*_GCC711RISCV_RISCV32_ASM_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV32_PP_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV32_VFRPP_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV32_ASLCC_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV32_ASLPP_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV32_RC_PATH = ENV(GCC711RISCV_RISCV32_PREFIX)riscv64-unknown-elf-objcopy
+
+*_GCC711RISCV_RISCV32_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS) -m32
+*_GCC711RISCV_RISCV32_ASLDLINK_FLAGS = DEF(GCC711RISCV_RISCV32_RISCV64_ASLDLINK_FLAGS) -m elf_i386
+*_GCC711RISCV_RISCV32_ASM_FLAGS = DEF(GCC711RISCV_ASM_FLAGS) -m32 -march=i386
+*_GCC711RISCV_RISCV32_CC_FLAGS = DEF(GCC711RISCV_RISCV32_CC_FLAGS) -Os
+*_GCC711RISCV_RISCV32_DLINK_FLAGS = DEF(GCC711RISCV_RISCV32_RISCV64_DLINK_FLAGS) -m elf_i386 --oformat=elf32-i386
+*_GCC711RISCV_RISCV32_DLINK2_FLAGS = DEF(GCC711RISCV_RISCV32_DLINK2_FLAGS)
+*_GCC711RISCV_RISCV32_RC_FLAGS = DEF(GCC_IA32_RC_FLAGS)
+*_GCC711RISCV_RISCV32_OBJCOPY_FLAGS =
+*_GCC711RISCV_RISCV32_NASM_FLAGS = -f elf32
+
+##################
+# GCC711RISCV RISCV64 definitions
+##################
+*_GCC711RISCV_RISCV64_OBJCOPY_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-objcopy
+*_GCC711RISCV_RISCV64_CC_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV64_SLINK_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc-ar
+*_GCC711RISCV_RISCV64_DLINK_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-ld
+*_GCC711RISCV_RISCV64_ASLDLINK_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-ld
+*_GCC711RISCV_RISCV64_ASM_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV64_PP_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV64_VFRPP_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV64_ASLCC_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV64_ASLPP_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-gcc
+*_GCC711RISCV_RISCV64_RC_PATH = ENV(GCC711RISCV_RISCV64_PREFIX)riscv64-unknown-elf-objcopy
+
+*_GCC711RISCV_RISCV64_ASLCC_FLAGS = DEF(GCC_ASLCC_FLAGS) -m64
+*_GCC711RISCV_RISCV64_ASLDLINK_FLAGS = DEF(GCC711RISCV_RISCV32_RISCV64_ASLDLINK_FLAGS) -m elf_x86_64
+*_GCC711RISCV_RISCV64_ASM_FLAGS = DEF(GCC711RISCV_ASM_FLAGS)
+*_GCC711RISCV_RISCV64_CC_FLAGS = DEF(GCC711RISCV_RISCV64_CC_FLAGS) -save-temps
+*_GCC711RISCV_RISCV64_DLINK_FLAGS = DEF(GCC711RISCV_RISCV64_DLINK_FLAGS)
+*_GCC711RISCV_RISCV64_DLINK2_FLAGS = DEF(GCC711RISCV_RISCV64_DLINK2_FLAGS)
+*_GCC711RISCV_RISCV64_RC_FLAGS = DEF(GCC_IA32_RC_FLAGS)
+*_GCC711RISCV_RISCV64_OBJCOPY_FLAGS =
+*_GCC711RISCV_RISCV64_NASM_FLAGS = -f elf64
+
+####################################################################################
+#
# CLANG35 - This configuration is used to compile under Linux to produce
# PE/COFF binaries using the clang compiler and assembler (v3.5 and up)
# and GNU linker
--
2.7.4
next prev parent reply other threads:[~2017-07-04 5:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-04 5:29 [staging/branch RISC-V PATCH 0/4] RISC-V edk2 port GCC 7.1.1 Abner Chang
2017-07-04 5:29 ` [staging/branch RISC-V PATCH 1/4] RiscVPkg/Sec: Use MRET in machine trap handler Abner Chang
2017-07-04 5:29 ` Abner Chang [this message]
2017-07-04 5:29 ` [staging/branch RISC-V PATCH 3/4] BaseTools: Add more RISC-V relocation types Abner Chang
2017-07-04 5:29 ` [staging/branch RISC-V PATCH 4/4] RiscVVirtPkg: Update README file Abner Chang
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