From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf0-x22c.google.com (mail-lf0-x22c.google.com [IPv6:2a00:1450:4010:c07::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E03E62094561F for ; Tue, 4 Jul 2017 06:23:01 -0700 (PDT) Received: by mail-lf0-x22c.google.com with SMTP id b207so118830724lfg.2 for ; Tue, 04 Jul 2017 06:24:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PEQNcf3btk9MMoMC0qc6msWMMPRNjUFU+hxv90elF3A=; b=y7M/WWRblurePQYV4dy8gVpxUTnq+icEhONa09/6C9hGj2kEG1WEPmg9co9H4xN3pb lb4Jcelzzllb1yrUUkROhdJS7W9J7urX9AKIBtviTTMPEYAdyfg6085VdVIqjtjAbKy+ uYmWyNzRCSNnKlVDGSzySdG7kNAW2itPRxlrveEEKXM2kQTYUg90nkUMLOKdHI3gU7Af 5zrCv2PpR+JwaaaEMosAX2LGlBEDoL55ZA/TidrT/h9zOOivosz4Nbn07pW3spTYFY2Z tISooban8lr05VEQJCYHu5TZ/PG+2KARyP5QEl2hUAV5vBLeYFkTOWZPlA4F5qK0bRCy nQXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PEQNcf3btk9MMoMC0qc6msWMMPRNjUFU+hxv90elF3A=; b=cb+smyNTone6HojdJ5FSs0CAui381c9Siry6e02FNzIAKmc93ThJuuRd+3hywnbtgG TWxWUtEb4lZwXsA0VmwzaOP5vT9Ofs9Hzbj6MdWk1S8xTH29ztyd0REAq8aoSOBwCLid 2cvry78X0H4QIBxWg60X6PvMbxAdOaQt8qsXK1GVvnvDQvnPvPN6vc1fqeKNNRkYAoLD +oI+DVzA926aSvK5rzfBxsOrHFZQCBz0kK4le1clrNk/Gyw4ETjdkK6XprTPkkuAbg2s TF+BAFYebbMsG79PUiUUjJbJmtmQ8KtGAZ1EV5F8KslbQm4VK8dbBNmAWz2KjBOrf13C zFGw== X-Gm-Message-State: AKS2vOz9G3U8hexZtrUAT+k4fVbNEKn66mdzSso+4plLQt83ogwFYAiz qjcpIo0pHTxknQqQpf5t2w== X-Received: by 10.25.67.22 with SMTP id q22mr11068883lfa.144.1499174678156; Tue, 04 Jul 2017 06:24:38 -0700 (PDT) Received: from mw-mint.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id c185sm4980970lfc.43.2017.07.04.06.24.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 04 Jul 2017 06:24:37 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, mw@semihalf.com, jsd@semihalf.com, jinghua@marvell.com Date: Tue, 4 Jul 2017 15:24:13 +0200 Message-Id: <1499174653-330-11-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499174653-330-1-git-send-email-mw@semihalf.com> References: <1499174653-330-1-git-send-email-mw@semihalf.com> Subject: [platforms: PATCH 10/10] Platform/Marvell: ComPhyLib: Add support for SATA ports on CP110 slave X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Jul 2017 13:23:02 -0000 From: Ard Biesheuvel Add support for PHY_TYPE_SATA2 and PHY_TYPE_SATA3, which map to the SATA ports on the second CP110's AHCI controller. While at it, add a missing newline in the debug output to make it more legible. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Signed-off-by: Marcin Wojtas --- Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c b/Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c index de35265..5180060 100755 --- a/Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c +++ b/Platform/Marvell/Library/ComPhyLib/ComPhyCp110.c @@ -54,21 +54,23 @@ DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE; */ COMPHY_MUX_DATA Cp110ComPhyMuxData[] = { /* Lane 0 */ - {4, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII1, 0x1}, {COMPHY_TYPE_SATA1, 0x4}}}, + {4, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII1, 0x1}, {COMPHY_TYPE_SATA1, 0x4}, + {COMPHY_TYPE_SATA3, 0x4}}}, /* Lane 1 */ - {4, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII2, 0x1}, {COMPHY_TYPE_SATA0, 0x4}}}, + {4, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII2, 0x1}, {COMPHY_TYPE_SATA0, 0x4}, + {COMPHY_TYPE_SATA2, 0x4}}}, /* Lane 2 */ {6, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII0, 0x1}, {COMPHY_TYPE_RXAUI0, 0x1}, - {COMPHY_TYPE_SFI, 0x1}, {COMPHY_TYPE_SATA0, 0x4}}}, + {COMPHY_TYPE_SFI, 0x1}, {COMPHY_TYPE_SATA0, 0x4}, {COMPHY_TYPE_SATA2, 0x4}}}, /* Lane 3 */ - {8, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_RXAUI1, 0x1}, {COMPHY_TYPE_SGMII1, 0x2}, - {COMPHY_TYPE_SATA1, 0x4}}}, + {5, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_RXAUI1, 0x1}, {COMPHY_TYPE_SGMII1, 0x2}, + {COMPHY_TYPE_SATA1, 0x4}, {COMPHY_TYPE_SATA3, 0x4}}}, /* Lane 4 */ - {7, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII0, 0x2}, {COMPHY_TYPE_RXAUI0, 0x2}, + {5, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII0, 0x2}, {COMPHY_TYPE_RXAUI0, 0x2}, {COMPHY_TYPE_SFI, 0x2}, {COMPHY_TYPE_SGMII1, 0x1}}}, /* Lane 5 */ - {6, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII2, 0x1}, {COMPHY_TYPE_RXAUI1, 0x2}, - {COMPHY_TYPE_SATA1, 0x4}}}, + {5, {{COMPHY_TYPE_UNCONNECTED, 0x0}, {COMPHY_TYPE_SGMII2, 0x1}, {COMPHY_TYPE_RXAUI1, 0x2}, + {COMPHY_TYPE_SATA1, 0x4}, {COMPHY_TYPE_SATA3, 0x4}}}, }; COMPHY_MUX_DATA Cp110ComPhyPipeMuxData[] = { @@ -1840,7 +1842,7 @@ ComPhyCp110Init ( break; } if (EFI_ERROR(Status)) { - DEBUG ((DEBUG_ERROR, "Failed to initialize Lane %d\n with Status = 0x%x", Lane, Status)); + DEBUG ((DEBUG_ERROR, "Failed to initialize Lane %d\n with Status = 0x%x\n", Lane, Status)); PtrComPhyMap->Type = COMPHY_TYPE_UNCONNECTED; } } -- 2.7.4