From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 075A321E0C304 for ; Fri, 28 Jul 2017 02:10:52 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP; 28 Jul 2017 02:12:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,425,1496127600"; d="scan'208";a="1177283701" Received: from shwdeopenpsi068.ccr.corp.intel.com ([10.239.9.12]) by fmsmga001.fm.intel.com with ESMTP; 28 Jul 2017 02:12:39 -0700 From: Star Zeng To: edk2-devel@lists.01.org Cc: Star Zeng , Liming Gao Date: Fri, 28 Jul 2017 17:12:12 +0800 Message-Id: <1501233133-23612-2-git-send-email-star.zeng@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1501233133-23612-1-git-send-email-star.zeng@intel.com> References: <1501233133-23612-1-git-send-email-star.zeng@intel.com> Subject: [PATCH 1/2] MdePkg PiPeiCis.h: Add description for notification PPI from SEC X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Jul 2017 09:10:52 -0000 This patch is to follow latest (>= 1.5) PI spec to add description for notification PPI from SEC Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng --- MdePkg/Include/Pi/PiPeiCis.h | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/MdePkg/Include/Pi/PiPeiCis.h b/MdePkg/Include/Pi/PiPeiCis.h index 92d6f0641ede..eda814a8701a 100644 --- a/MdePkg/Include/Pi/PiPeiCis.h +++ b/MdePkg/Include/Pi/PiPeiCis.h @@ -230,7 +230,7 @@ EFI_STATUS @retval EFI_SUCCESS The interface was successfully installed. @retval EFI_INVALID_PARAMETER The PpiList pointer is NULL, or any of the PEI PPI descriptors in the - list do not have the EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field. + list do not have the EFI_PEI_PPI_DESCRIPTOR_NOTIFY_TYPES bit set in the Flags field. @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database. **/ @@ -1004,13 +1004,14 @@ typedef struct _EFI_SEC_PEI_HAND_OFF { allows the SEC phase to pass information about the stack, temporary RAM and the Boot Firmware Volume. In addition, it also allows the SEC phase to pass services and data forward for use - during the PEI phase in the form of one or more PPIs. There is - no limit to the number of additional PPIs that can be passed - from SEC into the PEI Foundation. As part of its initialization - phase, the PEI Foundation will add these SEC-hosted PPIs to its - PPI database such that both the PEI Foundation and any modules - can leverage the associated service calls and/or code in these - early PPIs. + during the PEI phase in the form of one or more PPIs. These PPI's + will be installed and/or immediately signaled if they are + notification type. There is no limit to the number of additional + PPIs that can be passed from SEC into the PEI Foundation. As part + of its initialization phase, the PEI Foundation will add these + SEC-hosted PPIs to its PPI database such that both the PEI + Foundation and any modules can leverage the associated service + calls and/or code in these early PPIs. @param SecCoreData Points to a data structure containing information about the PEI core's -- 2.7.0.windows.1