From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CF9F421D091BF for ; Tue, 1 Aug 2017 00:48:47 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Aug 2017 00:50:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,305,1498546800"; d="scan'208";a="999468493" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.158.51]) by orsmga003.jf.intel.com with ESMTP; 01 Aug 2017 00:50:47 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Jeff Fan , Ruiyu Ni Date: Tue, 1 Aug 2017 15:50:37 +0800 Message-Id: <1501573838-10740-3-git-send-email-eric.dong@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1501573838-10740-1-git-send-email-eric.dong@intel.com> References: <1501573838-10740-1-git-send-email-eric.dong@intel.com> Subject: [Patch 2/3] UefiCpuPkg CpuCommonFeaturesLib: Enable LMCE feature. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 01 Aug 2017 07:48:48 -0000 Cc: Jeff Fan Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong --- .../CpuCommonFeaturesLib/CpuCommonFeatures.h | 56 +++++++++++++- .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.c | 12 +++ .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 1 + UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c | 90 ++++++++++++++++++++++ 4 files changed, 157 insertions(+), 2 deletions(-) create mode 100644 UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h index c03e5ab..67a44c6 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeatures.h @@ -866,8 +866,8 @@ FeatureControlGetConfigData ( CPU_FEATURE_GET_CONFIG_DATA was not provided in RegisterCpuFeature(). - @retval TRUE Enhanced Intel SpeedStep feature is supported. - @retval FALSE Enhanced Intel SpeedStep feature is not supported. + @retval TRUE Protected Processor Inventory Number feature is supported. + @retval FALSE Protected Processor Inventory Number feature is not supported. @note This service could be called by BSP/APs. **/ @@ -909,4 +909,56 @@ PpinInitialize ( IN BOOLEAN State ); +/** + Detects if Local machine check exception feature supported on current + processor. + + @param[in] ProcessorNumber The index of the CPU executing this function. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION + structure for the CPU executing this function. + @param[in] ConfigData A pointer to the configuration buffer returned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provided in + RegisterCpuFeature(). + + @retval TRUE Local machine check exception feature is supported. + @retval FALSE Local machine check exception feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +LmceSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ); + +/** + Initializes Local machine check exception feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this function. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION + structure for the CPU executing this function. + @param[in] ConfigData A pointer to the configuration buffer returned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provided in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Protected Processor Inventory + Number feature must be enabled. + If FALSE, then the Protected Processor Inventory + Number feature must be disabled. + + @retval RETURN_SUCCESS Local machine check exception feature is initialized. + +**/ +RETURN_STATUS +EFIAPI +LmceInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ); + #endif diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c index b88b7d1..4c78209 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c @@ -217,6 +217,18 @@ CpuCommonFeaturesLibConstructor ( ); ASSERT_EFI_ERROR (Status); } + if (IsCpuFeatureSupported (CPU_FEATURE_LMCE)) { + Status = RegisterCpuFeature ( + "LMCE", + NULL, + LmceSupport, + LmceInitialize, + CPU_FEATURE_LMCE, + CPU_FEATURE_LOCK_FEATURE_CONTROL_REGISTER | CPU_FEATURE_BEFORE, + CPU_FEATURE_END + ); + ASSERT_EFI_ERROR (Status); + } return RETURN_SUCCESS; } diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf index 202d560..2cca58e 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf @@ -48,6 +48,7 @@ PendingBreak.c X2Apic.c Ppin.c + Lmce.c [Packages] MdePkg/MdePkg.dec diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c new file mode 100644 index 0000000..8f4fa03 --- /dev/null +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c @@ -0,0 +1,90 @@ +/** @file + Local machine check exception feature. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "CpuCommonFeatures.h" + +/** + Detects if Local machine check exception feature supported on current + processor. + + @param[in] ProcessorNumber The index of the CPU executing this function. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION + structure for the CPU executing this function. + @param[in] ConfigData A pointer to the configuration buffer returned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provided in + RegisterCpuFeature(). + + @retval TRUE Local machine check exception feature is supported. + @retval FALSE Local machine check exception feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +LmceSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + MSR_IA32_MCG_CAP_REGISTER McgCap; + + McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP); + return (BOOLEAN) (McgCap.Bits.MCG_LMCE_P != 0); +} + +/** + Initializes Local machine check exception feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this function. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFORMATION + structure for the CPU executing this function. + @param[in] ConfigData A pointer to the configuration buffer returned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provided in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Protected Processor Inventory + Number feature must be enabled. + If FALSE, then the Protected Processor Inventory + Number feature must be disabled. + + @retval RETURN_SUCCESS Local machine check exception feature is initialized. + +**/ +RETURN_STATUS +EFIAPI +LmceInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; + + ASSERT (ConfigData != NULL); + MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; + if (MsrRegister[ProcessorNumber].Bits.Lock == 0) { + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_FEATURE_CONTROL, + MSR_IA32_FEATURE_CONTROL_REGISTER, + Bits.LmceOn, + (State) ? 1 : 0 + ); + } + return RETURN_SUCCESS; +} -- 2.7.0.windows.1