From: Star Zeng <star.zeng@intel.com>
To: edk2-devel@lists.01.org
Cc: Star Zeng <star.zeng@intel.com>, Hao Wu <hao.a.wu@intel.com>,
Liming Gao <liming.gao@intel.com>, Jeff Fan <jeff.fan@intel.com>
Subject: [PATCH] UefiCpuPkg SecCore: Fix operands of different size in bitwise operation
Date: Wed, 2 Aug 2017 10:09:59 +0800 [thread overview]
Message-ID: <1501639799-46452-1-git-send-email-star.zeng@intel.com> (raw)
It is introduced by 9e9ca2100f22be29f1a53129d741f4305ff34a71.
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
---
UefiCpuPkg/SecCore/SecMain.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c
index e9e243ca0585..173bbfcfcba4 100644
--- a/UefiCpuPkg/SecCore/SecMain.c
+++ b/UefiCpuPkg/SecCore/SecMain.c
@@ -281,7 +281,7 @@ SecStartupPhase2(
// will be built based on them in PEI phase.
//
SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);
- SecCoreData->PeiTemporaryRamSize &= ~0x07;
+ SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;
} else {
//
// No addition PPI, PpiList directly point to the common PPI list.
--
2.7.0.windows.1
next reply other threads:[~2017-08-02 2:07 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-02 2:09 Star Zeng [this message]
2017-08-02 4:40 ` [PATCH] UefiCpuPkg SecCore: Fix operands of different size in bitwise operation Wu, Hao A
2017-08-02 8:19 ` Gao, Liming
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