From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2CB602095DE50 for ; Fri, 11 Aug 2017 07:07:37 -0700 (PDT) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Aug 2017 07:09:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,358,1498546800"; d="scan'208";a="136371828" Received: from jyao1-mobl.ccr.corp.intel.com ([10.254.211.254]) by orsmga005.jf.intel.com with ESMTP; 11 Aug 2017 07:09:56 -0700 From: Jiewen Yao To: edk2-devel@lists.01.org Cc: Liming Gao , Star Zeng Date: Fri, 11 Aug 2017 22:09:49 +0800 Message-Id: <1502460591-14428-3-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1502460591-14428-1-git-send-email-jiewen.yao@intel.com> References: <1502460591-14428-1-git-send-email-jiewen.yao@intel.com> Subject: [PATCH 2/4] MdePkg/BaseCpuLib: Add CacheLineFlush function. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 11 Aug 2017 14:07:37 -0000 This function will be used by IntelVTd driver. Cc: Liming Gao Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao --- MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 5 ++- MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c | 16 ++++++++- MdePkg/Library/BaseCpuLib/Ia32/CacheLineFlush.nasm | 37 ++++++++++++++++++++ MdePkg/Library/BaseCpuLib/X64/CacheLineFlush.nasm | 37 ++++++++++++++++++++ 4 files changed, 93 insertions(+), 2 deletions(-) diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf index 637a3c5..b43b393 100644 --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf @@ -4,7 +4,7 @@ # CPU Library implemented using ASM functions for IA-32 and X64, # PAL CALLs for IPF, and empty functions for EBC. # -# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
+# Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
# @@ -33,6 +33,8 @@ # [Sources.IA32] + Ia32/CacheLineFlush.nasm + Ia32/CpuSleep.c | MSFT Ia32/CpuFlushTlb.c | MSFT @@ -45,6 +47,7 @@ Ia32/CpuFlushTlbGcc.c | GCC [Sources.X64] + X64/CacheLineFlush.nasm X64/CpuFlushTlb.nasm X64/CpuFlushTlb.asm X64/CpuSleep.nasm diff --git a/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c b/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c index de63d63..0c554c2 100644 --- a/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c +++ b/MdePkg/Library/BaseCpuLib/Ebc/CpuSleepFlushTlb.c @@ -1,7 +1,7 @@ /** @file Base Library CPU Functions for EBC - Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -15,6 +15,20 @@ #include /** + Flushes one cache line. + + Flushes one cache line. The size of cache line can be got by CPU register. +**/ +VOID +EFIAPI +CacheLineFlush ( + IN UINTN Address + ) +{ + ASSERT (FALSE); +} + +/** Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU. Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU. diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CacheLineFlush.nasm b/MdePkg/Library/BaseCpuLib/Ia32/CacheLineFlush.nasm new file mode 100644 index 0000000..a2557ab --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/Ia32/CacheLineFlush.nasm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ; +; Copyright (c) 2017, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CacheLineFlush.Asm +; +; Abstract: +; +; CacheLineFlush function +; +; Notes: +; +;------------------------------------------------------------------------------ + + SECTION .text + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; CacheLineFlush ( +; IN UINTN Address +; ); +;------------------------------------------------------------------------------ +global ASM_PFX(CacheLineFlush) +ASM_PFX(CacheLineFlush): + mov eax, [esp + 4] + clflush [eax] + ret + diff --git a/MdePkg/Library/BaseCpuLib/X64/CacheLineFlush.nasm b/MdePkg/Library/BaseCpuLib/X64/CacheLineFlush.nasm new file mode 100644 index 0000000..7cf736e --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/X64/CacheLineFlush.nasm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ; +; Copyright (c) 2017, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CacheLineFlush.Asm +; +; Abstract: +; +; CacheLineFlush function +; +; Notes: +; +;------------------------------------------------------------------------------ + + DEFAULT REL + SECTION .text + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; CacheLineFlush ( +; IN UINTN Address +; ); +;------------------------------------------------------------------------------ +global ASM_PFX(CacheLineFlush) +ASM_PFX(CacheLineFlush): + clflush [rcx] + ret + -- 2.7.4.windows.1