From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CC30221D2E635 for ; Wed, 23 Aug 2017 20:01:01 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Aug 2017 20:03:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,419,1498546800"; d="scan'208";a="127637283" Received: from ydong10-win10.ccr.corp.intel.com ([10.239.158.51]) by orsmga002.jf.intel.com with ESMTP; 23 Aug 2017 20:03:34 -0700 From: Eric Dong To: edk2-devel@lists.01.org Cc: Michael Kinney , Ruiyu Ni Date: Thu, 24 Aug 2017 11:03:26 +0800 Message-Id: <1503543807-6304-4-git-send-email-eric.dong@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1503543807-6304-1-git-send-email-eric.dong@intel.com> References: <1503543807-6304-1-git-send-email-eric.dong@intel.com> Subject: [Patch 3/4] UefiCpuPkg/CpuCommonFeaturesLib: Remove redundant definition. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Aug 2017 03:01:02 -0000 The EnumProcTraceMemDisable/OutputSchemeInvalid are redundant definitions. These definitions can be handled by other code, so remove them. V2: Change enum members name. Cc: Michael Kinney Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong --- UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c index e4636b2..167c1be 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c @@ -30,10 +30,9 @@ /// Processor trace output scheme selection. /// typedef enum { - OutputSchemeSingleRange = 0, - OutputSchemeToPA, - OutputSchemeInvalid -} PROC_TRACE_OUTPUT_SCHEME; + RtitOutputSchemeSingleRange = 0, + RtitOutputSchemeToPA +} RTIT_OUTPUT_SCHEME; typedef struct { BOOLEAN ProcTraceSupported; @@ -122,7 +121,7 @@ ProcTraceSupport ( // ProcTraceData = (PROC_TRACE_DATA *) ConfigData; if ((ProcTraceData->ProcTraceMemSize > RtitTopaMemorySize128M) || - (ProcTraceData->ProcTraceOutputScheme > ProcTraceOutputSchemeToPA)) { + (ProcTraceData->ProcTraceOutputScheme > RtitOutputSchemeToPA)) { return FALSE; } @@ -138,8 +137,8 @@ ProcTraceSupport ( AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE, CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, NULL, &Ecx.Uint32, NULL); ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported = (BOOLEAN) (Ecx.Bits.RTIT == 1); ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported = (BOOLEAN) (Ecx.Bits.SingleRangeOutput == 1); - if (ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported || - ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported) { + if ((ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported && (ProcTraceData->ProcTraceOutputScheme == RtitOutputSchemeToPA)) || + (ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported && (ProcTraceData->ProcTraceOutputScheme == RtitOutputSchemeSingleRange))) { return TRUE; } @@ -291,7 +290,7 @@ ProcTraceInitialize ( // Single Range output scheme // if (ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported && - (ProcTraceData->ProcTraceOutputScheme == OutputSchemeSingleRange)) { + (ProcTraceData->ProcTraceOutputScheme == RtitOutputSchemeSingleRange)) { if (FirstIn) { DEBUG ((DEBUG_INFO, "ProcTrace: Enabling Single Range Output scheme \n")); } @@ -337,7 +336,7 @@ ProcTraceInitialize ( // ToPA(Table of physical address) scheme // if (ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported && - (ProcTraceData->ProcTraceOutputScheme == OutputSchemeToPA)) { + (ProcTraceData->ProcTraceOutputScheme == RtitOutputSchemeToPA)) { // // Create ToPA structure aligned at 4KB for each logical thread // with at least 2 entries by 8 bytes size each. The first entry -- 2.7.0.windows.1