From: Star Zeng <star.zeng@intel.com>
To: edk2-devel@lists.01.org
Cc: Star Zeng <star.zeng@intel.com>, Ruiyu Ni <ruiyu.ni@intel.com>,
Jiewen Yao <jiewen.yao@intel.com>
Subject: [PATCH] MdeModulePkg XhciDxe: Fix Map and Unmap inconsistency
Date: Thu, 24 Aug 2017 17:47:28 +0800 [thread overview]
Message-ID: <1503568048-157864-1-git-send-email-star.zeng@intel.com> (raw)
We found there are loops of *2* Maps and only *1* Unmap and
the DMA buffer address is decreasing.
It is caused by the below code flow.
XhcAsyncInterruptTransfer ->
XhcCreateUrb ->
XhcCreateTransferTrb ->
Map Urb->DataMap (1)
Timer: loops of *2* Maps and only *1* Unmap
XhcMonitorAsyncRequests ->
XhcFlushAsyncIntMap ->
Unmap and Map Urb->DataMap (2)
XhcUpdateAsyncRequest ->
XhcCreateTransferTrb ->
Map Urb->DataMap (3)
This patch is to eliminate (3).
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
---
MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
index 6013d7620fe5..21fdcf130a50 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
@@ -259,8 +259,11 @@ XhcCreateTransferTrb (
} else {
EPType = (UINT8) ((DEVICE_CONTEXT_64 *)OutputContext)->EP[Dci-1].EPType;
}
-
- if (Urb->Data != NULL) {
+
+ //
+ // No need to remap.
+ //
+ if ((Urb->Data != NULL) && (Urb->DataMap == NULL)) {
if (((UINT8) (Urb->Ep.Direction)) == EfiUsbDataIn) {
MapOp = EfiPciIoOperationBusMasterWrite;
} else {
--
2.7.0.windows.1
next reply other threads:[~2017-08-24 9:45 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-24 9:47 Star Zeng [this message]
2017-08-25 2:02 ` [PATCH] MdeModulePkg XhciDxe: Fix Map and Unmap inconsistency Ni, Ruiyu
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