From: Marcin Wojtas <mw@semihalf.com>
To: edk2-devel@lists.01.org
Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org,
nadavh@marvell.com, neta@marvell.com, kostap@marvell.com,
jinghua@marvell.com, agraf@suse.de, mw@semihalf.com,
jsd@semihalf.com, Joe Zhou <shjzhou@marvell.com>
Subject: [platforms: PATCH v2 4/7] Drivers/Net/Pp2Dxe: Increase amount of ingress resources
Date: Fri, 1 Sep 2017 13:17:56 +0200 [thread overview]
Message-ID: <1504264679-13613-5-git-send-email-mw@semihalf.com> (raw)
In-Reply-To: <1504264679-13613-1-git-send-email-mw@semihalf.com>
From: Joe Zhou <shjzhou@marvell.com>
Increase Rx ring and BM pool size for each port, which is
helpful when dealing with more intense incoming network
traffic.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Joe Zhou <shjzhou@marvell.com
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2LibHw.h | 2 +-
Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2LibHw.h b/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2LibHw.h
index 52509b0..0ebf936 100644
--- a/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2LibHw.h
+++ b/Platform/Marvell/Drivers/Net/Pp2Dxe/Mvpp2LibHw.h
@@ -965,7 +965,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define MVPP2_RXQ_TOTAL_NUM (MVPP2_MAX_PORTS * MVPP2_MAX_RXQ)
/* Max number of Rx descriptors */
-#define MVPP2_MAX_RXD 32
+#define MVPP2_MAX_RXD 64
/* Max number of Tx descriptors */
#define MVPP2_MAX_TXD 32
diff --git a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h
index b85cff7..9e71ec9 100644
--- a/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h
+++ b/Platform/Marvell/Drivers/Net/Pp2Dxe/Pp2Dxe.h
@@ -138,7 +138,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define MVPP2_BM_SWF_LONG_POOL(Port) ((Port > 2) ? 2 : Port)
#define MVPP2_BM_SWF_SHORT_POOL 3
#define MVPP2_BM_POOL 0
-#define MVPP2_BM_SIZE 32
+#define MVPP2_BM_SIZE 64
/*
* BM short pool packet Size
--
1.8.3.1
next prev parent reply other threads:[~2017-09-01 11:11 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-01 11:17 [platforms: PATCH v2 0/7] Armada 70x0/80x0 network improvements Marcin Wojtas
2017-09-01 11:17 ` [platforms: PATCH v2 1/7] Drivers/Net/Pp2Dxe: Move registers' description to macros Marcin Wojtas
2017-09-01 11:17 ` [platforms: PATCH v2 2/7] Drivers/Net/Pp2Dxe: Add SFI support Marcin Wojtas
2017-09-01 11:17 ` [platforms: PATCH v2 3/7] Drivers/Net/Pp2Dxe: Support multiple ethernet ports simultaneously Marcin Wojtas
2017-09-01 11:17 ` Marcin Wojtas [this message]
2017-09-01 11:17 ` [platforms: PATCH v2 5/7] Platforms/Marvell: Update ethernet ports types on A70x0 DB Marcin Wojtas
2017-09-01 11:17 ` [platforms: PATCH v2 6/7] Drivers/Net/Pp2Dxe: Move devices description to MvHwDescLib Marcin Wojtas
2017-09-01 11:17 ` [platforms: PATCH v2 7/7] Drivers/Net/Pp2Dxe: Enable using ports from different controllers Marcin Wojtas
2017-09-01 12:07 ` [platforms: PATCH v2 0/7] Armada 70x0/80x0 network improvements Ard Biesheuvel
2017-09-01 12:41 ` Marcin Wojtas
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