From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 089EE21EA35A5 for ; Mon, 4 Sep 2017 20:26:52 -0700 (PDT) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP; 04 Sep 2017 20:29:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,477,1498546800"; d="scan'208";a="147473575" Received: from jyao1-mobl.ccr.corp.intel.com ([10.239.196.73]) by fmsmga005.fm.intel.com with ESMTP; 04 Sep 2017 20:29:39 -0700 From: Jiewen Yao To: edk2-devel@lists.01.org Cc: Star Zeng Date: Tue, 5 Sep 2017 11:29:32 +0800 Message-Id: <1504582173-9088-2-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1504582173-9088-1-git-send-email-jiewen.yao@intel.com> References: <1504582173-9088-1-git-send-email-jiewen.yao@intel.com> Subject: [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 Sep 2017 03:26:52 -0000 Remove zero address check in IoMmuMap. The reason is that a CSM legacy driver may use legacy memory for DMA. As such, the legacyBios need allow below 1M to the legacy device. This patch also fixed some typo. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao --- IntelSiliconPkg/IntelVTdDxe/BmDma.c | 8 ++++---- IntelSiliconPkg/IntelVTdDxe/TranslationTable.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/IntelSiliconPkg/IntelVTdDxe/BmDma.c b/IntelSiliconPkg/IntelVTdDxe/BmDma.c index 5dcee00..7a5f361 100644 --- a/IntelSiliconPkg/IntelVTdDxe/BmDma.c +++ b/IntelSiliconPkg/IntelVTdDxe/BmDma.c @@ -77,14 +77,14 @@ IoMmuMap ( EFI_PHYSICAL_ADDRESS DmaMemoryTop; BOOLEAN NeedRemap; - DEBUG ((DEBUG_VERBOSE, "IoMmuMap: ==> 0x%08x - 0x%08x (%x)\n", HostAddress, NumberOfBytes, Operation)); - - if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == NULL || + if (NumberOfBytes == NULL || DeviceAddress == NULL || Mapping == NULL) { DEBUG ((DEBUG_ERROR, "IoMmuMap: %r\n", EFI_INVALID_PARAMETER)); return EFI_INVALID_PARAMETER; } + DEBUG ((DEBUG_VERBOSE, "IoMmuMap: ==> 0x%08x - 0x%08x (%x)\n", HostAddress, *NumberOfBytes, Operation)); + // // Make sure that Operation is valid // @@ -135,7 +135,7 @@ IoMmuMap ( if (NeedRemap) { // // Common Buffer operations can not be remapped. If the common buffer - // if above 4GB, then it is not possible to generate a mapping, so return + // is above 4GB, then it is not possible to generate a mapping, so return // an error. // DEBUG ((DEBUG_ERROR, "IoMmuMap: %r\n", EFI_UNSUPPORTED)); diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c index cd3111c..ccecc95 100644 --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c @@ -891,7 +891,7 @@ SetAccessAttribute ( SecondLevelPagingEntry = NULL; - DEBUG ((DEBUG_INFO,"SetAccessAttribute (S%04x B%02x D%02x F%02x) (0x%016lx - 0x%08x, %x)\n", Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function, BaseAddress, (UINTN)Length, IoMmuAccess)); + DEBUG ((DEBUG_VERBOSE,"SetAccessAttribute (S%04x B%02x D%02x F%02x) (0x%016lx - 0x%08x, %x)\n", Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function, BaseAddress, (UINTN)Length, IoMmuAccess)); VtdIndex = FindVtdIndexByPciDevice (Segment, SourceId, &ExtContextEntry, &ContextEntry); if (VtdIndex == (UINTN)-1) { -- 2.7.4.windows.1