From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B85B220958BD7 for ; Tue, 5 Sep 2017 23:37:10 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2017 23:40:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,483,1498546800"; d="scan'208";a="1215292579" Received: from jyao1-mobl.ccr.corp.intel.com ([10.239.196.53]) by fmsmga002.fm.intel.com with ESMTP; 05 Sep 2017 23:39:59 -0700 From: Jiewen Yao To: edk2-devel@lists.01.org Cc: Star Zeng Date: Wed, 6 Sep 2017 14:39:42 +0800 Message-Id: <1504679983-15536-2-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1504679983-15536-1-git-send-email-jiewen.yao@intel.com> References: <1504679983-15536-1-git-send-email-jiewen.yao@intel.com> Subject: [PATCH 1/2] IntelSiliconPkg/dec: Add VTd policy PCD X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 06 Sep 2017 06:37:10 -0000 BIT0: This is to control if a platform wants to enable VTd based protection during boot. BIT1: This is to control if a platform wants to keep VTd enabled at ExitBootService. The default configuration is BIT0:1, BIT1:0. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao --- IntelSiliconPkg/IntelSiliconPkg.dec | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/IntelSiliconPkg/IntelSiliconPkg.dec b/IntelSiliconPkg/IntelSiliconPkg.dec index 663a232..2fc6379 100644 --- a/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/IntelSiliconPkg/IntelSiliconPkg.dec @@ -44,3 +44,9 @@ # { 0x56752da9, 0xde6b, 0x4895, 0x88, 0x19, 0x19, 0x45, 0xb6, 0xb7, 0x6c, 0x22 } gIntelSiliconPkgTokenSpaceGuid.PcdIntelGraphicsVbtFileGuid|{ 0xa9, 0x2d, 0x75, 0x56, 0x6b, 0xde, 0x95, 0x48, 0x88, 0x19, 0x19, 0x45, 0xb6, 0xb7, 0x6c, 0x22 }|VOID*|0x00000001 + ## The mask is used to control VTd behavior.

+ # BIT0: Enable IOMMU during boot. + # BIT1: Enable IOMMU on exit boot service. + # @Prompt The policy for VTd driver behavior. + gIntelSiliconPkgTokenSpaceGuid.PcdVTdPolicyPropertyMask|1|UINT8|0x00000002 + -- 2.7.4.windows.1