From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3C2CB21E8799B for ; Sat, 16 Sep 2017 23:03:50 -0700 (PDT) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Sep 2017 23:06:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,406,1500966000"; d="scan'208";a="152200622" Received: from aseyoum-mobl1.amr.corp.intel.com (HELO jyao1-MOBL.ccr.corp.intel.com) ([10.254.211.37]) by fmsmga005.fm.intel.com with ESMTP; 16 Sep 2017 23:06:51 -0700 From: Jiewen Yao To: edk2-devel@lists.01.org Cc: Star Zeng Date: Sun, 17 Sep 2017 14:06:45 +0800 Message-Id: <1505628407-7368-2-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1505628407-7368-1-git-send-email-jiewen.yao@intel.com> References: <1505628407-7368-1-git-send-email-jiewen.yao@intel.com> Subject: [PATCH 1/3] IntelSiliconPkg/VTdInfoPpi: Let it follow DMAR table. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 17 Sep 2017 06:03:50 -0000 We notice that there is real usage in PEI to show the graphic output. As such we need report RMRR table in PEI to let VTdPmrPei driver skip the IGD UMA region. Now the VTD_INFO PPI uses the same DMAR data structure. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao --- IntelSiliconPkg/Include/Ppi/VtdInfo.h | 26 +++++++++++--------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/IntelSiliconPkg/Include/Ppi/VtdInfo.h b/IntelSiliconPkg/Include/Ppi/VtdInfo.h index e8be63f..a0a6f9c 100644 --- a/IntelSiliconPkg/Include/Ppi/VtdInfo.h +++ b/IntelSiliconPkg/Include/Ppi/VtdInfo.h @@ -17,22 +17,26 @@ #ifndef __VTD_INFO_PPI_H__ #define __VTD_INFO_PPI_H__ +#include +#include + #define EDKII_VTD_INFO_PPI_GUID \ { \ 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } \ } -typedef struct _EDKII_VTD_INFO_PPI EDKII_VTD_INFO_PPI; - -#define EDKII_VTD_INFO_PPI_REVISION 0x00010000 - -struct _EDKII_VTD_INFO_PPI { - UINT64 Revision; - UINT8 HostAddressWidth; - UINT8 Reserved[3]; - UINT32 VTdEngineCount; - UINT64 VTdEngineAddress[1]; -}; +// +// VTD info PPI just use same data structure as DMAR table. +// +// The reported information must include what is needed in PEI phase, e.g. +// the VTd engine (such as DRHD) +// the reserved DMA address in PEI for eary graphic (such as RMRR for graphic UMA) +// +// The reported information can be and might be a subset of full DMAR table, e.g. +// if some data is not avaiable (such as ANDD), +// if some data is not needed (such as RMRR for legacy USB). +// +typedef EFI_ACPI_DMAR_HEADER EDKII_VTD_INFO_PPI; extern EFI_GUID gEdkiiVTdInfoPpiGuid; -- 2.7.4.windows.1