* [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix.
@ 2017-09-21 10:59 Heyi Guo
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 1/7] Hisilicon/D03/Net: Update Snp driver Heyi Guo
` (19 more replies)
0 siblings, 20 replies; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: rp-1710-platforms-v3 rp-1710-osi-v3
Note: If occurs BIOS boot hang up issue, please revert below commit to fix:
"2f03dc8"
Chenhui Sun (1):
Hisilicon/D03: Disable the function of PerfTuning
Heyi Guo (4):
Hisilicon/D05: Modify dsc and fdf file
Hisilicon/D03: Modify dsc and fdf file
Hisilicon: Fix the drivers use the same GUID issue
Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase
Ming Huang (4):
Hisilicon D03/D05: get firmware version from FIRMWARE_VER
D05/ACPI: Disable D05 SAS0 and SAS2
D05/ACPI: Modify I2C device
Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device.
huangming (2):
Hisilicon/D05/Pcie: fix bug of size definition
D05/PCIe: Modify PcieRegionBase of secondary chip
Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf | 2 +-
Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf | 2 +-
Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf | 2 +-
Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf | 2 +-
Platform/Hisilicon/D03/D03.dsc | 13 ++-
Platform/Hisilicon/D03/D03.fdf | 5 +-
Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf | 2 +-
Platform/Hisilicon/D05/D05.dsc | 83 +++++++++--------
Platform/Hisilicon/D05/D05.fdf | 4 +-
Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf | 2 +-
Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf | 2 +-
Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf | 2 +-
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c | 38 ++++----
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h | 7 ++
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 94 +++++++++++++++++++-
Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf | 2 +-
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf | 2 +-
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl | 20 +----
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 8 +-
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 10 +++
Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf | 2 +-
Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf | 2 +-
Silicon/Hisilicon/Library/I2CLib/I2CLib.inf | 2 +-
Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf | 2 +-
24 files changed, 205 insertions(+), 105 deletions(-)
--
1.9.1
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH edk2-non-osi v3 1/7] Hisilicon/D03/Net: Update Snp driver
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 12:51 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 01/11] Hisilicon/D05: Modify dsc and fdf file Heyi Guo
` (18 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
1. Replace SnpPV660Dxe with SnpPV600Dxe;
2. Add SnpPlatform:
Install protocol to enable nic port which are using.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi | Bin 0 -> 26688 bytes
Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf | 24 +++++++++++++++++
Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi | Bin 56832 -> 0 bytes
Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf | 27 --------------------
Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi | Bin 0 -> 3040 bytes
Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf | 24 +++++++++++++++++
6 files changed, 48 insertions(+), 27 deletions(-)
diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi
new file mode 100644
index 0000000..8ce6a6d
Binary files /dev/null and b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
new file mode 100644
index 0000000..cd7c724
--- /dev/null
+++ b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
@@ -0,0 +1,24 @@
+#/** @file
+#
+# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = SnpPV600Dxe
+ FILE_GUID = 3247F15F-3612-4803-BD4E-4104D7EF944A
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+[Binaries]
+ PE32|SnpPV600Dxe.efi|*
diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi
deleted file mode 100644
index eb69403..0000000
Binary files a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi and /dev/null differ
diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
deleted file mode 100644
index 204ef17..0000000
--- a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
+++ /dev/null
@@ -1,27 +0,0 @@
-#/** @file
-#
-# Copyright (c) 2016, Hisilicon Limited. All rights reserved.
-# Copyright (c) 2016-2017, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = SnpPV600Dxe
- FILE_GUID = 92D37768-571C-48d9-BEF5-9744AE2FDAF4
- MODULE_TYPE = UEFI_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = InitializeSnpPV600Driver
- UNLOAD_IMAGE = SnpPV600Unload
-
-[Binaries]
- PE32|SnpPV600Dxe.efi|*
diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi
new file mode 100644
index 0000000..5e7d8bd
Binary files /dev/null and b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
new file mode 100644
index 0000000..fd53a79
--- /dev/null
+++ b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
@@ -0,0 +1,24 @@
+#/** @file
+#
+# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = SnpPlatform
+ FILE_GUID = 102D8FC9-20A4-42EB-AC14-1C98BA5B17A8
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+[Binaries]
+ PE32|SnpPlatform.efi|*
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 01/11] Hisilicon/D05: Modify dsc and fdf file
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 1/7] Hisilicon/D03/Net: Update Snp driver Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:01 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 02/11] Hisilicon/D03: " Heyi Guo
` (17 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
1. Add Drivers/SasPlatform;
2. Add Drivers/Net/SnpPlatform;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D05/D05.dsc | 5 -----
Platform/Hisilicon/D05/D05.fdf | 4 +++-
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 3cdb1b1..7cd5758 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -538,11 +538,6 @@
Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
- #
- #network
- #
- Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
-
MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index b6d0e42..a5e6546 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -247,7 +247,8 @@ READ_LOCK_STATUS = TRUE
#Network
#
- INF Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
+ INF Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
+ INF Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
@@ -292,6 +293,7 @@ READ_LOCK_STATUS = TRUE
#
INF Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+ INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
#
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 02/11] Hisilicon/D03: Modify dsc and fdf file
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 1/7] Hisilicon/D03/Net: Update Snp driver Heyi Guo
2017-09-21 10:59 ` [PATCH edk2-platforms v3 01/11] Hisilicon/D05: Modify dsc and fdf file Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:02 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 2/7] Hisilicon/D03/Sas: Add SasPlatform Heyi Guo
` (16 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
1. Add Drivers/SasPlatform;
2. Add Drivers/Net/SnpPlatform;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D03/D03.dsc | 5 -----
Platform/Hisilicon/D03/D03.fdf | 5 ++++-
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index afea162..7e25ffb 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -418,11 +418,6 @@
Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.inf
- #
- #network
- #
- Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
-
MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index b62b908..b53bdca 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -242,7 +242,8 @@ READ_LOCK_STATUS = TRUE
#Network
#
- INF Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
+ INF Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
+ INF Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
@@ -271,6 +272,7 @@ READ_LOCK_STATUS = TRUE
#
INF Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf
+ INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
#
@@ -278,6 +280,7 @@ READ_LOCK_STATUS = TRUE
#
INF ShellPkg/Application/Shell/Shell.inf
+
#
# Bds
#
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-non-osi v3 2/7] Hisilicon/D03/Sas: Add SasPlatform
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (2 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 02/11] Hisilicon/D03: " Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 12:49 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 3/7] Hisilicon/D03: Update binary file Heyi Guo
` (15 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
Install protocol to enable sas port which is using and
transmit base address info of sas port to SasDriverDxe.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi | Bin 0 -> 3040 bytes
Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf | 24 ++++++++++++++++++++
2 files changed, 24 insertions(+)
diff --git a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi
new file mode 100644
index 0000000..4255641
Binary files /dev/null and b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
new file mode 100644
index 0000000..636be19
--- /dev/null
+++ b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
@@ -0,0 +1,24 @@
+#/** @file
+#
+# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = SasPlatform
+ FILE_GUID = 102D8FC9-20a4-42EB-aC14-1C98BA5b26A4
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+[Binaries]
+ PE32|SasPlatform.efi|*
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-non-osi v3 3/7] Hisilicon/D03: Update binary file
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (3 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 2/7] Hisilicon/D03/Sas: Add SasPlatform Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 12:54 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 03/11] Hisilicon: Fix the drivers use the same GUID issue Heyi Guo
` (14 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
Update binary file for edk2 upgrade.
1. Replace UncachedMemoryAllocationLib with DmaLib;
2. Remove ArmCpuLib dependenc;
3. Remove ConvertToPhysicalAddress;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi | Bin 21696 -> 4768 bytes
Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi | Bin 22208 -> 4672 bytes
Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi | Bin 25440 -> 6784 bytes
Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi | Bin 23712 -> 4896 bytes
Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi | Bin 18080 -> 2304 bytes
Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi | Bin 48352 -> 21664 bytes
Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi | Bin 22112 -> 3712 bytes
Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi | Bin 262144 -> 262144 bytes
Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi | Bin 208288 -> 98144 bytes
Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi | Bin 36480 -> 17728 bytes
Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi | Bin 21408 -> 4000 bytes
Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib | Bin 19486 -> 20550 bytes
Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi | Bin 161280 -> 90272 bytes
Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv | Bin 262144 -> 262144 bytes
Platform/Hisilicon/D03/bl1.bin | Bin 14336 -> 14336 bytes
Platform/Hisilicon/D03/fip.bin | Bin 45601 -> 62513 bytes
Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib | Bin 603524 -> 587188 bytes
Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib | Bin 247176 -> 210280 bytes
Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib | Bin 13998 -> 13958 bytes
Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib | Bin 305230 -> 297590 bytes
Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib | Bin 17022 -> 16942 bytes
21 files changed, 0 insertions(+), 0 deletions(-)
diff --git a/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi b/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi
index 269243a..12640f2 100644
Binary files a/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi and b/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi b/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi
index c197895..d2565c8 100644
Binary files a/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi and b/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi b/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi
index 6201971..0d8ff52 100644
Binary files a/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi and b/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi b/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi
index 7409fcb..b85c19b 100644
Binary files a/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi and b/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi b/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi
index a9238b1..89c4b5b 100644
Binary files a/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi and b/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi b/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi
index 0a0d9d5..e1970fd 100644
Binary files a/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi and b/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi b/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi
index 12b2af7..0572a71 100644
Binary files a/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi and b/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi b/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi
index b8d9be3..28a4104 100644
Binary files a/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi and b/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi b/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi
index e135930..c9b2ad6 100644
Binary files a/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi and b/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi b/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi
index 30a0f77..16c91e2 100644
Binary files a/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi and b/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi differ
diff --git a/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi b/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi
index 39b8f58..2b6e4c1 100644
Binary files a/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi and b/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi differ
diff --git a/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib b/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib
index fe23d93..ffe2a13 100644
Binary files a/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib and b/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib differ
diff --git a/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi b/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi
index 1fdea0c..354abcc 100644
Binary files a/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi and b/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi differ
diff --git a/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv b/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv
index 1830a6a..9c781c6 100644
Binary files a/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv and b/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv differ
diff --git a/Platform/Hisilicon/D03/bl1.bin b/Platform/Hisilicon/D03/bl1.bin
index 7bf0698..cdaa743 100644
Binary files a/Platform/Hisilicon/D03/bl1.bin and b/Platform/Hisilicon/D03/bl1.bin differ
diff --git a/Platform/Hisilicon/D03/fip.bin b/Platform/Hisilicon/D03/fip.bin
index 913d40d..ae4ed1a 100644
Binary files a/Platform/Hisilicon/D03/fip.bin and b/Platform/Hisilicon/D03/fip.bin differ
diff --git a/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib b/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib
index c55d678..e7c5f9f 100644
Binary files a/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib and b/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib differ
diff --git a/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib b/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib
index 1b02db1..5ad2c8f 100644
Binary files a/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib and b/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib differ
diff --git a/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib b/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib
index f74d98d..e76c741 100644
Binary files a/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib and b/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib differ
diff --git a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
index ca78ae6..68be770 100644
Binary files a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib and b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib differ
diff --git a/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib b/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib
index 6f88fc1..d6ce068 100644
Binary files a/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib and b/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib differ
--
1.9.1
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 03/11] Hisilicon: Fix the drivers use the same GUID issue
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (4 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 3/7] Hisilicon/D03: Update binary file Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 10:59 ` [PATCH edk2-platforms v3 04/11] Hisilicon D03/D05: get firmware version from FIRMWARE_VER Heyi Guo
` (13 subsequent siblings)
19 siblings, 0 replies; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
The drivers build from separate sources, their GUID should
be different.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf | 2 +-
Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf | 2 +-
Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf | 2 +-
Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf | 2 +-
Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf | 2 +-
Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf | 2 +-
Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf | 2 +-
Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf | 2 +-
Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf | 2 +-
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf | 2 +-
Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf | 2 +-
Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf | 2 +-
Silicon/Hisilicon/Library/I2CLib/I2CLib.inf | 2 +-
Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf | 2 +-
14 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf b/Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf
index 5506a58..3f3f81c 100644
--- a/Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf
+++ b/Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = EarlyConfigPeim
- FILE_GUID = A181AD33-E64A-4084-A54A-A69DF1FB0ABF
+ FILE_GUID = ECAE8400-9CCE-4BA5-9B44-74CAABE4DA79
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
ENTRY_POINT = EarlyConfigEntry
diff --git a/Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf b/Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf
index c952414..e881899 100644
--- a/Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf
+++ b/Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = FdtUpdateLib
- FILE_GUID = 02CF1727-E697-47fc-8CC2-5DCB81B26DD9
+ FILE_GUID = 0F9ADE24-46B4-4506-8802-60C519B56133
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = FdtUpdateLib
diff --git a/Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf b/Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf
index 4d2dbba..ab3b62b 100644
--- a/Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf
+++ b/Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PlatformPciLib
- FILE_GUID = 61b7276a-fc67-11e5-82fd-47ea9896dd5d
+ FILE_GUID = 128F1E1E-A921-4277-A796-A4A47B96B7D2
MODULE_TYPE = BASE
VERSION_STRING = 1.0
diff --git a/Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf b/Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf
index df5adf1..4c5955f 100644
--- a/Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf
+++ b/Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = OemNicConfig
- FILE_GUID = 3A23A929-1F38-4d04-8A01-38AD993EB2CE
+ FILE_GUID = BF422A22-CA90-4C34-95B9-3D147AF09E70
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = OemNicConfigEntry
diff --git a/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf b/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf
index 9569b91..2d9d53d 100755
--- a/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf
+++ b/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = FdtUpdateLib
- FILE_GUID = 02CF1727-E697-47fc-8CC2-5DCB81B26DD9
+ FILE_GUID = B80B9FF1-FAB9-4BE5-B602-5ABAA6B7A3D4
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = FdtUpdateLib
diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
index 9d8ea7e..0f6b68d 100644
--- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
+++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = EarlyConfigPeimD05
- FILE_GUID = A181AD33-E64A-4084-A54A-A69DF1FB0ABF
+ FILE_GUID = 13525B94-06F0-41AC-8CAF-724B149FD259
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
ENTRY_POINT = EarlyConfigEntry
diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
index 4fe7ac6..bf44ff7 100644
--- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
+++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = OemMiscLibHi1616Evb
- FILE_GUID = B9CE7465-21A2-4ecd-B347-BBDDBD098CEE
+ FILE_GUID = 751C7627-D5F8-499C-AEEEE-C87858759612
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = OemMiscLib
diff --git a/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf b/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
index cd64193..21bb33a 100644
--- a/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
+++ b/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = PlatformPciLib
- FILE_GUID = 61b7276a-fc67-11e5-82fd-47ea9896dd5d
+ FILE_GUID = B94B8A3A-AD7D-4F26-B140-1E699682176B
MODULE_TYPE = BASE
VERSION_STRING = 1.0
diff --git a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf
index 174e967..89447cc 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf
+++ b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = IoInitDxe
- FILE_GUID = e99c606a-5626-11e5-b09e-bb93f4e4c400
+ FILE_GUID = 28C9B7DE-AAD6-4E9B-811B-050AD3DAB9A3
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
index 686d041..ee9dbed 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
+++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PcieInitDxe
- FILE_GUID = 2D53A704-A544-4A82-83DF-FFECF4B4AA97
+ FILE_GUID = 8EB6E216-BA47-4B30-B68A-2B371F7232A6
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = PcieInitEntry
diff --git a/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf b/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf
index 6faefb1..17d59ee 100644
--- a/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf
+++ b/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf
@@ -20,7 +20,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = DS3231RealTimeClockLib
- FILE_GUID = 470DFB96-E205-4515-A75E-2E60F853E79D
+ FILE_GUID = 5FD8127D-11E1-488F-8CF1-A143157D6BF0
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = RealTimeClockLib
diff --git a/Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf b/Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf
index d7957ea..df65d4b 100644
--- a/Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf
+++ b/Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = Dw8250SerialPortLib
- FILE_GUID = 16D53E86-7EA6-47bd-861F-511ED9B8ABE0
+ FILE_GUID = 78337705-D2A8-4EA7-9C18-27FC4A8A2C6E
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = SerialPortLib
diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.inf b/Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
index 7f95124..9bca88f 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = I2CLib
- FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2
+ FILE_GUID = 162F2DF1-DBF8-41E6-9792-92A96ADEAB40
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = I2CLib
diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf b/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf
index 4990072..1bb4f5c 100644
--- a/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf
+++ b/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = I2CLibRuntime
- FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2
+ FILE_GUID = 2E602B32-9203-44A4-BF28-1FF98BD89523
MODULE_TYPE = DXE_RUNTIME_DRIVER
VERSION_STRING = 1.0
LIBRARY_CLASS = I2CLib
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 04/11] Hisilicon D03/D05: get firmware version from FIRMWARE_VER
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (5 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 03/11] Hisilicon: Fix the drivers use the same GUID issue Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:03 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 4/7] Hisilicon/D05/Net: Update Snp driver Heyi Guo
` (12 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Ming Huang
From: Ming Huang <waip23@foxmail.com>
Value of the environment variable FIRMWARE_VER is GIT SHA by default,
and you can add the environment variable FIRMWARE_VER to EXTRA_OPTIONS
at build time to specify something else, eg. "16.12-<commit id>".
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D03/D03.dsc | 6 +++++-
Platform/Hisilicon/D05/D05.dsc | 6 +++++-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 7e25ffb..fca6781 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -170,7 +170,11 @@
gHisiTokenSpaceGuid.PcdAlgSmmuBaseAddress|0xd0040000
- gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D03 UEFI 16.12 Release"
+ !ifdef $(FIRMWARE_VER)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D03 UEFI 17.10 Release"
+ !endif
gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 7cd5758..aa61c0e 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -188,7 +188,11 @@
gHisiTokenSpaceGuid.PcdIsMPBoot|1
gHisiTokenSpaceGuid.PcdSocketMask|0x3
- gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D05 UEFI 16.12 Release"
+ !ifdef $(FIRMWARE_VER)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D05 UEFI 17.10 Release"
+ !endif
gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-non-osi v3 4/7] Hisilicon/D05/Net: Update Snp driver
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (6 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 04/11] Hisilicon D03/D05: get firmware version from FIRMWARE_VER Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 12:56 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 5/7] Hisilicon/D05/Sas: Add SasPlatform Heyi Guo
` (11 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
1. Replace SnpPV660Dxe with SnpPV600Dxe;
2. Add SnpPlatform:
Install protocol to enable nic port which are using.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi | Bin 0 -> 28544 bytes
Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf | 24 +++++++++++++++++
Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi | Bin 56512 -> 0 bytes
Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf | 27 --------------------
Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi | Bin 0 -> 3392 bytes
Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf | 24 +++++++++++++++++
6 files changed, 48 insertions(+), 27 deletions(-)
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi
new file mode 100644
index 0000000..bc7942a
Binary files /dev/null and b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
new file mode 100644
index 0000000..cd7c724
--- /dev/null
+++ b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
@@ -0,0 +1,24 @@
+#/** @file
+#
+# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = SnpPV600Dxe
+ FILE_GUID = 3247F15F-3612-4803-BD4E-4104D7EF944A
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+[Binaries]
+ PE32|SnpPV600Dxe.efi|*
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi
deleted file mode 100644
index c54538f..0000000
Binary files a/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi and /dev/null differ
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
deleted file mode 100644
index 98cc3b8..0000000
--- a/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
+++ /dev/null
@@ -1,27 +0,0 @@
-#/** @file
-#
-# Copyright (c) 2016, Hisilicon Limited. All rights reserved.
-# Copyright (c) 2016-2017, Linaro Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010019
- BASE_NAME = SnpPV600Dxe
- FILE_GUID = 85F85FDE-FDA1-465A-B22E-488F1A6F966C
- MODULE_TYPE = UEFI_DRIVER
- VERSION_STRING = 1.0
-
- ENTRY_POINT = InitializeSnpPV600Driver
- UNLOAD_IMAGE = SnpPV600Unload
-
-[Binaries]
- PE32|SnpPV600Dxe.efi|*
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi
new file mode 100644
index 0000000..42c26de
Binary files /dev/null and b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
new file mode 100644
index 0000000..fd53a79
--- /dev/null
+++ b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
@@ -0,0 +1,24 @@
+#/** @file
+#
+# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = SnpPlatform
+ FILE_GUID = 102D8FC9-20A4-42EB-AC14-1C98BA5B17A8
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+[Binaries]
+ PE32|SnpPlatform.efi|*
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-non-osi v3 5/7] Hisilicon/D05/Sas: Add SasPlatform
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (7 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 4/7] Hisilicon/D05/Net: Update Snp driver Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:00 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 05/11] Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase Heyi Guo
` (10 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
Install protocol to enable sas port which is using and
transmit base address info of sas port to SasDriverDxe.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi | Bin 0 -> 3424 bytes
Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf | 24 ++++++++++++++++++++
2 files changed, 24 insertions(+)
diff --git a/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi
new file mode 100644
index 0000000..d2685ab
Binary files /dev/null and b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
new file mode 100644
index 0000000..636be19
--- /dev/null
+++ b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
@@ -0,0 +1,24 @@
+#/** @file
+#
+# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = SasPlatform
+ FILE_GUID = 102D8FC9-20a4-42EB-aC14-1C98BA5b26A4
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+[Binaries]
+ PE32|SasPlatform.efi|*
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 05/11] Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (8 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 5/7] Hisilicon/D05/Sas: Add SasPlatform Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 12:57 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 06/11] Hisilicon/D05/Pcie: fix bug of size definition Heyi Guo
` (9 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
Io BAR should be based IoBase and Mem BAR should be based PciRegionBase.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c | 37 ++++++++++++--------
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 15 ++++++--
2 files changed, 35 insertions(+), 17 deletions(-)
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
index a970da6..e3d3988 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
@@ -1410,9 +1410,8 @@ SetResource(
Ptr->ResType = 1;
Ptr->GenFlag = 0;
Ptr->SpecificFlag = 0;
- /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
- Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
- (RootBridgeInstance->MemBase & 0xFFFFFFFF);
+ /* PCIE Device Iobar address should be based on IoBase */
+ Ptr->AddrRangeMin = RootBridgeInstance->IoBase;
Ptr->AddrRangeMax = 0;
Ptr->AddrTranslationOffset = \
(ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
@@ -1429,9 +1428,13 @@ SetResource(
Ptr->GenFlag = 0;
Ptr->SpecificFlag = 0;
Ptr->AddrSpaceGranularity = 32;
- /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
- Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
- (RootBridgeInstance->MemBase & 0xFFFFFFFF);
+ /* PCIE device Bar should be based on PciRegionBase */
+ if (RootBridgeInstance->PciRegionBase > MAX_UINT32) {
+ DEBUG((DEBUG_ERROR, "PCIE Res(TypeMem32) unsupported.\n"));
+ return EFI_UNSUPPORTED;
+ }
+ Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase +
+ RootBridgeInstance->PciRegionBase;
Ptr->AddrRangeMax = 0;
Ptr->AddrTranslationOffset = \
(ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
@@ -1448,9 +1451,13 @@ SetResource(
Ptr->GenFlag = 0;
Ptr->SpecificFlag = 6;
Ptr->AddrSpaceGranularity = 32;
- /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
- Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
- (RootBridgeInstance->MemBase & 0xFFFFFFFF);
+ /* PCIE device Bar should be based on PciRegionBase */
+ if (RootBridgeInstance->PciRegionBase > MAX_UINT32) {
+ DEBUG((DEBUG_ERROR, "PCIE Res(TypePMem32) unsupported.\n"));
+ return EFI_UNSUPPORTED;
+ }
+ Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase +
+ RootBridgeInstance->PciRegionBase;
Ptr->AddrRangeMax = 0;
Ptr->AddrTranslationOffset = \
(ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
@@ -1467,9 +1474,9 @@ SetResource(
Ptr->GenFlag = 0;
Ptr->SpecificFlag = 0;
Ptr->AddrSpaceGranularity = 64;
- /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
- Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
- (RootBridgeInstance->MemBase & 0xFFFFFFFFFFFFFFFF);
+ /* PCIE device Bar should be based on PciRegionBase */
+ Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase +
+ RootBridgeInstance->PciRegionBase;
Ptr->AddrRangeMax = 0;
Ptr->AddrTranslationOffset = \
(ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
@@ -1486,9 +1493,9 @@ SetResource(
Ptr->GenFlag = 0;
Ptr->SpecificFlag = 6;
Ptr->AddrSpaceGranularity = 64;
- /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
- Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
- (RootBridgeInstance->MemBase & 0xFFFFFFFFFFFFFFFF);
+ /* PCIE device Bar should be based on PciRegionBase */
+ Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase +
+ RootBridgeInstance->PciRegionBase;
Ptr->AddrRangeMax = 0;
Ptr->AddrTranslationOffset = \
(ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
index 03edcf1..10d766a 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -2301,8 +2301,19 @@ RootBridgeIoConfiguration (
PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);
for (Index = 0; Index < TypeMax; Index++) {
if (PrivateData->ResAllocNode[Index].Status == ResAllocated) {
- Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->ResAllocNode[Index].Base;
- Configuration.SpaceDesp[Index].AddrRangeMax = PrivateData->ResAllocNode[Index].Base + PrivateData->ResAllocNode[Index].Length - 1;
+ switch (Index) {
+ case TypeIo:
+ Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->IoBase;
+ break;
+ case TypeBus:
+ Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->ResAllocNode[Index].Base;
+ break;
+ default:
+ /* PCIE Device bar address should be base on PciRegionBase */
+ Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->ResAllocNode[Index].Base - PrivateData->MemBase +
+ PrivateData->PciRegionBase;
+ }
+ Configuration.SpaceDesp[Index].AddrRangeMax = Configuration.SpaceDesp[Index].AddrRangeMin + PrivateData->ResAllocNode[Index].Length - 1;
Configuration.SpaceDesp[Index].AddrLen = PrivateData->ResAllocNode[Index].Length;
}
}
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 06/11] Hisilicon/D05/Pcie: fix bug of size definition
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (9 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 05/11] Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:04 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 6/7] Hisilicon/D05: Update binary file Heyi Guo
` (8 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23
From: huangming <huangming23@huawei.com>
Fix bug of PcieRegion size definition and IO size definition.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D05/D05.dsc | 64 ++++++++++----------
1 file changed, 32 insertions(+), 32 deletions(-)
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index aa61c0e..01defe0 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -310,37 +310,37 @@
gHisiTokenSpaceGuid.PciHb1Rb7Base|0x700a00b0000
gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionBaseAddress|0xa8400000
- gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionSize|0xbeffff
+ gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionSize|0xbf0000
gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionBaseAddress|0xa9400000
- gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionSize|0xbeffff
+ gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionSize|0xbf0000
gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionBaseAddress|0xa8800000
- gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionSize|0x77effff
+ gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionSize|0x77f0000
gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionBaseAddress|0xab400000
- gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionSize|0xbeffff
+ gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionSize|0xbf0000
gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionBaseAddress|0xa9000000
- gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionSize|0x2feffff
+ gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionSize|0x2ff0000
gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionBaseAddress|0xb0800000
- gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionSize|0x77effff
+ gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionSize|0x77f0000
gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionBaseAddress|0xac900000
- gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionSize|0x36effff
+ gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionSize|0x36f0000
gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionBaseAddress|0xb9800000
- gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionSize|0x67effff
+ gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionSize|0x67f0000
gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionBaseAddress|0x400a8400000
- gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbeffff
+ gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbf0000
gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionBaseAddress|0x400a9400000
- gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbeffff
+ gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbf0000
gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x20000000
- gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xcfffffff
+ gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xd0000000
gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionBaseAddress|0x400ab400000
- gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbeffff
+ gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbf0000
gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x30000000
- gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xbfffffff
+ gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xc0000000
gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionBaseAddress|0x40000000
- gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xafffffff
+ gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xb0000000
gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionBaseAddress|0x408aa400000
- gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionSize|0xbeffff
+ gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionSize|0xbf0000
gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionBaseAddress|0x408ab400000
- gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionSize|0xbeffff
+ gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionSize|0xbf0000
gHisiTokenSpaceGuid.PcdHb0Rb0CpuMemRegionBase|0xA8400000
gHisiTokenSpaceGuid.PcdHb0Rb1CpuMemRegionBase|0xA9400000
@@ -377,52 +377,52 @@
gHisiTokenSpaceGuid.PcdHb1Rb7CpuIoRegionBase|0x408abff0000
gHisiTokenSpaceGuid.PcdHb0Rb0IoBase|0
- gHisiTokenSpaceGuid.PcdHb0Rb0IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb0Rb0IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb0Rb1IoBase|0
- gHisiTokenSpaceGuid.PcdHb0Rb1IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb0Rb1IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb0Rb2IoBase|0
- gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb0Rb3IoBase|0
- gHisiTokenSpaceGuid.PcdHb0Rb3IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb0Rb3IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb0Rb4IoBase|0
- gHisiTokenSpaceGuid.PcdHb0Rb4IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb0Rb4IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb0Rb5IoBase|0
- gHisiTokenSpaceGuid.PcdHb0Rb5IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb0Rb5IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb0Rb6IoBase|0
- gHisiTokenSpaceGuid.PcdHb0Rb6IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb0Rb6IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb0Rb7IoBase|0
- gHisiTokenSpaceGuid.PcdHb0Rb7IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb0Rb7IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb1Rb0IoBase|0
- gHisiTokenSpaceGuid.PcdHb1Rb0IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb1Rb0IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb1Rb1IoBase|0
- gHisiTokenSpaceGuid.PcdHb1Rb1IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb1Rb1IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb1Rb2IoBase|0
- gHisiTokenSpaceGuid.PcdHb1Rb2IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb1Rb2IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb1Rb3IoBase|0
- gHisiTokenSpaceGuid.PcdHb1Rb3IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb1Rb3IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb1Rb4IoBase|0
- gHisiTokenSpaceGuid.PcdHb1Rb4IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb1Rb4IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb1Rb5IoBase|0
- gHisiTokenSpaceGuid.PcdHb1Rb5IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb1Rb5IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb1Rb6IoBase|0
- gHisiTokenSpaceGuid.PcdHb1Rb6IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb1Rb6IoSize|0x10000 #64K
gHisiTokenSpaceGuid.PcdHb1Rb7IoBase|0
- gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0xffff #64K
+ gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0x10000 #64K
gHisiTokenSpaceGuid.Pcdsoctype|0x1610
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-non-osi v3 6/7] Hisilicon/D05: Update binary file
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (10 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 06/11] Hisilicon/D05/Pcie: fix bug of size definition Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 12:59 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 07/11] D05/PCIe: Modify PcieRegionBase of secondary chip Heyi Guo
` (7 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
Fix bug 3061: D05(before EC) boot hangs at "Need Reset";
Update binary file for edk2 upgrade.
1. Replace UncachedMemoryAllocationLib with DmaLib;
2. Remove ArmCpuLib dependenc;
3. Remove ConvertToPhysicalAddress;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi | Bin 19552 -> 5024 bytes
Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi | Bin 25696 -> 7680 bytes
Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi | Bin 22528 -> 5344 bytes
Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi | Bin 23136 -> 5280 bytes
Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi | Bin 15968 -> 2592 bytes
Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi | Bin 48000 -> 23328 bytes
Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi | Bin 21536 -> 4032 bytes
Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi | Bin 262144 -> 262144 bytes
Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi | Bin 230912 -> 116288 bytes
Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi | Bin 35904 -> 18592 bytes
Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi | Bin 16576 -> 4288 bytes
Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib | Bin 42136 -> 52968 bytes
Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi | Bin 273312 -> 152576 bytes
Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv | Bin 262144 -> 262144 bytes
Platform/Hisilicon/D05/bl1.bin | Bin 12296 -> 14344 bytes
Platform/Hisilicon/D05/fip.bin | Bin 41493 -> 41493 bytes
Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib | Bin 707246 -> 726884 bytes
Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib | Bin 358602 -> 344310 bytes
18 files changed, 0 insertions(+), 0 deletions(-)
diff --git a/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi b/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi
index 6f117e2..a0fa8c8 100644
Binary files a/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi and b/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi
index 139658c..9b4e23e 100644
Binary files a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi and b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi
index c3d28ec..5bf6ded 100644
Binary files a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi and b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi b/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi
index 96d1680..3092139 100644
Binary files a/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi and b/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi b/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi
index 029ce97..ece5615 100644
Binary files a/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi and b/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi b/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi
index dcabce2..9e7dd0e 100644
Binary files a/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi and b/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi b/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi
index da85b0b..2be627f 100644
Binary files a/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi and b/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi b/Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi
index 02ea2b1..52d6107 100644
Binary files a/Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi and b/Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi b/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi
index a1b16d7..9a680c5 100644
Binary files a/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi and b/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi b/Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi
index d22bf64..b8de025 100644
Binary files a/Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi and b/Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi differ
diff --git a/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi b/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi
index 980be0a..80fe6fa 100644
Binary files a/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi and b/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi differ
diff --git a/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib b/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib
index e37546e..00954c7 100644
Binary files a/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib and b/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib differ
diff --git a/Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi b/Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi
index 5a93c4e..b94e0cb 100644
Binary files a/Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi and b/Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi differ
diff --git a/Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv b/Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv
index 16500b7..ab6ea83 100644
Binary files a/Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv and b/Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv differ
diff --git a/Platform/Hisilicon/D05/bl1.bin b/Platform/Hisilicon/D05/bl1.bin
index f207cd9..7341476 100644
Binary files a/Platform/Hisilicon/D05/bl1.bin and b/Platform/Hisilicon/D05/bl1.bin differ
diff --git a/Platform/Hisilicon/D05/fip.bin b/Platform/Hisilicon/D05/fip.bin
index 0952662..496a9b8 100644
Binary files a/Platform/Hisilicon/D05/fip.bin and b/Platform/Hisilicon/D05/fip.bin differ
diff --git a/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib b/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib
index 82abd5f..cdfaeb7 100644
Binary files a/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib and b/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib differ
diff --git a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
index a4fe13a..b3cc88e 100644
Binary files a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib and b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib differ
--
1.9.1
^ permalink raw reply [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 07/11] D05/PCIe: Modify PcieRegionBase of secondary chip
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (11 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 6/7] Hisilicon/D05: Update binary file Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:04 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 7/7] Hisilicon: Fix the drivers use the same GUID issue Heyi Guo
` (6 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23
From: huangming <huangming23@huawei.com>
On D05 PCIe now, 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses are
0x20000000 and 0x30000000 based. These addresses overlap with the DDR
memory range 0-1G. In this situation, on the inbound direction, our pcie
will drop the DDR address access that are located in the pci range window
and lead to a dataflow error.
Modify 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses to 0x40000000
and decrease PciRegion Size accordingly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Platform/Hisilicon/D05/D05.dsc | 12 ++++++------
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 8 ++++----
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 01defe0..64101a7 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -329,12 +329,12 @@
gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbf0000
gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionBaseAddress|0x400a9400000
gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbf0000
- gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x20000000
- gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xd0000000
+ gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x40000000
+ gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xb0000000
gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionBaseAddress|0x400ab400000
gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbf0000
- gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x30000000
- gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xc0000000
+ gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x40000000
+ gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xb0000000
gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionBaseAddress|0x40000000
gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xb0000000
gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionBaseAddress|0x408aa400000
@@ -352,9 +352,9 @@
gHisiTokenSpaceGuid.PcdHb0Rb7CpuMemRegionBase|0x8B9800000
gHisiTokenSpaceGuid.PcdHb1Rb0CpuMemRegionBase|0x400A8400000
gHisiTokenSpaceGuid.PcdHb1Rb1CpuMemRegionBase|0x400A9400000
- gHisiTokenSpaceGuid.PcdHb1Rb2CpuMemRegionBase|0x65020000000
+ gHisiTokenSpaceGuid.PcdHb1Rb2CpuMemRegionBase|0x65040000000
gHisiTokenSpaceGuid.PcdHb1Rb3CpuMemRegionBase|0x400AB400000
- gHisiTokenSpaceGuid.PcdHb1Rb4CpuMemRegionBase|0x75030000000
+ gHisiTokenSpaceGuid.PcdHb1Rb4CpuMemRegionBase|0x75040000000
gHisiTokenSpaceGuid.PcdHb1Rb5CpuMemRegionBase|0x79040000000
gHisiTokenSpaceGuid.PcdHb1Rb6CpuMemRegionBase|0x408AA400000
gHisiTokenSpaceGuid.PcdHb1Rb7CpuMemRegionBase|0x408AB400000
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
index 79267e5..55c7f50 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
@@ -646,10 +646,10 @@ Scope(_SB)
Cacheable,
ReadWrite,
0x0, // Granularity
- 0x20000000, // Min Base Address
+ 0x40000000, // Min Base Address
0xefffffff, // Max Base Address
0x65000000000, // Translate
- 0xd0000000 // Length
+ 0xb0000000 // Length
)
QWordIO (
ResourceProducer,
@@ -766,10 +766,10 @@ Scope(_SB)
Cacheable,
ReadWrite,
0x0, // Granularity
- 0x30000000, // Min Base Address
+ 0x40000000, // Min Base Address
0xefffffff, // Max Base Address
0x75000000000, // Translate
- 0xc0000000 // Length
+ 0xb0000000 // Length
)
QWordIO (
ResourceProducer,
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-non-osi v3 7/7] Hisilicon: Fix the drivers use the same GUID issue
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (12 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 07/11] D05/PCIe: Modify PcieRegionBase of secondary chip Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 10:59 ` [PATCH edk2-platforms v3 08/11] Hisilicon/D03: Disable the function of PerfTuning Heyi Guo
` (5 subsequent siblings)
19 siblings, 0 replies; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Heyi Guo
The drivers build from separate sources, their GUID should
be different.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
Platform/Hisilicon/D02/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf | 2 +-
Platform/Hisilicon/D02/Drivers/SFC/SfcDxeDriver.inf | 2 +-
Platform/Hisilicon/D02/MemoryInitPei/MemoryInitPeim.inf | 2 +-
Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf | 2 +-
Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf | 2 +-
Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.inf | 2 +-
Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf | 2 +-
Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf | 2 +-
Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf | 2 +-
Platform/Hisilicon/D05/Drivers/OhciDxe/OhciDxe.inf | 2 +-
Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf | 2 +-
Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf | 2 +-
Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf | 2 +-
Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf | 2 +-
Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.inf | 2 +-
Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf | 2 +-
Platform/Hisilicon/D05/MemoryInitPei/MemoryInitPeim.inf | 2 +-
Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.inf | 2 +-
Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf | 2 +-
Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf | 2 +-
Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.inf | 2 +-
Silicon/Hisilicon/Pv660/Library/PlatformSysCtrlLibPv660/PlatformSysCtrlLibPv660.inf | 2 +-
Silicon/Hisilicon/Pv660/Library/Pv660Serdes/Pv660SerdesLib.inf | 2 +-
23 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/Platform/Hisilicon/D02/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D02/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
index 8376bbd..8b9ee1d 100644
--- a/Platform/Hisilicon/D02/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
+++ b/Platform/Hisilicon/D02/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = SnpPV600Dxe
- FILE_GUID = 3246F154-3612-4803-BD4E-4104D7EF944A
+ FILE_GUID = 1AB373EB-2CD7-4D5C-9C39-D31845B67F5E
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
diff --git a/Platform/Hisilicon/D02/Drivers/SFC/SfcDxeDriver.inf b/Platform/Hisilicon/D02/Drivers/SFC/SfcDxeDriver.inf
index e10275a..02a4d7f 100644
--- a/Platform/Hisilicon/D02/Drivers/SFC/SfcDxeDriver.inf
+++ b/Platform/Hisilicon/D02/Drivers/SFC/SfcDxeDriver.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = SFCDriver
- FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2
+ FILE_GUID = 02C6BAAE-6E43-4910-8084-60D5045729A0
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = SFCInitialize
diff --git a/Platform/Hisilicon/D02/MemoryInitPei/MemoryInitPeim.inf b/Platform/Hisilicon/D02/MemoryInitPei/MemoryInitPeim.inf
index c221de9..0095c82 100644
--- a/Platform/Hisilicon/D02/MemoryInitPei/MemoryInitPeim.inf
+++ b/Platform/Hisilicon/D02/MemoryInitPei/MemoryInitPeim.inf
@@ -18,7 +18,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = MemoryInit
- FILE_GUID = c61ef796-b50d-4f98-9f78-4f6f79d800d5
+ FILE_GUID = A311058D-0993-4C05-A3EC-16CC0801C1A0
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
diff --git a/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf b/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf
index 20e2f05..1a2bd01 100644
--- a/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf
+++ b/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = GetInfoFromBmc
- FILE_GUID = 43B59C81-9C5F-4021-B0F2-947DB839B781
+ FILE_GUID = DFDF885A-623D-4D13-9EB6-8454BA30A7CD
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = GetBmcInfoDriverEntry
diff --git a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
index a614b68..e82e5ad 100644
--- a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
+++ b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = IpmiInterfaceDxe
- FILE_GUID = EF5483F8-68AD-4D71-9A23-674D2E9C013E
+ FILE_GUID = 89DCAC3C-D653-4FD7-82E7-9840ED7E0B1D
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
diff --git a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.inf b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.inf
index e55d3f7..ac9f467 100644
--- a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.inf
+++ b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = IpmiInterfacePei
- FILE_GUID = 269702AF-8004-4570-A08E-00762AE65D15
+ FILE_GUID = 0E169987-AC8F-4DF8-9A67-D2860C15699D
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
ENTRY_POINT = IpmiInterfacePeiEntry
diff --git a/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf b/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf
index 8075f40..8b94903 100644
--- a/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf
+++ b/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOpDxe.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = IpmiMiscOp
- FILE_GUID = EC68451C-6D10-4ba2-9862-D27D4D6090DB
+ FILE_GUID = 536C9EE4-3D34-4EB6-9195-7BEEDE4D4F9F
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = IpmiMiscOpEntry
diff --git a/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf b/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf
index c173587..510c59d 100644
--- a/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf
+++ b/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = IpmiWatchdogDxe
- FILE_GUID = 7C7ACA9F-DB25-43FB-A479-1B6E42F38792
+ FILE_GUID = 4C112583-9092-4712-BBBF-429B4B66220F
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = InitializeWatchdogDxeEntry
diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
index cd7c724..3a79208 100644
--- a/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
+++ b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = SnpPV600Dxe
- FILE_GUID = 3247F15F-3612-4803-BD4E-4104D7EF944A
+ FILE_GUID = 6BB8E531-2E49-43CC-AF7A-7CABDAEB7B7A
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
diff --git a/Platform/Hisilicon/D05/Drivers/OhciDxe/OhciDxe.inf b/Platform/Hisilicon/D05/Drivers/OhciDxe/OhciDxe.inf
index 80d9c49..d0a8d7b 100644
--- a/Platform/Hisilicon/D05/Drivers/OhciDxe/OhciDxe.inf
+++ b/Platform/Hisilicon/D05/Drivers/OhciDxe/OhciDxe.inf
@@ -17,7 +17,7 @@
[defines]
INF_VERSION = 0x00010019
BASE_NAME = NativeOhci
- FILE_GUID = 043D0B5E-DAC1-463a-85BA-2CEDC33A8C4F
+ FILE_GUID = 559F7D9C-34A8-4028-815C-D5A73EDEB60F
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
diff --git a/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf b/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
index ab2be5e..bcc05cb 100644
--- a/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
+++ b/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = ReportPciePlugDidVidToBmc
- FILE_GUID = 9BC4A5D1-5A46-4A6C-AF11-4875268179D3
+ FILE_GUID = 5C6B2DC9-D4F5-405A-94A4-4EA9E74A1800
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
diff --git a/Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf b/Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf
index 909462f..e14723c 100644
--- a/Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf
+++ b/Platform/Hisilicon/D05/Drivers/SFC/SfcDxeDriver.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = SFCDriver
- FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2
+ FILE_GUID = 209D1FBE-506F-40BB-9C67-4B6085F92010
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = SFCInitialize
diff --git a/Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf b/Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
index 539d612..3daf2bb 100644
--- a/Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
+++ b/Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = SasDriverDxe
- FILE_GUID = 49ea041e-6752-42ca-b0b1-7344fe234567
+ FILE_GUID = 6F39A263-C676-4FED-8609-33148079C721
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
diff --git a/Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf b/Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
index 0590919..5927561 100644
--- a/Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
+++ b/Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = SmiGraphicsOutput
- FILE_GUID = BFB7B510-B09B-11DB-96E3-005056C00008
+ FILE_GUID = 12584EAB-60CB-43B0-8806-1AE5BEDEEF02
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
diff --git a/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.inf b/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.inf
index 6b34037..01afa26 100644
--- a/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.inf
+++ b/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = TransSmbiosInfo
- FILE_GUID = 13668C32-1977-436a-800C-F8644D11CB76
+ FILE_GUID = 7FCDA10D-F216-4BAD-9D5C-FBF782A305FD
MODULE_TYPE = DXE_DRIVER
VERSION_STRING = 1.0
ENTRY_POINT = TransferSmbiosInfoToBMC
diff --git a/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf b/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf
index 79e0d8e..ecf61b8 100644
--- a/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf
+++ b/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = OemAddressMapD05
- FILE_GUID = 32BC48E3-5428-4556-A383-25A23EA816A7
+ FILE_GUID = 8F35288F-9AD2-4B4A-ABC2-D97654FB3E5C
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = OemAddressMapLib
diff --git a/Platform/Hisilicon/D05/MemoryInitPei/MemoryInitPeim.inf b/Platform/Hisilicon/D05/MemoryInitPei/MemoryInitPeim.inf
index da28c5a..b863dc2 100644
--- a/Platform/Hisilicon/D05/MemoryInitPei/MemoryInitPeim.inf
+++ b/Platform/Hisilicon/D05/MemoryInitPei/MemoryInitPeim.inf
@@ -18,7 +18,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = MemoryInit
- FILE_GUID = c61ef796-b50d-4f98-9f78-4f6f79d800d5
+ FILE_GUID = 1E71DFDB-EB4F-465C-BBB3-93D3FEA48437
MODULE_TYPE = PEIM
VERSION_STRING = 1.0
diff --git a/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.inf b/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.inf
index a875f98..10ff0db 100644
--- a/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.inf
+++ b/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = Hi1610SerdesLib
- FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2
+ FILE_GUID = BD95FDA9-54A4-4BDC-8EE6-47969ADF25F1
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = SerdesLib
diff --git a/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf b/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf
index dea2a72..308128f 100644
--- a/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf
+++ b/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.inf
@@ -17,7 +17,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = LpcLib
- FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2
+ FILE_GUID = FEC691AE-110D-444E-9B85-0A8F2EFDCA65
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = LpcLib
diff --git a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
index 84125aa..fbf16d6 100644
--- a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
+++ b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PlatformSysCtrlLibHi1610
- FILE_GUID = EBF63479-8F72-4ada-8B2A-960322F7F61A
+ FILE_GUID = 0DC0BBF4-2E09-4943-9534-48BF2EE274D3
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = PlatformSysCtrlLib
diff --git a/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.inf b/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.inf
index 49977ea..67d4a2b 100644
--- a/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.inf
+++ b/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = Hi1616SerdesLib
- FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2
+ FILE_GUID = 0CBCC289-639C-48E9-BEDD-039B21F5E97B
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = SerdesLib
diff --git a/Silicon/Hisilicon/Pv660/Library/PlatformSysCtrlLibPv660/PlatformSysCtrlLibPv660.inf b/Silicon/Hisilicon/Pv660/Library/PlatformSysCtrlLibPv660/PlatformSysCtrlLibPv660.inf
index 35d90df..e36c6b6 100644
--- a/Silicon/Hisilicon/Pv660/Library/PlatformSysCtrlLibPv660/PlatformSysCtrlLibPv660.inf
+++ b/Silicon/Hisilicon/Pv660/Library/PlatformSysCtrlLibPv660/PlatformSysCtrlLibPv660.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PlatformSysCtrlLibPv660
- FILE_GUID = EBF63479-8F72-4ada-8B2A-960322F7F61A
+ FILE_GUID = B6C2EF97-2E30-4AA4-A3F4-D4EB1BBA1CD2
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = PlatformSysCtrlLib
diff --git a/Silicon/Hisilicon/Pv660/Library/Pv660Serdes/Pv660SerdesLib.inf b/Silicon/Hisilicon/Pv660/Library/Pv660Serdes/Pv660SerdesLib.inf
index cd25daa..c9f3c0a 100644
--- a/Silicon/Hisilicon/Pv660/Library/Pv660Serdes/Pv660SerdesLib.inf
+++ b/Silicon/Hisilicon/Pv660/Library/Pv660Serdes/Pv660SerdesLib.inf
@@ -16,7 +16,7 @@
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = Pv660SerdesLib
- FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2
+ FILE_GUID = 488347A3-8014-4DC4-8566-B51CA16CE0BB
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = SerdesLib
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 08/11] Hisilicon/D03: Disable the function of PerfTuning
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (13 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 7/7] Hisilicon: Fix the drivers use the same GUID issue Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:07 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 09/11] D05/ACPI: Disable D05 SAS0 and SAS2 Heyi Guo
` (4 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Chenhui Sun
From: Chenhui Sun <chenhui.sun@linaro.org>
The PerTuning function is not stable, it will cause the
3008/3108 crash, disable this function first.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chenhui Sun <chenhui.sun@linaro.org>
---
Platform/Hisilicon/D03/D03.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index fca6781..ac880d9 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -112,7 +112,7 @@
# It could be set FALSE to save size.
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
- gHisiTokenSpaceGuid.PcdIsPciPerfTuningEnable|TRUE
+ gHisiTokenSpaceGuid.PcdIsPciPerfTuningEnable|FALSE
[PcdsFixedAtBuild.common]
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"D03"
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 09/11] D05/ACPI: Disable D05 SAS0 and SAS2
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (14 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 08/11] Hisilicon/D03: Disable the function of PerfTuning Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:11 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 10/11] D05/ACPI: Modify I2C device Heyi Guo
` (3 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Ming Huang
From: Ming Huang <waip23@foxmail.com>
There are no interface from SAS0 and SAS2 controller on D05,
so SAS0 and SAS2 can't be use.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
index 93beb95..6455130 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
@@ -88,6 +88,11 @@ Scope(_SB)
Store(0x7ffff, CLK)
Sleep(1)
}
+
+ Method (_STA, 0, NotSerialized)
+ {
+ Return (0x0)
+ }
}
Device(SAS1) {
@@ -239,6 +244,11 @@ Scope(_SB)
Store(0x7ffff, CLK)
Sleep(1)
}
+
+ Method (_STA, 0, NotSerialized)
+ {
+ Return (0x0)
+ }
}
}
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 10/11] D05/ACPI: Modify I2C device
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (15 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 09/11] D05/ACPI: Disable D05 SAS0 and SAS2 Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:12 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 11/11] Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device Heyi Guo
` (2 subsequent siblings)
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Ming Huang
From: Ming Huang <waip23@foxmail.com>
1. Disable I2C0 device avoiding access conflict in OS;
2. Modify _HID of I2C2 for matching the string in OS driver;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
---
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl | 20 +-------------------
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl
index eb906ef..3cc60d1 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl
@@ -18,26 +18,8 @@
Scope(_SB)
{
- Device(I2C0) {
- Name(_HID, "APMC0D0F")
- Name(_CID, "APMC0D0F")
- Name(_CRS, ResourceTemplate() {
- Memory32Fixed(ReadWrite, 0xd00e0000, 0x10000)
- Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive, 0, "\\_SB.MBI6") { 705 }
- })
- Name (_DSD, Package () {
- ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package () {
- Package () {"clock-frequency", 100000},
- Package () {"i2c-sda-falling-time-ns", 913},
- Package () {"i2c-scl-falling-time-ns", 303},
- Package () {"i2c-sda-hold-time-ns", 0x9c2},
- }
- })
- }
-
Device(I2C2) {
- Name(_HID, "APMC0D0F")
+ Name(_HID, "HISI02A1")
Name(_CID, "APMC0D0F")
Name(_CRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, 0xd0100000, 0x10000)
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [PATCH edk2-platforms v3 11/11] Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device.
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (16 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 10/11] D05/ACPI: Modify I2C device Heyi Guo
@ 2017-09-21 10:59 ` Heyi Guo
2017-09-21 13:14 ` Leif Lindholm
2017-09-21 12:11 ` [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix graeme.gregory
2017-09-21 12:40 ` Leif Lindholm
19 siblings, 1 reply; 41+ messages in thread
From: Heyi Guo @ 2017-09-21 10:59 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
waip23, Ming Huang
From: Ming Huang <waip23@foxmail.com>
1. Because Hi161x chip doesn't support "ARI Forwarding Enable"
function, BIOS will enumerate 32 same devices (Device Number 0~31)
when attach a Non-ARI capable device in the RP. Hi161x chip will
not fix it, need BIOS patch.
2. Just enlarge iatu for those root port with ARI capable device
attached, Non-ARI capable device's RP, keep iatu limitation.
3. Remove previous temporary solution as below commit id:
"7d157da88852cc91df2b11b10ade2edbbfbe77da"
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason zhang <zhangjinsong2@huawei.com>
---
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c | 1 +
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h | 7 ++
Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 79 ++++++++++++++++++++
3 files changed, 87 insertions(+)
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
index e3d3988..9fa3f84 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
@@ -839,6 +839,7 @@ NotifyPhase(
case EfiPciHostBridgeEndEnumeration:
PCIE_DEBUG("Case EfiPciHostBridgeEndEnumeration\n");
+ EnlargeAtuConfig0 (This);
break;
case EfiPciHostBridgeBeginBusAllocation:
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
index cddda6b..c04361f 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
@@ -401,6 +401,9 @@ PreprocessController (
#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL
#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
+#define INVALID_CAPABILITY_00 0x00
+#define INVALID_CAPABILITY_FF 0xFF
+#define PCI_CAPABILITY_POINTER_MASK 0xFC
//
// Driver Instance Data Prototypes
@@ -518,4 +521,8 @@ RootBridgeConstructor (
IN UINT32 Seg
);
+VOID
+EnlargeAtuConfig0 (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This
+ );
#endif
diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
index 10d766a..b57bd51 100644
--- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -14,6 +14,7 @@
**/
#include "PciHostBridge.h"
+#include <IndustryStandard/PciExpress30.h>
#include <Library/DevicePathLib.h>
#include <Library/DmaLib.h>
#include <Library/PciExpressLib.h>
@@ -2322,3 +2323,81 @@ RootBridgeIoConfiguration (
return EFI_SUCCESS;
}
+BOOLEAN
+PcieCheckAriFwdEn (
+ UINTN PciBaseAddr
+ )
+{
+ UINT8 PciPrimaryStatus;
+ UINT8 CapabilityOffset;
+ UINT8 CapId;
+ UINT8 TempData;
+
+ PciPrimaryStatus = MmioRead16 (PciBaseAddr + PCI_PRIMARY_STATUS_OFFSET);
+
+ if (PciPrimaryStatus & EFI_PCI_STATUS_CAPABILITY) {
+ CapabilityOffset = MmioRead8 (PciBaseAddr + PCI_CAPBILITY_POINTER_OFFSET);
+ CapabilityOffset &= PCI_CAPABILITY_POINTER_MASK;
+
+ while ((CapabilityOffset != INVALID_CAPABILITY_00) && (CapabilityOffset != INVALID_CAPABILITY_FF)) {
+ CapId = MmioRead8 (PciBaseAddr + CapabilityOffset);
+ if (CapId == EFI_PCI_CAPABILITY_ID_PCIEXP) {
+ break;
+ }
+ CapabilityOffset = MmioRead8 (PciBaseAddr + CapabilityOffset + 1);
+ CapabilityOffset &= PCI_CAPABILITY_POINTER_MASK;
+ }
+ } else {
+ PCIE_DEBUG ("[%a:%d] - No PCIE Capability.\n", __FUNCTION__, __LINE__);
+ return FALSE;
+ }
+
+ if ((CapabilityOffset == INVALID_CAPABILITY_FF) || (CapabilityOffset == INVALID_CAPABILITY_00)) {
+ PCIE_DEBUG ("[%a:%d] - No PCIE Capability.\n", __FUNCTION__, __LINE__);
+ return FALSE;
+ }
+
+ TempData = MmioRead16 (PciBaseAddr + CapabilityOffset +
+ EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET);
+ TempData &= EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING;
+
+ if (TempData == EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING) {
+ return TRUE;
+ } else {
+ return FALSE;
+ }
+}
+
+VOID
+EnlargeAtuConfig0 (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This
+ )
+{
+ UINTN RbPciBase;
+ UINT64 MemLimit;
+ LIST_ENTRY *List;
+ PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
+ PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
+
+ PCIE_DEBUG ("In Enlarge RP iatu Config 0.\n");
+
+ HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
+ List = HostBridgeInstance->Head.ForwardLink;
+
+ while (List != &HostBridgeInstance->Head) {
+ PCIE_DEBUG ("HostBridge has data.\n");
+ RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
+
+ RbPciBase = RootBridgeInstance->RbPciBar;
+
+ // Those ARI FWD Enable Root Bridge, need enlarge iatu window.
+ if (PcieCheckAriFwdEn (RbPciBase)) {
+ MemLimit = GetPcieCfgAddress (RootBridgeInstance->Ecam,
+ RootBridgeInstance->BusBase + 2, 0, 0, 0)
+ - 1;
+ MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_VIEW_POINT, 1);
+ MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_LIMIT, (UINT32) MemLimit);
+ }
+ List = List->ForwardLink;
+ }
+}
--
1.9.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix.
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (17 preceding siblings ...)
2017-09-21 10:59 ` [PATCH edk2-platforms v3 11/11] Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device Heyi Guo
@ 2017-09-21 12:11 ` graeme.gregory
2017-09-21 12:40 ` Leif Lindholm
19 siblings, 0 replies; 41+ messages in thread
From: graeme.gregory @ 2017-09-21 12:11 UTC (permalink / raw)
To: Heyi Guo
Cc: leif.lindholm, linaro-uefi, edk2-devel, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
[-- Attachment #1: Type: text/plain, Size: 3341 bytes --]
All ACPI changes apart from the small comment I had on I2C one
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
On Thu, Sep 21, 2017 at 06:59:39PM +0800, Heyi Guo wrote:
> Code can also be found in github:
> https://github.com/hisilicon/OpenPlatformPkg.git
> branch: rp-1710-platforms-v3 rp-1710-osi-v3
>
> Note: If occurs BIOS boot hang up issue, please revert below commit to fix:
> "2f03dc8"
>
> Chenhui Sun (1):
> Hisilicon/D03: Disable the function of PerfTuning
>
> Heyi Guo (4):
> Hisilicon/D05: Modify dsc and fdf file
> Hisilicon/D03: Modify dsc and fdf file
> Hisilicon: Fix the drivers use the same GUID issue
> Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase
>
> Ming Huang (4):
> Hisilicon D03/D05: get firmware version from FIRMWARE_VER
> D05/ACPI: Disable D05 SAS0 and SAS2
> D05/ACPI: Modify I2C device
> Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device.
>
> huangming (2):
> Hisilicon/D05/Pcie: fix bug of size definition
> D05/PCIe: Modify PcieRegionBase of secondary chip
>
> Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf | 2 +-
> Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf | 2 +-
> Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf | 2 +-
> Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf | 2 +-
> Platform/Hisilicon/D03/D03.dsc | 13 ++-
> Platform/Hisilicon/D03/D03.fdf | 5 +-
> Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf | 2 +-
> Platform/Hisilicon/D05/D05.dsc | 83 +++++++++--------
> Platform/Hisilicon/D05/D05.fdf | 4 +-
> Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf | 2 +-
> Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf | 2 +-
> Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf | 2 +-
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c | 38 ++++----
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h | 7 ++
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 94 +++++++++++++++++++-
> Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf | 2 +-
> Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf | 2 +-
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl | 20 +----
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 8 +-
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 10 +++
> Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf | 2 +-
> Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf | 2 +-
> Silicon/Hisilicon/Library/I2CLib/I2CLib.inf | 2 +-
> Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf | 2 +-
> 24 files changed, 205 insertions(+), 105 deletions(-)
>
> --
> 1.9.1
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix.
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
` (18 preceding siblings ...)
2017-09-21 12:11 ` [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix graeme.gregory
@ 2017-09-21 12:40 ` Leif Lindholm
2017-09-21 13:32 ` Ard Biesheuvel
19 siblings, 1 reply; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 12:40 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:39PM +0800, Heyi Guo wrote:
> Code can also be found in github:
> https://github.com/hisilicon/OpenPlatformPkg.git
> branch: rp-1710-platforms-v3 rp-1710-osi-v3
This is looking a lot better, thanks.
But it could be useful to have a separate cover letter for the
edk2-non-osi patches.
> Note: If occurs BIOS boot hang up issue, please revert below commit to fix:
> "2f03dc8"
Can you give more information?
2f03dc8 is "Silicon/Hisilicon: switch to NonDiscoverable driver for
EHCI".
/
Leif
> Chenhui Sun (1):
> Hisilicon/D03: Disable the function of PerfTuning
>
> Heyi Guo (4):
> Hisilicon/D05: Modify dsc and fdf file
> Hisilicon/D03: Modify dsc and fdf file
> Hisilicon: Fix the drivers use the same GUID issue
> Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase
>
> Ming Huang (4):
> Hisilicon D03/D05: get firmware version from FIRMWARE_VER
> D05/ACPI: Disable D05 SAS0 and SAS2
> D05/ACPI: Modify I2C device
> Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device.
>
> huangming (2):
> Hisilicon/D05/Pcie: fix bug of size definition
> D05/PCIe: Modify PcieRegionBase of secondary chip
>
> Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf | 2 +-
> Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf | 2 +-
> Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf | 2 +-
> Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf | 2 +-
> Platform/Hisilicon/D03/D03.dsc | 13 ++-
> Platform/Hisilicon/D03/D03.fdf | 5 +-
> Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf | 2 +-
> Platform/Hisilicon/D05/D05.dsc | 83 +++++++++--------
> Platform/Hisilicon/D05/D05.fdf | 4 +-
> Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf | 2 +-
> Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf | 2 +-
> Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf | 2 +-
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c | 38 ++++----
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h | 7 ++
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 94 +++++++++++++++++++-
> Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf | 2 +-
> Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf | 2 +-
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl | 20 +----
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 8 +-
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 10 +++
> Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf | 2 +-
> Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf | 2 +-
> Silicon/Hisilicon/Library/I2CLib/I2CLib.inf | 2 +-
> Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf | 2 +-
> 24 files changed, 205 insertions(+), 105 deletions(-)
>
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-non-osi v3 2/7] Hisilicon/D03/Sas: Add SasPlatform
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 2/7] Hisilicon/D03/Sas: Add SasPlatform Heyi Guo
@ 2017-09-21 12:49 ` Leif Lindholm
[not found] ` <3A622B96E322004395454DF73A38DDFA75577DB2@dggemm508-mbx.china.huawei.com>
0 siblings, 1 reply; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 12:49 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:43PM +0800, Heyi Guo wrote:
> Install protocol to enable sas port which is using and
> transmit base address info of sas port to SasDriverDxe.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
On the whole, I'm OK with this - but:
1) This looks like a very simple piece of code, at a low risk to
reveal anything confidential about Hisilicon IP. Can this be
made open source?
> ---
> Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi | Bin 0 -> 3040 bytes
> Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf | 24 ++++++++++++++++++++
> 2 files changed, 24 insertions(+)
>
> diff --git a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi
> new file mode 100644
> index 0000000..4255641
> Binary files /dev/null and b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
> new file mode 100644
> index 0000000..636be19
> --- /dev/null
> +++ b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
> @@ -0,0 +1,24 @@
> +#/** @file
> +#
> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = SasPlatform
> + FILE_GUID = 102D8FC9-20a4-42EB-aC14-1C98BA5b26A4
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> +
> +[Binaries]
2) [Binaries.AARCH64]
> + PE32|SasPlatform.efi|*
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-non-osi v3 1/7] Hisilicon/D03/Net: Update Snp driver
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 1/7] Hisilicon/D03/Net: Update Snp driver Heyi Guo
@ 2017-09-21 12:51 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 12:51 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:40PM +0800, Heyi Guo wrote:
> 1. Replace SnpPV660Dxe with SnpPV600Dxe;
> 2. Add SnpPlatform:
> Install protocol to enable nic port which are using.
OK, that sort of explains what it is doing. Let's discuss a bit more
during Connect. Two comments below.
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> ---
> Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi | Bin 0 -> 26688 bytes
> Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf | 24 +++++++++++++++++
> Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi | Bin 56832 -> 0 bytes
> Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf | 27 --------------------
> Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi | Bin 0 -> 3040 bytes
> Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf | 24 +++++++++++++++++
This SnpPlatform.efi looks like a very simple piece of code. Could it
be made open source?
> 6 files changed, 48 insertions(+), 27 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi
> new file mode 100644
> index 0000000..8ce6a6d
> Binary files /dev/null and b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
> new file mode 100644
> index 0000000..cd7c724
> --- /dev/null
> +++ b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
> @@ -0,0 +1,24 @@
> +#/** @file
> +#
> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = SnpPV600Dxe
> + FILE_GUID = 3247F15F-3612-4803-BD4E-4104D7EF944A
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> +
> +[Binaries]
> + PE32|SnpPV600Dxe.efi|*
> diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi
> deleted file mode 100644
> index eb69403..0000000
> Binary files a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi and /dev/null differ
> diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
> deleted file mode 100644
> index 204ef17..0000000
> --- a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
> +++ /dev/null
> @@ -1,27 +0,0 @@
> -#/** @file
> -#
> -# Copyright (c) 2016, Hisilicon Limited. All rights reserved.
> -# Copyright (c) 2016-2017, Linaro Limited. All rights reserved.
> -#
> -# This program and the accompanying materials
> -# are licensed and made available under the terms and conditions of the BSD License
> -# which accompanies this distribution. The full text of the license may be found at
> -# http://opensource.org/licenses/bsd-license.php
> -#
> -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -#
> -#**/
> -
> -[Defines]
> - INF_VERSION = 0x00010005
> - BASE_NAME = SnpPV600Dxe
> - FILE_GUID = 92D37768-571C-48d9-BEF5-9744AE2FDAF4
> - MODULE_TYPE = UEFI_DRIVER
> - VERSION_STRING = 1.0
> -
> - ENTRY_POINT = InitializeSnpPV600Driver
> - UNLOAD_IMAGE = SnpPV600Unload
> -
> -[Binaries]
> - PE32|SnpPV600Dxe.efi|*
> diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi
> new file mode 100644
> index 0000000..5e7d8bd
> Binary files /dev/null and b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
> new file mode 100644
> index 0000000..fd53a79
> --- /dev/null
> +++ b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
> @@ -0,0 +1,24 @@
> +#/** @file
> +#
> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = SnpPlatform
> + FILE_GUID = 102D8FC9-20A4-42EB-AC14-1C98BA5B17A8
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> +
> +[Binaries]
[Binaries.AARCH64]
/
Leif
> + PE32|SnpPlatform.efi|*
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-non-osi v3 3/7] Hisilicon/D03: Update binary file
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 3/7] Hisilicon/D03: Update binary file Heyi Guo
@ 2017-09-21 12:54 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 12:54 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:44PM +0800, Heyi Guo wrote:
> Update binary file for edk2 upgrade.
> 1. Replace UncachedMemoryAllocationLib with DmaLib;
> 2. Remove ArmCpuLib dependenc;
> 3. Remove ConvertToPhysicalAddress;
OK, this is fine for the EDK2 bits, but:
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> ---
> Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi | Bin 21696 -> 4768 bytes
> Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi | Bin 22208 -> 4672 bytes
> Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi | Bin 25440 -> 6784 bytes
> Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi | Bin 23712 -> 4896 bytes
> Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi | Bin 18080 -> 2304 bytes
> Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi | Bin 48352 -> 21664 bytes
> Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi | Bin 22112 -> 3712 bytes
> Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi | Bin 262144 -> 262144 bytes
> Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi | Bin 208288 -> 98144 bytes
> Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi | Bin 36480 -> 17728 bytes
> Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi | Bin 21408 -> 4000 bytes
> Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib | Bin 19486 -> 20550 bytes
> Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi | Bin 161280 -> 90272 bytes
> Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv | Bin 262144 -> 262144 bytes
> Platform/Hisilicon/D03/bl1.bin | Bin 14336 -> 14336 bytes
> Platform/Hisilicon/D03/fip.bin | Bin 45601 -> 62513 bytes
What is the update for the above three?
I guess this bumps the version of ARM Trusted Firmware. Can we have a
reference to the internal commit hash this is generated from?
(May make more sense as a separate patch.)
/
Leif
> Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib | Bin 603524 -> 587188 bytes
> Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib | Bin 247176 -> 210280 bytes
> Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib | Bin 13998 -> 13958 bytes
> Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib | Bin 305230 -> 297590 bytes
> Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib | Bin 17022 -> 16942 bytes
> 21 files changed, 0 insertions(+), 0 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi b/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi
> index 269243a..12640f2 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi and b/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi b/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi
> index c197895..d2565c8 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi and b/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi b/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi
> index 6201971..0d8ff52 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi and b/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi b/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi
> index 7409fcb..b85c19b 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi and b/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi b/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi
> index a9238b1..89c4b5b 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi and b/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi b/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi
> index 0a0d9d5..e1970fd 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi and b/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi b/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi
> index 12b2af7..0572a71 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi and b/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi b/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi
> index b8d9be3..28a4104 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi and b/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi b/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi
> index e135930..c9b2ad6 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi and b/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi b/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi
> index 30a0f77..16c91e2 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi and b/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi differ
> diff --git a/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi b/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi
> index 39b8f58..2b6e4c1 100644
> Binary files a/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi and b/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi differ
> diff --git a/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib b/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib
> index fe23d93..ffe2a13 100644
> Binary files a/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib and b/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib differ
> diff --git a/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi b/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi
> index 1fdea0c..354abcc 100644
> Binary files a/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi and b/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi differ
> diff --git a/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv b/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv
> index 1830a6a..9c781c6 100644
> Binary files a/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv and b/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv differ
> diff --git a/Platform/Hisilicon/D03/bl1.bin b/Platform/Hisilicon/D03/bl1.bin
> index 7bf0698..cdaa743 100644
> Binary files a/Platform/Hisilicon/D03/bl1.bin and b/Platform/Hisilicon/D03/bl1.bin differ
> diff --git a/Platform/Hisilicon/D03/fip.bin b/Platform/Hisilicon/D03/fip.bin
> index 913d40d..ae4ed1a 100644
> Binary files a/Platform/Hisilicon/D03/fip.bin and b/Platform/Hisilicon/D03/fip.bin differ
> diff --git a/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib b/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib
> index c55d678..e7c5f9f 100644
> Binary files a/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib and b/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib differ
> diff --git a/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib b/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib
> index 1b02db1..5ad2c8f 100644
> Binary files a/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib and b/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib differ
> diff --git a/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib b/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib
> index f74d98d..e76c741 100644
> Binary files a/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib and b/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib differ
> diff --git a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib
> index ca78ae6..68be770 100644
> Binary files a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib and b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib differ
> diff --git a/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib b/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib
> index 6f88fc1..d6ce068 100644
> Binary files a/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib and b/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib differ
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-non-osi v3 4/7] Hisilicon/D05/Net: Update Snp driver
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 4/7] Hisilicon/D05/Net: Update Snp driver Heyi Guo
@ 2017-09-21 12:56 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 12:56 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:47PM +0800, Heyi Guo wrote:
> 1. Replace SnpPV660Dxe with SnpPV600Dxe;
> 2. Add SnpPlatform:
> Install protocol to enable nic port which are using.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> ---
> Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi | Bin 0 -> 28544 bytes
> Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf | 24 +++++++++++++++++
> Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi | Bin 56512 -> 0 bytes
> Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf | 27 --------------------
> Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi | Bin 0 -> 3392 bytes
> Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf | 24 +++++++++++++++++
> 6 files changed, 48 insertions(+), 27 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi
> new file mode 100644
> index 0000000..bc7942a
> Binary files /dev/null and b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
> new file mode 100644
> index 0000000..cd7c724
> --- /dev/null
> +++ b/Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
> @@ -0,0 +1,24 @@
> +#/** @file
> +#
> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = SnpPV600Dxe
> + FILE_GUID = 3247F15F-3612-4803-BD4E-4104D7EF944A
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> +
> +[Binaries]
[Binaries.AARCH64]
> + PE32|SnpPV600Dxe.efi|*
> diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi
> deleted file mode 100644
> index c54538f..0000000
> Binary files a/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi and /dev/null differ
> diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
> deleted file mode 100644
> index 98cc3b8..0000000
> --- a/Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
> +++ /dev/null
> @@ -1,27 +0,0 @@
> -#/** @file
> -#
> -# Copyright (c) 2016, Hisilicon Limited. All rights reserved.
> -# Copyright (c) 2016-2017, Linaro Limited. All rights reserved.
> -#
> -# This program and the accompanying materials
> -# are licensed and made available under the terms and conditions of the BSD License
> -# which accompanies this distribution. The full text of the license may be found at
> -# http://opensource.org/licenses/bsd-license.php
> -#
> -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -#
> -#**/
> -
> -[Defines]
> - INF_VERSION = 0x00010019
> - BASE_NAME = SnpPV600Dxe
> - FILE_GUID = 85F85FDE-FDA1-465A-B22E-488F1A6F966C
> - MODULE_TYPE = UEFI_DRIVER
> - VERSION_STRING = 1.0
> -
> - ENTRY_POINT = InitializeSnpPV600Driver
> - UNLOAD_IMAGE = SnpPV600Unload
> -
> -[Binaries]
> - PE32|SnpPV600Dxe.efi|*
> diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi
> new file mode 100644
> index 0000000..42c26de
> Binary files /dev/null and b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
> new file mode 100644
> index 0000000..fd53a79
> --- /dev/null
> +++ b/Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
> @@ -0,0 +1,24 @@
> +#/** @file
> +#
> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = SnpPlatform
> + FILE_GUID = 102D8FC9-20A4-42EB-AC14-1C98BA5B17A8
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> +
> +[Binaries]
[Binaries.AARCH64]
/
Leif
> + PE32|SnpPlatform.efi|*
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 05/11] Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase
2017-09-21 10:59 ` [PATCH edk2-platforms v3 05/11] Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase Heyi Guo
@ 2017-09-21 12:57 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 12:57 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:49PM +0800, Heyi Guo wrote:
> Io BAR should be based IoBase and Mem BAR should be based PciRegionBase.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c | 37 ++++++++++++--------
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 15 ++++++--
> 2 files changed, 35 insertions(+), 17 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
> index a970da6..e3d3988 100644
> --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
> +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
> @@ -1410,9 +1410,8 @@ SetResource(
> Ptr->ResType = 1;
> Ptr->GenFlag = 0;
> Ptr->SpecificFlag = 0;
> - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
> - Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
> - (RootBridgeInstance->MemBase & 0xFFFFFFFF);
> + /* PCIE Device Iobar address should be based on IoBase */
> + Ptr->AddrRangeMin = RootBridgeInstance->IoBase;
> Ptr->AddrRangeMax = 0;
> Ptr->AddrTranslationOffset = \
> (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
> @@ -1429,9 +1428,13 @@ SetResource(
> Ptr->GenFlag = 0;
> Ptr->SpecificFlag = 0;
> Ptr->AddrSpaceGranularity = 32;
> - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
> - Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
> - (RootBridgeInstance->MemBase & 0xFFFFFFFF);
> + /* PCIE device Bar should be based on PciRegionBase */
> + if (RootBridgeInstance->PciRegionBase > MAX_UINT32) {
> + DEBUG((DEBUG_ERROR, "PCIE Res(TypeMem32) unsupported.\n"));
> + return EFI_UNSUPPORTED;
> + }
> + Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase +
> + RootBridgeInstance->PciRegionBase;
> Ptr->AddrRangeMax = 0;
> Ptr->AddrTranslationOffset = \
> (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
> @@ -1448,9 +1451,13 @@ SetResource(
> Ptr->GenFlag = 0;
> Ptr->SpecificFlag = 6;
> Ptr->AddrSpaceGranularity = 32;
> - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
> - Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
> - (RootBridgeInstance->MemBase & 0xFFFFFFFF);
> + /* PCIE device Bar should be based on PciRegionBase */
> + if (RootBridgeInstance->PciRegionBase > MAX_UINT32) {
> + DEBUG((DEBUG_ERROR, "PCIE Res(TypePMem32) unsupported.\n"));
> + return EFI_UNSUPPORTED;
> + }
> + Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase +
> + RootBridgeInstance->PciRegionBase;
> Ptr->AddrRangeMax = 0;
> Ptr->AddrTranslationOffset = \
> (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
> @@ -1467,9 +1474,9 @@ SetResource(
> Ptr->GenFlag = 0;
> Ptr->SpecificFlag = 0;
> Ptr->AddrSpaceGranularity = 64;
> - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
> - Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
> - (RootBridgeInstance->MemBase & 0xFFFFFFFFFFFFFFFF);
> + /* PCIE device Bar should be based on PciRegionBase */
> + Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase +
> + RootBridgeInstance->PciRegionBase;
> Ptr->AddrRangeMax = 0;
> Ptr->AddrTranslationOffset = \
> (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
> @@ -1486,9 +1493,9 @@ SetResource(
> Ptr->GenFlag = 0;
> Ptr->SpecificFlag = 6;
> Ptr->AddrSpaceGranularity = 64;
> - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/
> - Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) +
> - (RootBridgeInstance->MemBase & 0xFFFFFFFFFFFFFFFF);
> + /* PCIE device Bar should be based on PciRegionBase */
> + Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase +
> + RootBridgeInstance->PciRegionBase;
> Ptr->AddrRangeMax = 0;
> Ptr->AddrTranslationOffset = \
> (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
> diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
> index 03edcf1..10d766a 100644
> --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
> +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
> @@ -2301,8 +2301,19 @@ RootBridgeIoConfiguration (
> PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);
> for (Index = 0; Index < TypeMax; Index++) {
> if (PrivateData->ResAllocNode[Index].Status == ResAllocated) {
> - Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->ResAllocNode[Index].Base;
> - Configuration.SpaceDesp[Index].AddrRangeMax = PrivateData->ResAllocNode[Index].Base + PrivateData->ResAllocNode[Index].Length - 1;
> + switch (Index) {
> + case TypeIo:
> + Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->IoBase;
> + break;
> + case TypeBus:
> + Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->ResAllocNode[Index].Base;
> + break;
> + default:
> + /* PCIE Device bar address should be base on PciRegionBase */
> + Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->ResAllocNode[Index].Base - PrivateData->MemBase +
> + PrivateData->PciRegionBase;
> + }
> + Configuration.SpaceDesp[Index].AddrRangeMax = Configuration.SpaceDesp[Index].AddrRangeMin + PrivateData->ResAllocNode[Index].Length - 1;
> Configuration.SpaceDesp[Index].AddrLen = PrivateData->ResAllocNode[Index].Length;
> }
> }
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-non-osi v3 6/7] Hisilicon/D05: Update binary file
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 6/7] Hisilicon/D05: Update binary file Heyi Guo
@ 2017-09-21 12:59 ` Leif Lindholm
[not found] ` <3A622B96E322004395454DF73A38DDFA75577D70@dggemm508-mbx.china.huawei.com>
0 siblings, 1 reply; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 12:59 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:51PM +0800, Heyi Guo wrote:
> Fix bug 3061: D05(before EC) boot hangs at "Need Reset";
>
> Update binary file for edk2 upgrade.
> 1. Replace UncachedMemoryAllocationLib with DmaLib;
> 2. Remove ArmCpuLib dependenc;
> 3. Remove ConvertToPhysicalAddress;
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> ---
> Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi | Bin 19552 -> 5024 bytes
> Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi | Bin 25696 -> 7680 bytes
> Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi | Bin 22528 -> 5344 bytes
> Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi | Bin 23136 -> 5280 bytes
> Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi | Bin 15968 -> 2592 bytes
> Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi | Bin 48000 -> 23328 bytes
> Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi | Bin 21536 -> 4032 bytes
> Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi | Bin 262144 -> 262144 bytes
> Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi | Bin 230912 -> 116288 bytes
> Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi | Bin 35904 -> 18592 bytes
> Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi | Bin 16576 -> 4288 bytes
> Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib | Bin 42136 -> 52968 bytes
> Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi | Bin 273312 -> 152576 bytes
> Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv | Bin 262144 -> 262144 bytes
> Platform/Hisilicon/D05/bl1.bin | Bin 12296 -> 14344 bytes
> Platform/Hisilicon/D05/fip.bin | Bin 41493 -> 41493 bytes
Like for D03 - I guess this means ARM Trusted Firmware update. Can it
be a separate patch and describe the commit hash it was produced from?
Does the (bugs.linaro.org) 3061 fix also belong to these files?
/
Leif
> Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib | Bin 707246 -> 726884 bytes
> Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib | Bin 358602 -> 344310 bytes
> 18 files changed, 0 insertions(+), 0 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi b/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi
> index 6f117e2..a0fa8c8 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi and b/Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi
> index 139658c..9b4e23e 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi and b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi
> index c3d28ec..5bf6ded 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi and b/Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi b/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi
> index 96d1680..3092139 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi and b/Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi b/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi
> index 029ce97..ece5615 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi and b/Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi b/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi
> index dcabce2..9e7dd0e 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi and b/Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi b/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi
> index da85b0b..2be627f 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi and b/Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi b/Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi
> index 02ea2b1..52d6107 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi and b/Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi b/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi
> index a1b16d7..9a680c5 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi and b/Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi b/Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi
> index d22bf64..b8de025 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi and b/Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi b/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi
> index 980be0a..80fe6fa 100644
> Binary files a/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi and b/Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi differ
> diff --git a/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib b/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib
> index e37546e..00954c7 100644
> Binary files a/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib and b/Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib differ
> diff --git a/Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi b/Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi
> index 5a93c4e..b94e0cb 100644
> Binary files a/Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi and b/Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi differ
> diff --git a/Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv b/Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv
> index 16500b7..ab6ea83 100644
> Binary files a/Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv and b/Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv differ
> diff --git a/Platform/Hisilicon/D05/bl1.bin b/Platform/Hisilicon/D05/bl1.bin
> index f207cd9..7341476 100644
> Binary files a/Platform/Hisilicon/D05/bl1.bin and b/Platform/Hisilicon/D05/bl1.bin differ
> diff --git a/Platform/Hisilicon/D05/fip.bin b/Platform/Hisilicon/D05/fip.bin
> index 0952662..496a9b8 100644
> Binary files a/Platform/Hisilicon/D05/fip.bin and b/Platform/Hisilicon/D05/fip.bin differ
> diff --git a/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib b/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib
> index 82abd5f..cdfaeb7 100644
> Binary files a/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib and b/Silicon/Hisilicon/Hi1616/Library/Hi1616Serdes/Hi1616SerdesLib.lib differ
> diff --git a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib
> index a4fe13a..b3cc88e 100644
> Binary files a/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib and b/Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.lib differ
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-non-osi v3 5/7] Hisilicon/D05/Sas: Add SasPlatform
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 5/7] Hisilicon/D05/Sas: Add SasPlatform Heyi Guo
@ 2017-09-21 13:00 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:00 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:48PM +0800, Heyi Guo wrote:
> Install protocol to enable sas port which is using and
> transmit base address info of sas port to SasDriverDxe.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> ---
> Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi | Bin 0 -> 3424 bytes
> Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf | 24 ++++++++++++++++++++
Another small piece of code - can we have an open source version?
> 2 files changed, 24 insertions(+)
>
> diff --git a/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi
> new file mode 100644
> index 0000000..d2685ab
> Binary files /dev/null and b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.efi differ
> diff --git a/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
> new file mode 100644
> index 0000000..636be19
> --- /dev/null
> +++ b/Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
> @@ -0,0 +1,24 @@
> +#/** @file
> +#
> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = SasPlatform
> + FILE_GUID = 102D8FC9-20a4-42EB-aC14-1C98BA5b26A4
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> +
> +[Binaries]
[Binaries.AARCH64]
> + PE32|SasPlatform.efi|*
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 01/11] Hisilicon/D05: Modify dsc and fdf file
2017-09-21 10:59 ` [PATCH edk2-platforms v3 01/11] Hisilicon/D05: Modify dsc and fdf file Heyi Guo
@ 2017-09-21 13:01 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:01 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:41PM +0800, Heyi Guo wrote:
> 1. Add Drivers/SasPlatform;
> 2. Add Drivers/Net/SnpPlatform;
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Platform/Hisilicon/D05/D05.dsc | 5 -----
> Platform/Hisilicon/D05/D05.fdf | 4 +++-
> 2 files changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 3cdb1b1..7cd5758 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -538,11 +538,6 @@
>
> Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
>
> - #
> - #network
> - #
> - Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
> -
> MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index b6d0e42..a5e6546 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -247,7 +247,8 @@ READ_LOCK_STATUS = TRUE
> #Network
> #
>
> - INF Platform/Hisilicon/D05/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
> + INF Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
> + INF Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
>
> INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> @@ -292,6 +293,7 @@ READ_LOCK_STATUS = TRUE
> #
> INF Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
> INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
> + INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
> INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
>
> #
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 02/11] Hisilicon/D03: Modify dsc and fdf file
2017-09-21 10:59 ` [PATCH edk2-platforms v3 02/11] Hisilicon/D03: " Heyi Guo
@ 2017-09-21 13:02 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:02 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:42PM +0800, Heyi Guo wrote:
> 1. Add Drivers/SasPlatform;
> 2. Add Drivers/Net/SnpPlatform;
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> ---
> Platform/Hisilicon/D03/D03.dsc | 5 -----
> Platform/Hisilicon/D03/D03.fdf | 5 ++++-
> 2 files changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index afea162..7e25ffb 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -418,11 +418,6 @@
>
> Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.inf
>
> - #
> - #network
> - #
> - Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
> -
> MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
> index b62b908..b53bdca 100644
> --- a/Platform/Hisilicon/D03/D03.fdf
> +++ b/Platform/Hisilicon/D03/D03.fdf
> @@ -242,7 +242,8 @@ READ_LOCK_STATUS = TRUE
> #Network
> #
>
> - INF Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf
> + INF Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
> + INF Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
>
> INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> @@ -271,6 +272,7 @@ READ_LOCK_STATUS = TRUE
> #
> INF Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf
>
> + INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
> INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>
> #
> @@ -278,6 +280,7 @@ READ_LOCK_STATUS = TRUE
> #
> INF ShellPkg/Application/Shell/Shell.inf
>
> +
This spurious whitespace change is still here. Please delete for v4.
Other than that, the patch is fine.
/
Leif
> #
> # Bds
> #
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 04/11] Hisilicon D03/D05: get firmware version from FIRMWARE_VER
2017-09-21 10:59 ` [PATCH edk2-platforms v3 04/11] Hisilicon D03/D05: get firmware version from FIRMWARE_VER Heyi Guo
@ 2017-09-21 13:03 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:03 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23, Ming Huang
On Thu, Sep 21, 2017 at 06:59:46PM +0800, Heyi Guo wrote:
> From: Ming Huang <waip23@foxmail.com>
>
> Value of the environment variable FIRMWARE_VER is GIT SHA by default,
> and you can add the environment variable FIRMWARE_VER to EXTRA_OPTIONS
> at build time to specify something else, eg. "16.12-<commit id>".
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Platform/Hisilicon/D03/D03.dsc | 6 +++++-
> Platform/Hisilicon/D05/D05.dsc | 6 +++++-
> 2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index 7e25ffb..fca6781 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -170,7 +170,11 @@
> gHisiTokenSpaceGuid.PcdAlgSmmuBaseAddress|0xd0040000
>
>
> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D03 UEFI 16.12 Release"
> + !ifdef $(FIRMWARE_VER)
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
> + !else
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D03 UEFI 17.10 Release"
> + !endif
>
> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 7cd5758..aa61c0e 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -188,7 +188,11 @@
>
> gHisiTokenSpaceGuid.PcdIsMPBoot|1
> gHisiTokenSpaceGuid.PcdSocketMask|0x3
> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D05 UEFI 16.12 Release"
> + !ifdef $(FIRMWARE_VER)
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
> + !else
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D05 UEFI 17.10 Release"
> + !endif
>
> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
>
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 06/11] Hisilicon/D05/Pcie: fix bug of size definition
2017-09-21 10:59 ` [PATCH edk2-platforms v3 06/11] Hisilicon/D05/Pcie: fix bug of size definition Heyi Guo
@ 2017-09-21 13:04 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:04 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:50PM +0800, Heyi Guo wrote:
> From: huangming <huangming23@huawei.com>
>
> Fix bug of PcieRegion size definition and IO size definition.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Platform/Hisilicon/D05/D05.dsc | 64 ++++++++++----------
> 1 file changed, 32 insertions(+), 32 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index aa61c0e..01defe0 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -310,37 +310,37 @@
> gHisiTokenSpaceGuid.PciHb1Rb7Base|0x700a00b0000
>
> gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionBaseAddress|0xa8400000
> - gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionSize|0xbeffff
> + gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionSize|0xbf0000
> gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionBaseAddress|0xa9400000
> - gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionSize|0xbeffff
> + gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionSize|0xbf0000
> gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionBaseAddress|0xa8800000
> - gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionSize|0x77effff
> + gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionSize|0x77f0000
> gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionBaseAddress|0xab400000
> - gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionSize|0xbeffff
> + gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionSize|0xbf0000
> gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionBaseAddress|0xa9000000
> - gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionSize|0x2feffff
> + gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionSize|0x2ff0000
> gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionBaseAddress|0xb0800000
> - gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionSize|0x77effff
> + gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionSize|0x77f0000
> gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionBaseAddress|0xac900000
> - gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionSize|0x36effff
> + gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionSize|0x36f0000
> gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionBaseAddress|0xb9800000
> - gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionSize|0x67effff
> + gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionSize|0x67f0000
> gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionBaseAddress|0x400a8400000
> - gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbeffff
> + gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbf0000
> gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionBaseAddress|0x400a9400000
> - gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbeffff
> + gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbf0000
> gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x20000000
> - gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xcfffffff
> + gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xd0000000
> gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionBaseAddress|0x400ab400000
> - gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbeffff
> + gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbf0000
> gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x30000000
> - gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xbfffffff
> + gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xc0000000
> gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionBaseAddress|0x40000000
> - gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xafffffff
> + gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xb0000000
> gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionBaseAddress|0x408aa400000
> - gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionSize|0xbeffff
> + gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionSize|0xbf0000
> gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionBaseAddress|0x408ab400000
> - gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionSize|0xbeffff
> + gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionSize|0xbf0000
>
> gHisiTokenSpaceGuid.PcdHb0Rb0CpuMemRegionBase|0xA8400000
> gHisiTokenSpaceGuid.PcdHb0Rb1CpuMemRegionBase|0xA9400000
> @@ -377,52 +377,52 @@
> gHisiTokenSpaceGuid.PcdHb1Rb7CpuIoRegionBase|0x408abff0000
>
> gHisiTokenSpaceGuid.PcdHb0Rb0IoBase|0
> - gHisiTokenSpaceGuid.PcdHb0Rb0IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb0Rb0IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb0Rb1IoBase|0
> - gHisiTokenSpaceGuid.PcdHb0Rb1IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb0Rb1IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb0Rb2IoBase|0
> - gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb0Rb3IoBase|0
> - gHisiTokenSpaceGuid.PcdHb0Rb3IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb0Rb3IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb0Rb4IoBase|0
> - gHisiTokenSpaceGuid.PcdHb0Rb4IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb0Rb4IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb0Rb5IoBase|0
> - gHisiTokenSpaceGuid.PcdHb0Rb5IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb0Rb5IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb0Rb6IoBase|0
> - gHisiTokenSpaceGuid.PcdHb0Rb6IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb0Rb6IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb0Rb7IoBase|0
> - gHisiTokenSpaceGuid.PcdHb0Rb7IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb0Rb7IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb1Rb0IoBase|0
> - gHisiTokenSpaceGuid.PcdHb1Rb0IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb1Rb0IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb1Rb1IoBase|0
> - gHisiTokenSpaceGuid.PcdHb1Rb1IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb1Rb1IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb1Rb2IoBase|0
> - gHisiTokenSpaceGuid.PcdHb1Rb2IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb1Rb2IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb1Rb3IoBase|0
> - gHisiTokenSpaceGuid.PcdHb1Rb3IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb1Rb3IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb1Rb4IoBase|0
> - gHisiTokenSpaceGuid.PcdHb1Rb4IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb1Rb4IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb1Rb5IoBase|0
> - gHisiTokenSpaceGuid.PcdHb1Rb5IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb1Rb5IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb1Rb6IoBase|0
> - gHisiTokenSpaceGuid.PcdHb1Rb6IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb1Rb6IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.PcdHb1Rb7IoBase|0
> - gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0xffff #64K
> + gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0x10000 #64K
>
> gHisiTokenSpaceGuid.Pcdsoctype|0x1610
>
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 07/11] D05/PCIe: Modify PcieRegionBase of secondary chip
2017-09-21 10:59 ` [PATCH edk2-platforms v3 07/11] D05/PCIe: Modify PcieRegionBase of secondary chip Heyi Guo
@ 2017-09-21 13:04 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:04 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23
On Thu, Sep 21, 2017 at 06:59:52PM +0800, Heyi Guo wrote:
> From: huangming <huangming23@huawei.com>
>
> On D05 PCIe now, 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses are
> 0x20000000 and 0x30000000 based. These addresses overlap with the DDR
> memory range 0-1G. In this situation, on the inbound direction, our pcie
> will drop the DDR address access that are located in the pci range window
> and lead to a dataflow error.
>
> Modify 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses to 0x40000000
> and decrease PciRegion Size accordingly.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
Thanks - this patch is a lot cleaner when ordered after the previous
one.
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Platform/Hisilicon/D05/D05.dsc | 12 ++++++------
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 8 ++++----
> 2 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 01defe0..64101a7 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -329,12 +329,12 @@
> gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbf0000
> gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionBaseAddress|0x400a9400000
> gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbf0000
> - gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x20000000
> - gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xd0000000
> + gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x40000000
> + gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xb0000000
> gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionBaseAddress|0x400ab400000
> gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbf0000
> - gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x30000000
> - gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xc0000000
> + gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x40000000
> + gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xb0000000
> gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionBaseAddress|0x40000000
> gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xb0000000
> gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionBaseAddress|0x408aa400000
> @@ -352,9 +352,9 @@
> gHisiTokenSpaceGuid.PcdHb0Rb7CpuMemRegionBase|0x8B9800000
> gHisiTokenSpaceGuid.PcdHb1Rb0CpuMemRegionBase|0x400A8400000
> gHisiTokenSpaceGuid.PcdHb1Rb1CpuMemRegionBase|0x400A9400000
> - gHisiTokenSpaceGuid.PcdHb1Rb2CpuMemRegionBase|0x65020000000
> + gHisiTokenSpaceGuid.PcdHb1Rb2CpuMemRegionBase|0x65040000000
> gHisiTokenSpaceGuid.PcdHb1Rb3CpuMemRegionBase|0x400AB400000
> - gHisiTokenSpaceGuid.PcdHb1Rb4CpuMemRegionBase|0x75030000000
> + gHisiTokenSpaceGuid.PcdHb1Rb4CpuMemRegionBase|0x75040000000
> gHisiTokenSpaceGuid.PcdHb1Rb5CpuMemRegionBase|0x79040000000
> gHisiTokenSpaceGuid.PcdHb1Rb6CpuMemRegionBase|0x408AA400000
> gHisiTokenSpaceGuid.PcdHb1Rb7CpuMemRegionBase|0x408AB400000
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
> index 79267e5..55c7f50 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
> @@ -646,10 +646,10 @@ Scope(_SB)
> Cacheable,
> ReadWrite,
> 0x0, // Granularity
> - 0x20000000, // Min Base Address
> + 0x40000000, // Min Base Address
> 0xefffffff, // Max Base Address
> 0x65000000000, // Translate
> - 0xd0000000 // Length
> + 0xb0000000 // Length
> )
> QWordIO (
> ResourceProducer,
> @@ -766,10 +766,10 @@ Scope(_SB)
> Cacheable,
> ReadWrite,
> 0x0, // Granularity
> - 0x30000000, // Min Base Address
> + 0x40000000, // Min Base Address
> 0xefffffff, // Max Base Address
> 0x75000000000, // Translate
> - 0xc0000000 // Length
> + 0xb0000000 // Length
> )
> QWordIO (
> ResourceProducer,
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 08/11] Hisilicon/D03: Disable the function of PerfTuning
2017-09-21 10:59 ` [PATCH edk2-platforms v3 08/11] Hisilicon/D03: Disable the function of PerfTuning Heyi Guo
@ 2017-09-21 13:07 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:07 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23, Chenhui Sun
On Thu, Sep 21, 2017 at 06:59:54PM +0800, Heyi Guo wrote:
> From: Chenhui Sun <chenhui.sun@linaro.org>
>
> The PerTuning function is not stable, it will cause the
> 3008/3108 crash, disable this function first.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Chenhui Sun <chenhui.sun@linaro.org>
I do not see any of my comments from previous revision addressed, and
I received no reply. Feedback was:
---
Should this not also delete the PciPerfTuning() function from
PcieInitLib.c, and the declaration of
gHisiTokenSpaceGuid.PcdIsPciPerfTuningEnable from HisiPkg.dec?
---
/
Leif
> ---
> Platform/Hisilicon/D03/D03.dsc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index fca6781..ac880d9 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -112,7 +112,7 @@
> # It could be set FALSE to save size.
> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
> - gHisiTokenSpaceGuid.PcdIsPciPerfTuningEnable|TRUE
> + gHisiTokenSpaceGuid.PcdIsPciPerfTuningEnable|FALSE
>
> [PcdsFixedAtBuild.common]
> gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"D03"
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 09/11] D05/ACPI: Disable D05 SAS0 and SAS2
2017-09-21 10:59 ` [PATCH edk2-platforms v3 09/11] D05/ACPI: Disable D05 SAS0 and SAS2 Heyi Guo
@ 2017-09-21 13:11 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:11 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23, Ming Huang
On Thu, Sep 21, 2017 at 06:59:55PM +0800, Heyi Guo wrote:
> From: Ming Huang <waip23@foxmail.com>
Can you ensure all "From: " tags use the proper huawei.com addresses?
Signed-off-by below is already correct.
Also, since you are sending these patches out, you should also add
your "Signed-off-by:" below that of the patch author. (Please double
check this on other patches where I have missed it.)
Apart from that, this patch is fine.
/
Leif
>
> There are no interface from SAS0 and SAS2 controller on D05,
> so SAS0 and SAS2 can't be use.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> ---
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
> index 93beb95..6455130 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
> @@ -88,6 +88,11 @@ Scope(_SB)
> Store(0x7ffff, CLK)
> Sleep(1)
> }
> +
> + Method (_STA, 0, NotSerialized)
> + {
> + Return (0x0)
> + }
> }
>
> Device(SAS1) {
> @@ -239,6 +244,11 @@ Scope(_SB)
> Store(0x7ffff, CLK)
> Sleep(1)
> }
> +
> + Method (_STA, 0, NotSerialized)
> + {
> + Return (0x0)
> + }
> }
>
> }
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 10/11] D05/ACPI: Modify I2C device
2017-09-21 10:59 ` [PATCH edk2-platforms v3 10/11] D05/ACPI: Modify I2C device Heyi Guo
@ 2017-09-21 13:12 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:12 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23, Ming Huang
On Thu, Sep 21, 2017 at 06:59:56PM +0800, Heyi Guo wrote:
> From: Ming Huang <waip23@foxmail.com>
From: Ming Huang <huangming23@huawei.com>
> 1. Disable I2C0 device avoiding access conflict in OS;
> 2. Modify _HID of I2C2 for matching the string in OS driver;
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
+ Signed-off-by: Heyi Guo
> ---
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl | 20 +-------------------
> 1 file changed, 1 insertion(+), 19 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl
> index eb906ef..3cc60d1 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl
> @@ -18,26 +18,8 @@
>
> Scope(_SB)
> {
> - Device(I2C0) {
> - Name(_HID, "APMC0D0F")
> - Name(_CID, "APMC0D0F")
> - Name(_CRS, ResourceTemplate() {
> - Memory32Fixed(ReadWrite, 0xd00e0000, 0x10000)
> - Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive, 0, "\\_SB.MBI6") { 705 }
> - })
> - Name (_DSD, Package () {
> - ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> - Package () {
> - Package () {"clock-frequency", 100000},
> - Package () {"i2c-sda-falling-time-ns", 913},
> - Package () {"i2c-scl-falling-time-ns", 303},
> - Package () {"i2c-sda-hold-time-ns", 0x9c2},
> - }
> - })
> - }
> -
> Device(I2C2) {
> - Name(_HID, "APMC0D0F")
> + Name(_HID, "HISI02A1")
> Name(_CID, "APMC0D0F")
> Name(_CRS, ResourceTemplate() {
> Memory32Fixed(ReadWrite, 0xd0100000, 0x10000)
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 11/11] Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device.
2017-09-21 10:59 ` [PATCH edk2-platforms v3 11/11] Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device Heyi Guo
@ 2017-09-21 13:14 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-21 13:14 UTC (permalink / raw)
To: Heyi Guo
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, waip23, Ming Huang
On Thu, Sep 21, 2017 at 06:59:57PM +0800, Heyi Guo wrote:
> From: Ming Huang <waip23@foxmail.com>
>
> 1. Because Hi161x chip doesn't support "ARI Forwarding Enable"
> function, BIOS will enumerate 32 same devices (Device Number 0~31)
> when attach a Non-ARI capable device in the RP. Hi161x chip will
> not fix it, need BIOS patch.
> 2. Just enlarge iatu for those root port with ARI capable device
> attached, Non-ARI capable device's RP, keep iatu limitation.
> 3. Remove previous temporary solution as below commit id:
> "7d157da88852cc91df2b11b10ade2edbbfbe77da"
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jason zhang <zhangjinsong2@huawei.com>
Please adjust + add email addresses.
The content below is fine.
/
Leif
> ---
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c | 1 +
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h | 7 ++
> Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 79 ++++++++++++++++++++
> 3 files changed, 87 insertions(+)
>
> diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
> index e3d3988..9fa3f84 100644
> --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
> +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
> @@ -839,6 +839,7 @@ NotifyPhase(
>
> case EfiPciHostBridgeEndEnumeration:
> PCIE_DEBUG("Case EfiPciHostBridgeEndEnumeration\n");
> + EnlargeAtuConfig0 (This);
> break;
>
> case EfiPciHostBridgeBeginBusAllocation:
> diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
> index cddda6b..c04361f 100644
> --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
> +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
> @@ -401,6 +401,9 @@ PreprocessController (
> #define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL
> #define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
>
> +#define INVALID_CAPABILITY_00 0x00
> +#define INVALID_CAPABILITY_FF 0xFF
> +#define PCI_CAPABILITY_POINTER_MASK 0xFC
>
> //
> // Driver Instance Data Prototypes
> @@ -518,4 +521,8 @@ RootBridgeConstructor (
> IN UINT32 Seg
> );
>
> +VOID
> +EnlargeAtuConfig0 (
> + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This
> + );
> #endif
> diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
> index 10d766a..b57bd51 100644
> --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
> +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
> @@ -14,6 +14,7 @@
> **/
>
> #include "PciHostBridge.h"
> +#include <IndustryStandard/PciExpress30.h>
> #include <Library/DevicePathLib.h>
> #include <Library/DmaLib.h>
> #include <Library/PciExpressLib.h>
> @@ -2322,3 +2323,81 @@ RootBridgeIoConfiguration (
> return EFI_SUCCESS;
> }
>
> +BOOLEAN
> +PcieCheckAriFwdEn (
> + UINTN PciBaseAddr
> + )
> +{
> + UINT8 PciPrimaryStatus;
> + UINT8 CapabilityOffset;
> + UINT8 CapId;
> + UINT8 TempData;
> +
> + PciPrimaryStatus = MmioRead16 (PciBaseAddr + PCI_PRIMARY_STATUS_OFFSET);
> +
> + if (PciPrimaryStatus & EFI_PCI_STATUS_CAPABILITY) {
> + CapabilityOffset = MmioRead8 (PciBaseAddr + PCI_CAPBILITY_POINTER_OFFSET);
> + CapabilityOffset &= PCI_CAPABILITY_POINTER_MASK;
> +
> + while ((CapabilityOffset != INVALID_CAPABILITY_00) && (CapabilityOffset != INVALID_CAPABILITY_FF)) {
> + CapId = MmioRead8 (PciBaseAddr + CapabilityOffset);
> + if (CapId == EFI_PCI_CAPABILITY_ID_PCIEXP) {
> + break;
> + }
> + CapabilityOffset = MmioRead8 (PciBaseAddr + CapabilityOffset + 1);
> + CapabilityOffset &= PCI_CAPABILITY_POINTER_MASK;
> + }
> + } else {
> + PCIE_DEBUG ("[%a:%d] - No PCIE Capability.\n", __FUNCTION__, __LINE__);
> + return FALSE;
> + }
> +
> + if ((CapabilityOffset == INVALID_CAPABILITY_FF) || (CapabilityOffset == INVALID_CAPABILITY_00)) {
> + PCIE_DEBUG ("[%a:%d] - No PCIE Capability.\n", __FUNCTION__, __LINE__);
> + return FALSE;
> + }
> +
> + TempData = MmioRead16 (PciBaseAddr + CapabilityOffset +
> + EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET);
> + TempData &= EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING;
> +
> + if (TempData == EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING) {
> + return TRUE;
> + } else {
> + return FALSE;
> + }
> +}
> +
> +VOID
> +EnlargeAtuConfig0 (
> + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This
> + )
> +{
> + UINTN RbPciBase;
> + UINT64 MemLimit;
> + LIST_ENTRY *List;
> + PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
> + PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
> +
> + PCIE_DEBUG ("In Enlarge RP iatu Config 0.\n");
> +
> + HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
> + List = HostBridgeInstance->Head.ForwardLink;
> +
> + while (List != &HostBridgeInstance->Head) {
> + PCIE_DEBUG ("HostBridge has data.\n");
> + RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
> +
> + RbPciBase = RootBridgeInstance->RbPciBar;
> +
> + // Those ARI FWD Enable Root Bridge, need enlarge iatu window.
> + if (PcieCheckAriFwdEn (RbPciBase)) {
> + MemLimit = GetPcieCfgAddress (RootBridgeInstance->Ecam,
> + RootBridgeInstance->BusBase + 2, 0, 0, 0)
> + - 1;
> + MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_VIEW_POINT, 1);
> + MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_LIMIT, (UINT32) MemLimit);
> + }
> + List = List->ForwardLink;
> + }
> +}
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix.
2017-09-21 12:40 ` Leif Lindholm
@ 2017-09-21 13:32 ` Ard Biesheuvel
2017-09-22 3:20 ` Heyi Guo
0 siblings, 1 reply; 41+ messages in thread
From: Ard Biesheuvel @ 2017-09-21 13:32 UTC (permalink / raw)
To: Leif Lindholm
Cc: Heyi Guo, linaro-uefi, edk2-devel@lists.01.org, Graeme Gregory,
guoheyi@huawei.com, wanghuiqiang, huangming, Jason Zhang, waip23
On 21 September 2017 at 05:40, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Thu, Sep 21, 2017 at 06:59:39PM +0800, Heyi Guo wrote:
>> Code can also be found in github:
>> https://github.com/hisilicon/OpenPlatformPkg.git
>> branch: rp-1710-platforms-v3 rp-1710-osi-v3
>
> This is looking a lot better, thanks.
> But it could be useful to have a separate cover letter for the
> edk2-non-osi patches.
>
>> Note: If occurs BIOS boot hang up issue, please revert below commit to fix:
>> "2f03dc8"
>
> Can you give more information?
> 2f03dc8 is "Silicon/Hisilicon: switch to NonDiscoverable driver for
> EHCI".
>
If that patch broke your platform, you should probably have mentioned
this when it was sent out for review. (Apologies if I failed to CC
you, but I think I probably did)
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix.
2017-09-21 13:32 ` Ard Biesheuvel
@ 2017-09-22 3:20 ` Heyi Guo
0 siblings, 0 replies; 41+ messages in thread
From: Heyi Guo @ 2017-09-22 3:20 UTC (permalink / raw)
To: Ard Biesheuvel, Leif Lindholm
Cc: linaro-uefi, edk2-devel@lists.01.org, Graeme Gregory,
guoheyi@huawei.com, wanghuiqiang, huangming, Jason Zhang, waip23
Sorry we didn't catch up the community updates for several months...
Actually this is a really good change for ARM MMIO controllers and we
appreciate your patches to improve D0x platforms. There may be some
minor issue (or even in SoC IP) that causes D05 into exception, which
was just found when we updated edk2 and edk2-platforms these days, and
we have not enough time to find the root cause yet.
We will continue to investigate the issue and let you know the result.
Regards,
Heyi Guo
在 9/21/2017 9:32 PM, Ard Biesheuvel 写道:
> On 21 September 2017 at 05:40, Leif Lindholm <leif.lindholm@linaro.org> wrote:
>> On Thu, Sep 21, 2017 at 06:59:39PM +0800, Heyi Guo wrote:
>>> Code can also be found in github:
>>> https://github.com/hisilicon/OpenPlatformPkg.git
>>> branch: rp-1710-platforms-v3 rp-1710-osi-v3
>> This is looking a lot better, thanks.
>> But it could be useful to have a separate cover letter for the
>> edk2-non-osi patches.
>>
>>> Note: If occurs BIOS boot hang up issue, please revert below commit to fix:
>>> "2f03dc8"
>> Can you give more information?
>> 2f03dc8 is "Silicon/Hisilicon: switch to NonDiscoverable driver for
>> EHCI".
>>
> If that patch broke your platform, you should probably have mentioned
> this when it was sent out for review. (Apologies if I failed to CC
> you, but I think I probably did)
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: 答复: [PATCH edk2-non-osi v3 6/7] Hisilicon/D05: Update binary file
[not found] ` <3A622B96E322004395454DF73A38DDFA75577D70@dggemm508-mbx.china.huawei.com>
@ 2017-09-22 9:55 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-22 9:55 UTC (permalink / raw)
To: Huangming (Mark)
Cc: Heyi Guo, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org,
graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, Guoheyi,
wanghuiqiang, zhangjinsong (A), waip23@126.com, Mengfanrong
On Fri, Sep 22, 2017 at 09:36:48AM +0000, Huangming (Mark) wrote:
> See below reply please
>
> -----邮件原件-----
> 发件人: Leif Lindholm [mailto:leif.lindholm@linaro.org]
> 发送时间: 2017年9月21日 21:00
> 收件人: Heyi Guo <heyi.guo@linaro.org>
> 抄送: linaro-uefi@lists.linaro.org; edk2-devel@lists.01.org; graeme.gregory@linaro.org; ard.biesheuvel@linaro.org; Guoheyi <guoheyi@huawei.com>; wanghuiqiang <wanghuiqiang@huawei.com>; Huangming (Mark) <huangming23@huawei.com>; zhangjinsong (A) <zhangjinsong2@huawei.com>; waip23@126.com
> 主题: Re: [PATCH edk2-non-osi v3 6/7] Hisilicon/D05: Update binary file
>
> On Thu, Sep 21, 2017 at 06:59:51PM +0800, Heyi Guo wrote:
> > Fix bug 3061: D05(before EC) boot hangs at "Need Reset";
> >
> > Update binary file for edk2 upgrade.
> > 1. Replace UncachedMemoryAllocationLib with DmaLib;
> > 2. Remove ArmCpuLib dependenc;
> > 3. Remove ConvertToPhysicalAddress;
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Ming Huang <huangming23@huawei.com>
> > ---
> > Platform/Hisilicon/D05/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi | Bin 19552 -> 5024 bytes
> > Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.efi | Bin 25696 -> 7680 bytes
> > Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi | Bin 22528 -> 5344 bytes
> > Platform/Hisilicon/D05/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi | Bin 23136 -> 5280 bytes
> > Platform/Hisilicon/D05/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi | Bin 15968 -> 2592 bytes
> > Platform/Hisilicon/D05/Drivers/OhciDxe/NativeOhci.efi | Bin 48000 -> 23328 bytes
> > Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi | Bin 21536 -> 4032 bytes
> > Platform/Hisilicon/D05/Drivers/SFC/SFCDriver.efi | Bin 262144 -> 262144 bytes
> > Platform/Hisilicon/D05/Drivers/Sas/SasDriverDxe.efi | Bin 230912 -> 116288 bytes
> > Platform/Hisilicon/D05/Drivers/Sm750Dxe/SmiGraphicsOutput.efi | Bin 35904 -> 18592 bytes
> > Platform/Hisilicon/D05/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi | Bin 16576 -> 4288 bytes
> > Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.lib | Bin 42136 -> 52968 bytes
> > Platform/Hisilicon/D05/MemoryInitPei/MemoryInit.efi | Bin 273312 -> 152576 bytes
>
> > Platform/Hisilicon/D05/Sec/FVMAIN_SEC.Fv | Bin 262144 -> 262144 bytes
> > Platform/Hisilicon/D05/bl1.bin | Bin 12296 -> 14344 bytes
> > Platform/Hisilicon/D05/fip.bin | Bin 41493 -> 41493 bytes
>
> Like for D03 - I guess this means ARM Trusted Firmware update. Can it be a separate patch and describe the commit hash it was produced from?
> -- FVMAIN_SEC.Fv use some edk2 lib, so it is related with edk2 update.
> I will make sepatate patch for Other two bin files.
Understood. Yes, please do so.
> Do you mean that I should add commitId in the separate patch ? like "126aef8"?
Yes, please.
> Does the (bugs.linaro.org) 3061 fix also belong to these files?
> -- Yes
OK, then please delete that note from commit message in this patch and
add it in the new one. Please include the full URL to the bug.
Regards,
Leif
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: 答复: [PATCH edk2-non-osi v3 2/7] Hisilicon/D03/Sas: Add SasPlatform
[not found] ` <3A622B96E322004395454DF73A38DDFA75577DB2@dggemm508-mbx.china.huawei.com>
@ 2017-09-23 16:52 ` Leif Lindholm
0 siblings, 0 replies; 41+ messages in thread
From: Leif Lindholm @ 2017-09-23 16:52 UTC (permalink / raw)
To: Huangming (Mark)
Cc: Heyi Guo, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org,
graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, Guoheyi,
wanghuiqiang, zhangjinsong (A), waip23@126.com, Mengfanrong
On Fri, Sep 22, 2017 at 10:51:37AM +0000, Huangming (Mark) wrote:
> It is not enough time for open the source code this time. There is a
> process for open source and is defferenc from old process.
> SasPlatform and SnpPlatform will open source the next upstream.
Yes, this is fine, given the timescales.
I just wanted to clarify the longer term plan.
Best Regards,
Leif
>
> -----邮件原件-----
> 发件人: Leif Lindholm [mailto:leif.lindholm@linaro.org]
> 发送时间: 2017年9月21日 20:50
> 收件人: Heyi Guo <heyi.guo@linaro.org>
> 抄送: linaro-uefi@lists.linaro.org; edk2-devel@lists.01.org; graeme.gregory@linaro.org; ard.biesheuvel@linaro.org; Guoheyi <guoheyi@huawei.com>; wanghuiqiang <wanghuiqiang@huawei.com>; Huangming (Mark) <huangming23@huawei.com>; zhangjinsong (A) <zhangjinsong2@huawei.com>; waip23@126.com
> 主题: Re: [PATCH edk2-non-osi v3 2/7] Hisilicon/D03/Sas: Add SasPlatform
>
> On Thu, Sep 21, 2017 at 06:59:43PM +0800, Heyi Guo wrote:
> > Install protocol to enable sas port which is using and transmit base
> > address info of sas port to SasDriverDxe.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Ming Huang <huangming23@huawei.com>
>
> On the whole, I'm OK with this - but:
>
> 1) This looks like a very simple piece of code, at a low risk to
> reveal anything confidential about Hisilicon IP. Can this be
> made open source?
>
> > ---
> > Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi | Bin 0 ->
> > 3040 bytes Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
> > | 24 ++++++++++++++++++++
> > 2 files changed, 24 insertions(+)
> >
> > diff --git
> > a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi
> > b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi
> > new file mode 100644
> > index 0000000..4255641
> > Binary files /dev/null and
> > b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi differ
> > diff --git
> > a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
> > b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
> > new file mode 100644
> > index 0000000..636be19
> > --- /dev/null
> > +++ b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
> > @@ -0,0 +1,24 @@
> > +#/** @file
> > +#
> > +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> > +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> > +#
> > +# This program and the accompanying materials
> > +# are licensed and made available under the terms and conditions of the BSD License
> > +# which accompanies this distribution. The full text of the license may be found at
> > +# http://opensource.org/licenses/bsd-license.php
> > +#
> > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> > +#
> > +#**/
> > +
> > +[Defines]
> > + INF_VERSION = 0x00010019
> > + BASE_NAME = SasPlatform
> > + FILE_GUID = 102D8FC9-20a4-42EB-aC14-1C98BA5b26A4
> > + MODULE_TYPE = DXE_DRIVER
> > + VERSION_STRING = 1.0
> > +
> > +[Binaries]
>
> 2) [Binaries.AARCH64]
>
> > + PE32|SasPlatform.efi|*
> > --
> > 1.9.1
> >
^ permalink raw reply [flat|nested] 41+ messages in thread
end of thread, other threads:[~2017-09-23 16:49 UTC | newest]
Thread overview: 41+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-09-21 10:59 [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix Heyi Guo
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 1/7] Hisilicon/D03/Net: Update Snp driver Heyi Guo
2017-09-21 12:51 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 01/11] Hisilicon/D05: Modify dsc and fdf file Heyi Guo
2017-09-21 13:01 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 02/11] Hisilicon/D03: " Heyi Guo
2017-09-21 13:02 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 2/7] Hisilicon/D03/Sas: Add SasPlatform Heyi Guo
2017-09-21 12:49 ` Leif Lindholm
[not found] ` <3A622B96E322004395454DF73A38DDFA75577DB2@dggemm508-mbx.china.huawei.com>
2017-09-23 16:52 ` 答复: " Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 3/7] Hisilicon/D03: Update binary file Heyi Guo
2017-09-21 12:54 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 03/11] Hisilicon: Fix the drivers use the same GUID issue Heyi Guo
2017-09-21 10:59 ` [PATCH edk2-platforms v3 04/11] Hisilicon D03/D05: get firmware version from FIRMWARE_VER Heyi Guo
2017-09-21 13:03 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 4/7] Hisilicon/D05/Net: Update Snp driver Heyi Guo
2017-09-21 12:56 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 5/7] Hisilicon/D05/Sas: Add SasPlatform Heyi Guo
2017-09-21 13:00 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 05/11] Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase Heyi Guo
2017-09-21 12:57 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 06/11] Hisilicon/D05/Pcie: fix bug of size definition Heyi Guo
2017-09-21 13:04 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 6/7] Hisilicon/D05: Update binary file Heyi Guo
2017-09-21 12:59 ` Leif Lindholm
[not found] ` <3A622B96E322004395454DF73A38DDFA75577D70@dggemm508-mbx.china.huawei.com>
2017-09-22 9:55 ` 答复: " Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 07/11] D05/PCIe: Modify PcieRegionBase of secondary chip Heyi Guo
2017-09-21 13:04 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-non-osi v3 7/7] Hisilicon: Fix the drivers use the same GUID issue Heyi Guo
2017-09-21 10:59 ` [PATCH edk2-platforms v3 08/11] Hisilicon/D03: Disable the function of PerfTuning Heyi Guo
2017-09-21 13:07 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 09/11] D05/ACPI: Disable D05 SAS0 and SAS2 Heyi Guo
2017-09-21 13:11 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 10/11] D05/ACPI: Modify I2C device Heyi Guo
2017-09-21 13:12 ` Leif Lindholm
2017-09-21 10:59 ` [PATCH edk2-platforms v3 11/11] Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device Heyi Guo
2017-09-21 13:14 ` Leif Lindholm
2017-09-21 12:11 ` [PATCH edk2-platforms v3 00/11] Update D03/D05 binary for edk2 update and bug fix graeme.gregory
2017-09-21 12:40 ` Leif Lindholm
2017-09-21 13:32 ` Ard Biesheuvel
2017-09-22 3:20 ` Heyi Guo
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