From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1B30521ECCB13 for ; Thu, 21 Sep 2017 20:41:46 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Sep 2017 20:44:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,426,1500966000"; d="scan'208";a="1017219550" Received: from jyao1-mobl.ccr.corp.intel.com ([10.239.196.163]) by orsmga003.jf.intel.com with ESMTP; 21 Sep 2017 20:44:52 -0700 From: Jiewen Yao To: edk2-devel@lists.01.org Cc: Star Zeng Date: Fri, 22 Sep 2017 11:44:44 +0800 Message-Id: <1506051885-21008-3-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1506051885-21008-1-git-send-email-jiewen.yao@intel.com> References: <1506051885-21008-1-git-send-email-jiewen.yao@intel.com> Subject: [PATCH 2/3] IntelSiliconPkg/dec: Clarify VTdPolicy. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Sep 2017 03:41:46 -0000 Clarify the VTdPolicy is for both PEI and DXE. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao --- IntelSiliconPkg/IntelSiliconPkg.dec | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/IntelSiliconPkg/IntelSiliconPkg.dec b/IntelSiliconPkg/IntelSiliconPkg.dec index 941380a..b88630d 100644 --- a/IntelSiliconPkg/IntelSiliconPkg.dec +++ b/IntelSiliconPkg/IntelSiliconPkg.dec @@ -48,8 +48,8 @@ gIntelSiliconPkgTokenSpaceGuid.PcdIntelGraphicsVbtFileGuid|{ 0xa9, 0x2d, 0x75, 0x56, 0x6b, 0xde, 0x95, 0x48, 0x88, 0x19, 0x19, 0x45, 0xb6, 0xb7, 0x6c, 0x22 }|VOID*|0x00000001 ## The mask is used to control VTd behavior.

- # BIT0: Enable IOMMU during boot. - # BIT1: Enable IOMMU on exit boot service. + # BIT0: Enable IOMMU during boot (If DMAR table is installed in DXE. If VTD_INFO_PPI is installed in PEI.) + # BIT1: Enable IOMMU when transfer control to OS (ExitBootService in normal boot. EndOfPEI in S3) # @Prompt The policy for VTd driver behavior. gIntelSiliconPkgTokenSpaceGuid.PcdVTdPolicyPropertyMask|1|UINT8|0x00000002 -- 2.7.4.windows.1