From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1878C21ECCB19 for ; Thu, 21 Sep 2017 20:41:47 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Sep 2017 20:44:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,426,1500966000"; d="scan'208";a="1017219556" Received: from jyao1-mobl.ccr.corp.intel.com ([10.239.196.163]) by orsmga003.jf.intel.com with ESMTP; 21 Sep 2017 20:44:53 -0700 From: Jiewen Yao To: edk2-devel@lists.01.org Cc: Star Zeng Date: Fri, 22 Sep 2017 11:44:45 +0800 Message-Id: <1506051885-21008-4-git-send-email-jiewen.yao@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1506051885-21008-1-git-send-email-jiewen.yao@intel.com> References: <1506051885-21008-1-git-send-email-jiewen.yao@intel.com> Subject: [PATCH 3/3] IntelSiliconPkg/VTdPmrPei: Add EndOfPei callback for S3 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Sep 2017 03:41:47 -0000 In S3 resume, before system transfer to waking vector, the VTdPrm need turn off VTd protection based upon VTdPolicy. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao --- IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c | 59 +++++++++++++++++++- IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf | 1 + 2 files changed, 58 insertions(+), 2 deletions(-) diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c index e768274..3fe6d65 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c @@ -24,16 +24,18 @@ #include #include #include +#include #include "IntelVTdPmrPei.h" #define TOTAL_DMA_BUFFER_SIZE SIZE_4MB +#define TOTAL_DMA_BUFFER_SIZE_S3 SIZE_1MB EFI_ACPI_DMAR_HEADER *mAcpiDmarTable; VTD_INFO *mVTdInfo; UINT64 mEngineMask; UINTN mDmaBufferBase; -UINTN mDmaBufferSize = TOTAL_DMA_BUFFER_SIZE; +UINTN mDmaBufferSize; UINTN mDmaBufferCurrentTop; UINTN mDmaBufferCurrentBottom; @@ -544,6 +546,7 @@ InitDmaProtection ( } ASSERT (DmaBufferSize == ALIGN_VALUE(DmaBufferSize, MemoryAlignment)); *DmaBufferBase = (UINTN)AllocateAlignedPages (EFI_SIZE_TO_PAGES(DmaBufferSize), MemoryAlignment); + ASSERT (*DmaBufferBase != 0); if (*DmaBufferBase == 0) { DEBUG ((DEBUG_INFO, " InitDmaProtection : OutOfResource\n")); return EFI_OUT_OF_RESOURCES; @@ -1105,6 +1108,41 @@ ParseDmarAcpiTableRmrr ( } /** + This function handles S3 resume task at the end of PEI + + @param[in] PeiServices Pointer to PEI Services Table. + @param[in] NotifyDesc Pointer to the descriptor for the Notification event that + caused this function to execute. + @param[in] Ppi Pointer to the PPI data associated with this function. + + @retval EFI_STATUS Always return EFI_SUCCESS +**/ +EFI_STATUS +EFIAPI +S3EndOfPeiNotify( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc, + IN VOID *Ppi + ) +{ + UINT64 EngineMask; + + DEBUG((DEBUG_INFO, "VTdPmr S3EndOfPeiNotify\n")); + + if ((PcdGet8(PcdVTdPolicyPropertyMask) & BIT1) == 0) { + EngineMask = LShiftU64 (1, mVTdInfo->VTdEngineCount) - 1; + DisableDmaProtection (EngineMask); + } + return EFI_SUCCESS; +} + +EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc = { + (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), + &gEfiEndOfPeiSignalPpiGuid, + S3EndOfPeiNotify +}; + +/** Initializes the Intel VTd PMR PEIM. @param FileHandle Handle of the file being invoked. @@ -1122,11 +1160,14 @@ IntelVTdPmrInitialize ( ) { EFI_STATUS Status; + EFI_BOOT_MODE BootMode; if ((PcdGet8(PcdVTdPolicyPropertyMask) & BIT0) == 0) { return EFI_UNSUPPORTED; } + PeiServicesGetBootMode (&BootMode); + Status = PeiServicesLocatePpi ( &gEdkiiVTdInfoPpiGuid, 0, @@ -1150,6 +1191,13 @@ IntelVTdPmrInitialize ( // ParseDmarAcpiTableRmrr (); + if (BootMode == BOOT_ON_S3_RESUME) { + mDmaBufferSize = TOTAL_DMA_BUFFER_SIZE_S3; + } else { + mDmaBufferSize = TOTAL_DMA_BUFFER_SIZE; + } + DEBUG ((DEBUG_INFO, " DmaBufferSize : 0x%x\n", mDmaBufferSize)); + // // Find a pre-memory in resource hob as DMA buffer // Mark PEI memory to be DMA protected. @@ -1160,7 +1208,6 @@ IntelVTdPmrInitialize ( } DEBUG ((DEBUG_INFO, " DmaBufferBase : 0x%x\n", mDmaBufferBase)); - DEBUG ((DEBUG_INFO, " DmaBufferSize : 0x%x\n", mDmaBufferSize)); mDmaBufferCurrentTop = mDmaBufferBase + mDmaBufferSize; mDmaBufferCurrentBottom = mDmaBufferBase; @@ -1171,6 +1218,14 @@ IntelVTdPmrInitialize ( Status = PeiServicesInstallPpi (&mIoMmuPpiList); ASSERT_EFI_ERROR(Status); + // + // Register EndOfPei Notify for S3 to run FSP NotifyPhase + // + if (BootMode == BOOT_ON_S3_RESUME) { + Status = PeiServicesNotifyPpi (&mS3EndOfPeiNotifyDesc); + ASSERT_EFI_ERROR (Status); + } + return Status; } diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf index 86cd7d1..e1aa980 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf @@ -46,6 +46,7 @@ [Ppis] gEdkiiIoMmuPpiGuid ## PRODUCES gEdkiiVTdInfoPpiGuid ## CONSUMES + gEfiEndOfPeiSignalPpiGuid ## CONSUMES [Pcd] gIntelSiliconPkgTokenSpaceGuid.PcdVTdPolicyPropertyMask ## CONSUMES -- 2.7.4.windows.1