[platforms: PATCH 00/10] Armada 70x0/80x0 SPI improvements

[platforms: PATCH 00/10] Armada 70x0/80x0 SPI improvements

[Marcin Wojtas]

Hi,

Finally I found time to respin SPI patchset. As agreed, I extracted
style fixes from dynamic flash detection patch, but its main part
is kept aside for now until FlashId table (and additionally both SPI
protocols land in the edk2 mainline). A lot of minor fixes were
implemented, details can be found in the commit logs and changelog
below.

Patches are available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/spi-upstream-r20170925

I'm looking forward to the comments or remarks.

Best regards,
Marcin

Changelog
v1 -> v2
Slightly improve commit log prefixes.

1/10
* Move documentation to Silicon/Marvell
* Update PortingGuide with new paths in edk2-platforms repository

2/10
* Correct error print

4/10
* Sort PCDs

7/10
* Simplify change and remove additional local variable

8/10
* Correct FileSize type and let it really compile for ARM and AARCH64

9/10
* modify macros -> s/SPI_ERASE_SIZE_/SIZE_/

10/10
* New patch

3/10, 5/10, 6/10
* Add Reviewed-by's

Ard Biesheuvel (3):
  Marvell/Applications/SpiTool: Fix bug in error test
  Marvell/Applications/FirmwareUpdate: Fix 32-bit issues
  Marvell/Applications/SpiTool: Fix 32-bit issues

Joe Zhou (1):
  Marvell/Drivers: MvSpiDxe: Fix write bug

Marcin Wojtas (4):
  Marvell/Applications/SpiTool: Enable configurable CS and SCLK mode
  Platform/Marvell/Armada70x0: set CS and SCLK Mode for SPI flash
  Marvell/Drivers: MvSpiFlash: Fix usage of erase size parameter
  Marvell/Drivers: MvSpiFlash: Minor style fix

Nir Erez (1):
  Silicon/Marvell: Refactor Documentation

Piotr Król (1):
  Marvell/Drivers: MvSpiDxe: Log and return correct error

 Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c       |   6 +-
 Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c          |  13 +-
 Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf        |   2 +
 Platform/Marvell/Armada/Armada70x0.dsc                       |   2 +
 Platform/Marvell/Documentation/Drivers/EepromDriver.txt      |  96 -----
 Platform/Marvell/Documentation/Drivers/I2cDriver.txt         |  64 ----
 Platform/Marvell/Documentation/Drivers/SpiDriver.txt         | 116 ------
 Platform/Marvell/Documentation/PortingGuide/ComPhy.txt       |  45 ---
 Platform/Marvell/Documentation/PortingGuide/I2c.txt          |  20 --
 Platform/Marvell/Documentation/PortingGuide/Mdio.txt         |   7 -
 Platform/Marvell/Documentation/PortingGuide/Mpp.txt          |  48 ---
 Platform/Marvell/Documentation/PortingGuide/PciEmulation.txt |  31 --
 Platform/Marvell/Documentation/PortingGuide/Phy.txt          |  45 ---
 Platform/Marvell/Documentation/PortingGuide/Pp2.txt          |  35 --
 Platform/Marvell/Documentation/PortingGuide/Reset.txt        |   7 -
 Platform/Marvell/Documentation/PortingGuide/Spi.txt          |  16 -
 Platform/Marvell/Documentation/PortingGuide/SpiFlash.txt     |  23 --
 Platform/Marvell/Documentation/PortingGuide/Utmi.txt         |  35 --
 Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c            |  36 +-
 Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h            |   6 +
 Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf          |   1 +
 Platform/Marvell/Drivers/Spi/MvSpiDxe.c                      |   6 +-
 Platform/Marvell/Marvell.dec                                 |   3 +
 Silicon/Marvell/Documentation/Drivers/EepromDriver.txt       |  96 +++++
 Silicon/Marvell/Documentation/Drivers/I2cDriver.txt          |  64 ++++
 Silicon/Marvell/Documentation/Drivers/SpiDriver.txt          | 116 ++++++
 Silicon/Marvell/Documentation/PortingGuide.txt               | 377 ++++++++++++++++++++
 27 files changed, 707 insertions(+), 609 deletions(-)
 delete mode 100644 Platform/Marvell/Documentation/Drivers/EepromDriver.txt
 delete mode 100644 Platform/Marvell/Documentation/Drivers/I2cDriver.txt
 delete mode 100644 Platform/Marvell/Documentation/Drivers/SpiDriver.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/ComPhy.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/I2c.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Mdio.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Mpp.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/PciEmulation.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Phy.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Pp2.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Reset.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Spi.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/SpiFlash.txt
 delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Utmi.txt
 create mode 100644 Silicon/Marvell/Documentation/Drivers/EepromDriver.txt
 create mode 100644 Silicon/Marvell/Documentation/Drivers/I2cDriver.txt
 create mode 100644 Silicon/Marvell/Documentation/Drivers/SpiDriver.txt
 create mode 100644 Silicon/Marvell/Documentation/PortingGuide.txt

-- 
1.8.3.1

[platforms: PATCH 01/10] Silicon/Marvell: Refactor Documentation

[Marcin Wojtas]

From: Nir Erez <nerez@marvell.com>

This patch introduces following improvements to the PortingGuide
* Replace split documentation with single file
* Update paths to new directory structure in edk2-platforms
* Align format to Doxygen constraints

Moreover the PortingGuide and remaining Drivers' documentation
is moved to the new location under Silicon/Marvell, where in future
all other bits of the support will be moved.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Documentation/Drivers/EepromDriver.txt      |  96 -----
 Platform/Marvell/Documentation/Drivers/I2cDriver.txt         |  64 ----
 Platform/Marvell/Documentation/Drivers/SpiDriver.txt         | 116 ------
 Platform/Marvell/Documentation/PortingGuide/ComPhy.txt       |  45 ---
 Platform/Marvell/Documentation/PortingGuide/I2c.txt          |  20 --
 Platform/Marvell/Documentation/PortingGuide/Mdio.txt         |   7 -
 Platform/Marvell/Documentation/PortingGuide/Mpp.txt          |  48 ---
 Platform/Marvell/Documentation/PortingGuide/PciEmulation.txt |  31 --
 Platform/Marvell/Documentation/PortingGuide/Phy.txt          |  45 ---
 Platform/Marvell/Documentation/PortingGuide/Pp2.txt          |  35 --
 Platform/Marvell/Documentation/PortingGuide/Reset.txt        |   7 -
 Platform/Marvell/Documentation/PortingGuide/Spi.txt          |  16 -
 Platform/Marvell/Documentation/PortingGuide/SpiFlash.txt     |  23 --
 Platform/Marvell/Documentation/PortingGuide/Utmi.txt         |  35 --
 Silicon/Marvell/Documentation/Drivers/EepromDriver.txt       |  96 +++++
 Silicon/Marvell/Documentation/Drivers/I2cDriver.txt          |  64 ++++
 Silicon/Marvell/Documentation/Drivers/SpiDriver.txt          | 116 ++++++
 Silicon/Marvell/Documentation/PortingGuide.txt               | 373 ++++++++++++++++++++
 18 files changed, 649 insertions(+), 588 deletions(-)

diff --git a/Platform/Marvell/Documentation/Drivers/EepromDriver.txt b/Platform/Marvell/Documentation/Drivers/EepromDriver.txt
deleted file mode 100644
index d3b3b9f..0000000
--- a/Platform/Marvell/Documentation/Drivers/EepromDriver.txt
+++ /dev/null
@@ -1,96 +0,0 @@
-1. Introduction
----------------
-**MvEeprom** driver creates MARVELL_EEPROM_PROTOCOL, which
-+is used for managing eeprom.
-
-2. MvEeprom driver design
--------------------------
-Every I2C device driver should implement EFI_DRIVER_BINDING_PROTOCOL and
-consume EFI_I2C_IO_PROTOCOL for transactions on I2C bus. MvEeprom driver
-additionally implements MARVELL_EEPROM_PROTOCOL.
-
-  2.1 EFI_DRIVER_BINDING_PROTOCOL
-  -------------------------------
-  Driver Binding protocol is extensively covered in UEFI documentation, as
-  it is not specific to I2C stack. The only difference is that Supported()
-  function should check if EFI_I2C_IO_PROTOCOL provides valid EFI_GUID and
-  DeviceIndex values.
-  Excerpt from MvEepromSupported():
-
-    Status = gBS->OpenProtocol (
-                    ControllerHandle,
-                    &gEfiI2cIoProtocolGuid,
-                    (VOID **) &TmpI2cIo,
-                    gImageHandle,
-                    ControllerHandle,
-                    EFI_OPEN_PROTOCOL_BY_DRIVER
-                    );
-    if (EFI_ERROR(Status)) {
-      return EFI_UNSUPPORTED;
-    }
-
-    /* get EEPROM devices' addresses from PCD */
-    EepromAddresses = PcdGetPtr (PcdEepromI2cAddresses);
-    if (EepromAddresses == 0) {
-      Status = EFI_UNSUPPORTED;
-      goto out;
-    }
-
-    Status = EFI_UNSUPPORTED;
-    for (i = 0; EepromAddresses[i] != '\0'; i++) {
-      /* I2C guid must fit and valid DeviceIndex must be provided */
-      if (CompareGuid(TmpI2cIo->DeviceGuid, &I2cGuid) &&
-          TmpI2cIo->DeviceIndex == EepromAddresses[i]) {
-        DEBUG((DEBUG_INFO, "A8kEepromSupported: attached to EEPROM device\n"));
-        Status = EFI_SUCCESS;
-        break;
-      }
-    }
-
-  2.2 EFI_I2C_IO_PROTOCOL
-  -----------------------
-  This protocol is provided by generic I2C stack. Multiple drivers can use IO
-  protocol at once, as queueing is implemented.
-
-  QueueRequest is a routine that queues an I2C transaction to the I2C
-  controller for execution on the I2C bus.
-
-  2.3 MARVELL_EEPROM_PROTOCOL
-  -----------------------
-    typedef struct _MARVELL_EEPROM_PROTOCOL MARVELL_EEPROM_PROTOCOL;
-
-    #define EEPROM_READ   0x1
-    #define EEPROM_WRITE  0x0
-    typedef
-    EFI_STATUS
-    (EFIAPI *EFI_EEPROM_TRANSFER) (
-      IN CONST MARVELL_EEPROM_PROTOCOL  *This,
-      IN UINT16                     Address,
-      IN UINT32                     Length,
-      IN UINT8                      *Buffer,
-      IN UINT8                      Operation
-      );
-
-    struct _MARVELL_EEPROM_PROTOCOL {
-      EFI_EEPROM_TRANSFER Transfer;
-      UINT8 Identifier;
-    };
-
-3. Adding new I2C slave device drivers
---------------------------------------
-In order to support I2C slave device other than EEPROM, new driver should
-be created. Required steps follow.
-
-  1. Create driver directory (Platform/Marvell/Drivers/I2c/Devices/...).
-  2. Create stubs of .inf and .c files (MvEeprom files are a reference),
-     include .inf file in platform .dsc and .fdf files.
-  3. Implement EFI_DRIVER_BINDING_PROTOCOL - Start(), Stop(), Supported()
-     functions' implementation is a must. EFI_DRIVER_BINDING_PROTOCOL
-     should be installed at driver's entry point.
-  4. Add I2C address of device to PcdI2cSlaveAddresses in .dsc file.
-  5. Test available EFI_I2C_IO_PROTOCOLs in Supported() - find instance
-     with valid GUID and DeviceIndex (I2C slave address).
-  6. Open EFI_I2C_IO_PROTOCOL for usage in Start(). After that, QueueRequest
-     function should be available.
-  7. Implement core functionality of driver (using QueueRequest to access I2C).
-  8. (not mandatory) Produce/consume additional protocols.
diff --git a/Platform/Marvell/Documentation/Drivers/I2cDriver.txt b/Platform/Marvell/Documentation/Drivers/I2cDriver.txt
deleted file mode 100644
index 2f890de..0000000
--- a/Platform/Marvell/Documentation/Drivers/I2cDriver.txt
+++ /dev/null
@@ -1,64 +0,0 @@
-1. Introduction
----------------
-**MvI2cDxe** is a driver supporting I2C controller on Marvell SOCs boards.
-It is connected through protocols to generic UEFI I2C stack, which exposes
-IO functionality to drivers of specific devices on I2C bus.
-
-2. MvI2cDxe driver design
---------------------------
-MvI2cDxe produces several protocols from generic I2C stack:
- - EFI_I2C_MASTER_PROTOCOL,
- - EFI_I2C_ENUMERATE_PROTOCOL,
- - EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL
- - general-purpose EFI_DRIVER_BINDING_PROTOCOL.
-
-  2.1 EFI_I2C_MASTER_PROTOCOL
-  ---------------------------
-  This is the most important protocol produced by MvI2cDxe. Following functions
-  are implemented:
-
-      ///
-      /// Reset the I2C host controller.
-      ///
-      EFI_I2C_MASTER_PROTOCOL_RESET             Reset;
-
-      ///
-      /// Start an I2C transaction in master mode on the host controller.
-      ///
-      EFI_I2C_MASTER_PROTOCOL_START_REQUEST     StartRequest;
-
-    StartRequest and Reset functions are used by I2cHost.
-    These should **not** be used by I2C device drivers - required
-    synchronization is not provided. Instead, members of EFI_I2C_IO_PROTOCOL
-    should be used.
-
-  2.2 EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL
-  -------------------------------------------------
-  The only function exposed via this protocol is MvI2cEnableConf. It is
-  required by I2C stack in order to allow changing I2C bus configuration from
-  device drivers.
-
-  2.3 EFI_I2C_ENUMERATE_PROTOCOL
-  ------------------------------
-  Provides Enumerate function, which is used by I2cBus code as an iterator over
-  devices on I2C bus.
-
-    typedef
-    EFI_STATUS
-    (EFIAPI *EFI_I2C_ENUMERATE_PROTOCOL_ENUMERATE) (
-      IN CONST EFI_I2C_ENUMERATE_PROTOCOL *This,
-      IN OUT CONST EFI_I2C_DEVICE         **Device
-    );
-
-    ///
-    /// Traverse the set of I2C devices on an I2C bus.  This routine
-    /// returns the next I2C device on an I2C bus.
-    ///
-    EFI_I2C_ENUMERATE_PROTOCOL_ENUMERATE         Enumerate;
-
-  MvI2cDevice creates EFI_I2C_DEVICE structure for every device on the bus.
-  Due to the fact that hardware-based I2C enumeration isn't safe, information
-  about attached devices should be provided through PCDs. After EFI_I2C_DEVICE
-  structure is created and filled properly, it is returned to I2cBus. It is
-  followed by attachment of I2C device driver.
-
diff --git a/Platform/Marvell/Documentation/Drivers/SpiDriver.txt b/Platform/Marvell/Documentation/Drivers/SpiDriver.txt
deleted file mode 100644
index 42b5e3c..0000000
--- a/Platform/Marvell/Documentation/Drivers/SpiDriver.txt
+++ /dev/null
@@ -1,116 +0,0 @@
-1. Introduction
----------------
-**SpiDxe** driver implements MARVELL_SPI_MASTER_PROTOCOL in order to manage SPI
-controller on Marvell A8k boards. It exposes below functionalities:
- - create and setup SPI slaves
- - raw transfer over SPI bus
-
-2. SpiDxe driver design
------------------------
-
-  2.1 MARVELL_SPI_MASTER_PROTOCOL
-  -----------------------
-  First member of SPI_MASTER protocol is Init function, implemented for SPI
-  master controller initialization.
-
-  ->Init()
-
-    //
-    //Initializes the host controller to execute SPI commands.
-    //
-
-    param[IN]   This Pointer to the MARVELL_SPI_MASTER_PROTOCOL instance
-
-    return      EFI_SUCCESS             Opcode initialization on the SPI host
-                                        controller completed.
-    return      EFI_ACCESS_DENIED       The SPI configuration interface is
-                                        locked.
-    return      EFI_OUT_OF_RESOURCES    Not enough resource available to
-                                        initialize the device.
-    return      EFI_DEVICE_ERROR        Device error, operation failed.
-
-  ********
-
-  SPI devices (slaves) do not support any kind of automatic discovery or
-  enumaration, so every device needs manual configuration, which may be done
-  with SetupDevice function.
-
-    ->SetupDevice()
-
-    //
-    //Allocate and zero all fields in the SPI_DEVICE struct. Set the chip
-    //select, max frequency and transfer mode supported by slave device.
-    //
-
-    param[IN]   Cs Chip select ID of the slave chip.
-    param[IN]   MaxFreq Maximum SCK rate in Hz.
-    param[IN]   Mode Clock polarity and clock phase.
-
-    return      *SPI_DEVICE   Pointer to new allocated struct SPI_DEVICE.
-    return      NULL          NULL pointer if any eroor occured.
-
-    ********
-
-  Developers have to destroy all created SPI device structs (with FreeDevice
-  function) in order to prevent from memory leak.
-
-    ->FreeDevice()
-
-    //
-    //Free any memory associated with a SPI device.
-    //
-
-    param[in]   SpiDev                  Pointer to the SPI_DEVICE struct.
-
-    return      EFI_SUCCESS             Memory fried succesfully.
-    return      EFI_DEVICE_ERROR        Device error, operation failed.
-
-    ********
-
-  Transfer function allows write/read raw bytes over SPI bus.
-
-    ->Transfer()
-
-    //
-    //Perform transfer over SPI bus
-    //
-    param[in]     This                  Pointer to the MARVELL_SPI_MASTER_PROTOCOL
-                                        instance.
-    param[in]     Slave                 Pointer to the SPI_DEVICE struct.
-    param[in]     DataByteCount         Number of bytes in the data portion of
-                                        the SPI cycle.
-    param[in]     DataOut               Pointer to caller-allocated buffer
-                                        containing the data to send.
-    param[out]    DataIn                Pointer to caller-allocated buffer
-                                        where received data will be placed.
-    param[in]     Flag                  Flags which indicate state of CS line
-                                        during/after transfer (see file
-                                        Drivers/Spi/Devices/A8kSpiFlash.h)
-
-    return        EFI_SUCCESS           Memory fried succesfully.
-    return        EFI_DEVICE_ERROR      Device error, operation failed.
-
-    *********
-
-  When working with SPI devices it is often necessary to perform "command and
-  address" transactions. It may be done via ReadWrite function.
-
-    ->ReadWrite()
-
-    //
-    //Perform two steps transactions. First write Command, then read/write
-    //buffer
-    //
-
-    param[in]     This                  Pointer to the MARVELL_SPI_MASTER_PROTOCOL
-                                        instance.
-    param[in]     Slave                 Pointer to the SPI_DEVICE struct.
-    param[in]     Cmd                   Pointer to caller-allocated buffer
-                                        containing the command to send.
-    param[in]     CmdSize               Size of command (in bytes).
-    param[in]     DataOut               Pointer to caller-allocated buffer
-                                        containing the data to send.
-    param[out]    DataIn                Pointer to caller-allocated buffer
-                                        where received data will be placed.
-    param[in]     DataSize              Number of bytes in the data portion of
-                                        the SPI cycle.
diff --git a/Platform/Marvell/Documentation/PortingGuide/ComPhy.txt b/Platform/Marvell/Documentation/PortingGuide/ComPhy.txt
deleted file mode 100644
index a96015e..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/ComPhy.txt
+++ /dev/null
@@ -1,45 +0,0 @@
-COMPHY configuration
----------------------------
-In order to configure ComPhy library, following PCDs are available:
-
-  gMarvellTokenSpaceGuid.PcdComPhyDevices
-
-This array indicates, which ones of the ComPhy chips defined in
-MVHW_COMPHY_DESC template will be configured.
-
-Every ComPhy PCD has <Num> part where <Num> stands for chip ID (order is not
-important, but configuration will be set for first PcdComPhyChipCount chips).
-
-Every chip has 3 ComPhy PCDs and three of them comprise per-board lanes
-settings for this chip. Their format is unicode string, containing settings
-for up to 10 lanes. Setting for each one is separated with semicolon.
-These PCDs together describe outputs of PHY integrated in simple cihp.
-Below is example for the first chip (Chip0).
-
-  gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes
-
-Unicode string indicating PHY types. Currently supported are:
-
-{ L"unconnected", L"PCIE0", L"PCIE1", L"PCIE2", L"PCIE3",
-L"SATA0", L"SATA1", L"SATA2", L"SATA3", L"SGMII0",
-L"SGMII1", L"SGMII2", L"SGMII3",
-L"USB3_HOST0", L"USB3_HOST1", L"USB3_DEVICE",
-L"RXAUI0", L"RXAUI1", L"SFI" }
-
-  gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds
-
-Indicates PHY speeds in MHz. Currently supported are:
-
-{ 1250, 1500, 2500, 3000, 3125, 5000, 6000, 6250, 10310 }
-
-  gMarvellTokenSpaceGuid.PcdChip0ComPhyInvFlags
-
-Indicates lane polarity invert.
-
-Example
--------
-  #ComPhy
-  gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x1 }
-  gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes|L"SGMII1;USB3_HOST0;SFI;SATA1;USB3_HOST1;PCIE2"
-  gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds|L"1250;5000;10310;5000;5000;5000"
-
diff --git a/Platform/Marvell/Documentation/PortingGuide/I2c.txt b/Platform/Marvell/Documentation/PortingGuide/I2c.txt
deleted file mode 100644
index 020ffb4..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/I2c.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-1. Porting I2C driver to a new SOC
-----------------------------------
-In order to enable driver on a new platform, following steps need to be taken:
- - add following line to .dsc file:
-   Platform/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
- - add following line to .fdf file:
-   INF Platform/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
- - add PCDs with relevant values to .dsc file:
-     gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57 }
-   (addresses of I2C slave devices on bus)
-     gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0 }
-   (buses to which accoring slaves are attached)
-     gMarvellTokenSpaceGuid.PcdI2cBusCount|2
-   (number of SoC's I2C buses)
-     gMarvellTokenSpaceGuid.PcdI2cBaseAddresses|L"0xF2701000;0xF2701100"
-   (base addresses of I2C controller buses)
-     gMarvellTokenSpaceGuid.PcdI2cClockFrequency|200000000
-   (I2C host controller clock frequency)
-     gMarvellTokenSpaceGuid.PcdI2cBaudRate|100000
-   (baud rate used in I2C transmission)
diff --git a/Platform/Marvell/Documentation/PortingGuide/Mdio.txt b/Platform/Marvell/Documentation/PortingGuide/Mdio.txt
deleted file mode 100644
index c341d9e..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/Mdio.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-MDIO driver configuration
--------------------------
-MDIO driver provides access to network PHYs' registers via MARVELL_MDIO_READ and
-MARVELL_MDIO_WRITE functions (MARVELL_MDIO_PROTOCOL). Following PCD is required:
-
-  gMarvellTokenSpaceGuid.PcdMdioBaseAddress
-  (base address of SMI management register)
diff --git a/Platform/Marvell/Documentation/PortingGuide/Mpp.txt b/Platform/Marvell/Documentation/PortingGuide/Mpp.txt
deleted file mode 100644
index 68f0e9d..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/Mpp.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-MPP configuration
------------------
-Multi-Purpose Ports (MPP) are configurable through platform PCDs.
-In order to set desired pin multiplexing, .dsc file needs to be modified.
-(Platform/Marvell/Armada/{platform_name}.dsc - please refer to
-Documentation/Build.txt for currently supported {platftorm_name} )
-Following PCDs are available:
-
- gMarvellTokenSpaceGuid.PcdMppChipCount
-
-Indicates how many different chips are placed on board. So far up to 4 chips
-are supported.
-
-Every MPP PCD has <Num> part where
- <Num> stands for chip ID (order is not important, but configuration will be
- set for first PcdMppChipCount chips).
-
-Below is example for the first chip (Chip0).
-
- gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag
-
-Indicates that register order is reversed. (Needs to be used only for AP806-Z1)
-
- gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress
-
-This is base address for MPP configuration register.
-
- gMarvellTokenSpaceGuid.PcdChip0MppPinCount
-
-Defines how many MPP pins are available.
-
- gMarvellTokenSpaceGuid.PcdChip0MppSel0
- gMarvellTokenSpaceGuid.PcdChip0MppSel1
- gMarvellTokenSpaceGuid.PcdChip0MppSel2
-
-This registers defines functions of 10 pins in ascending order.
-
-Examples
---------
-#APN806-A0 MPP SET
- gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag|FALSE
- gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress|0xF06F4000
- gMarvellTokenSpaceGuid.PcdChip0MppRegCount|3
- gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x0 }
- gMarvellTokenSpaceGuid.PcdChip0MppSel1|{ 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }
-
-Set pin 6 and 7 to 0xa function:
- gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xa, 0xa, 0x0, 0x0 }
diff --git a/Platform/Marvell/Documentation/PortingGuide/PciEmulation.txt b/Platform/Marvell/Documentation/PortingGuide/PciEmulation.txt
deleted file mode 100644
index ec1afbc..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/PciEmulation.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-PciEmulation configuration
---------------------------
-Installation of various NonDiscoverable devices via PciEmulation driver is performed
-via set of PCDs. Following are available:
-
- gMarvellTokenSpaceGuid.PcdPciEXhci
-
-Indicates, which Xhci devices are used.
-
- gMarvellTokenSpaceGuid.PcdPciEAhci
-
-Indicates, which Ahci devices are used.
-
- gMarvellTokenSpaceGuid.PcdPciESdhci
-
-Indicates, which Sdhci devices are used.
-
-All above PCD's correspond to hardware description in a dedicated structure:
-
-STATIC PCI_E_PLATFORM_DESC A70x0PlatDescTemplate
-
-in Platforms/Marvell/PciEmulation/PciEmulation.c file. It comprises device
-count, base addresses, register region size and DMA-coherency type.
-
-Examples
---------
-Assuming we want to enable second XHCI port and one SDHCI port on Armada
-70x0 board, following needs to be declared:
-
-  gMarvellTokenSpaceGuid.PcdPciEXhci|{ 0x0 0x1 }
-  gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1 }
diff --git a/Platform/Marvell/Documentation/PortingGuide/Phy.txt b/Platform/Marvell/Documentation/PortingGuide/Phy.txt
deleted file mode 100644
index 69dae02..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/Phy.txt
+++ /dev/null
@@ -1,45 +0,0 @@
-PHY driver configuration
-------------------------
-MvPhyDxe provides basic initialization and status routines for Marvell PHYs.
-Currently only 1512 series PHYs are supported. Following PCDs are required:
-
-  gMarvellTokenSpaceGuid.PcdPhyConnectionTypes
-  (list of values corresponding to PHY_CONNECTION enum)
-  gMarvellTokenSpaceGuid.PcdPhyStartupAutoneg
-  (boolean - if true, driver waits for autonegotiation on startup)
-  gMarvellTokenSpaceGuid.PcdPhyDeviceIds
-  (list of values corresponding to MV_PHY_DEVICE_ID enum)
-
-PHY_CONNECTION enum type is defined as follows:
-
-  typedef enum {
-0    PHY_CONNECTION_RGMII,
-1    PHY_CONNECTION_RGMII_ID,
-2    PHY_CONNECTION_RGMII_TXID,
-3    PHY_CONNECTION_RGMII_RXID,
-4    PHY_CONNECTION_SGMII,
-5    PHY_CONNECTION_RTBI,
-6    PHY_CONNECTION_XAUI,
-7    PHY_CONNECTION_RXAUI
-  } PHY_CONNECTION;
-
-MV_PHY_DEVICE_ID:
-
-  typedef enum {
-0    MV_PHY_DEVICE_1512,
-  } MV_PHY_DEVICE_ID;
-
-It should be extended when adding support for other PHY
-models.
-
-Thus in order to set RGMII for 1st PHY and SGMII for 2nd, PCD should be:
-
-  gMarvellTokenSpaceGuid.PcdPhyConnectionTypes|{ 0x0, 0x4 }
-
-with disabled autonegotiation:
-
-  gMarvellTokenSpaceGuid.PcdPhyStartupAutoneg|FALSE
-
-assuming, that PHY models are 1512:
-
-  gMarvellTokenSpaceGuid.PcdPhyDeviceIds|{ 0x0, 0x0 }
diff --git a/Platform/Marvell/Documentation/PortingGuide/Pp2.txt b/Platform/Marvell/Documentation/PortingGuide/Pp2.txt
deleted file mode 100644
index f05ba27..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/Pp2.txt
+++ /dev/null
@@ -1,35 +0,0 @@
-Pp2Dxe porting guide
---------------------
-Pp2Dxe is driver supporting PP2 NIC on Marvell platforms. Following PCDs
-are required to operate:
-
-Array with used controllers - Set to 0x1 for enabled, 0x0 for disabled:
-  gMarvellTokenSpaceGuid.PcdPp2Controllers
-
-Array specifying, to which controller the port belongs to:
-  gMarvellTokenSpaceGuid.PcdPp2Port2Controller
-
-Addresses of PHY devices:
-  gMarvellTokenSpaceGuid.PcdPhySmiAddresses
-
-Identificators of PP2 ports:
-  gMarvellTokenSpaceGuid.PcdPp2PortIds
-
-Indexes used in GOP operation:
-  gMarvellTokenSpaceGuid.PcdPp2GopIndexes
-
-Set to 0x1 for always-up interface, 0x0 otherwise:
-  gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp
-
-Values corresponding to PHY_SPEED enum:
-  gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed
-
-PHY_SPEED (in Mbps) is defined as follows:
-  typedef enum {
-  0  NO_SPEED,
-  1  SPEED_10,
-  2  SPEED_100,
-  3  SPEED_1000,
-  4  SPEED_2500,
-  5  SPEED_10000
-  } PHY_SPEED;
diff --git a/Platform/Marvell/Documentation/PortingGuide/Reset.txt b/Platform/Marvell/Documentation/PortingGuide/Reset.txt
deleted file mode 100644
index 30dec86..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/Reset.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-MarvellResetSystemLib configuration
------------------------------------
-This simple library allows to mask given bits in given reg at UEFI 'reset'
-command call. These variables are configurable through PCDs:
-
-  gMarvellTokenSpaceGuid.PcdResetRegAddress
-  gMarvellTokenSpaceGuid.PcdResetRegMask
diff --git a/Platform/Marvell/Documentation/PortingGuide/Spi.txt b/Platform/Marvell/Documentation/PortingGuide/Spi.txt
deleted file mode 100644
index be498a6..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/Spi.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-Spi driver configuration
-------------------------
-Following PCDs are available for configuration of spi driver:
-
- gMarvellTokenSpaceGuid.PcdSpiClockFrequency
-
-Frequency (in Hz) of SPI clock
-
- gMarvellTokenSpaceGuid.PcdSpiMaxFrequency
-
-Max SCLK line frequency (in Hz) (max transfer frequency)
-
- gMarvellTokenSpaceGuid.PcdSpiDefaultMode
-
-default SCLK mode (see SPI_MODE enum in file
-Platform/Marvell/Drivers/Spi/MvSpi.h)
diff --git a/Platform/Marvell/Documentation/PortingGuide/SpiFlash.txt b/Platform/Marvell/Documentation/PortingGuide/SpiFlash.txt
deleted file mode 100644
index 226db40..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/SpiFlash.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-SpiFlash driver configuration
------------------------------
-Folowing PCDs for spi flash driver configuration must be set properly:
-
- gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles
-
-Size of SPI flash address in bytes (3 or 4)
-
- gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize
-
-Size of minimal erase block in bytes
-
- gMarvellTokenSpaceGuid.PcdSpiFlashPageSize
-
-Size of SPI flash page
-
- gMarvellTokenSpaceGuid.PcdSpiFlashId
-
-Id of SPI flash
-
- gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd
-
-Spi flash polling flag
diff --git a/Platform/Marvell/Documentation/PortingGuide/Utmi.txt b/Platform/Marvell/Documentation/PortingGuide/Utmi.txt
deleted file mode 100644
index cff4843..0000000
--- a/Platform/Marvell/Documentation/PortingGuide/Utmi.txt
+++ /dev/null
@@ -1,35 +0,0 @@
-UTMI PHY configuration
-----------------------
-In order to configure UTMI, following PCDs are available:
-
-  gMarvellTokenSpaceGuid.PcdUtmiPhyCount
-
-Indicates how many UTMI PHYs are available on platform.
-
-Next four PCDs are in unicode string format containing settings for all devices
-separated with semicolon.
-
-  gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiUnit
-
-Indicates base address of the UTMI unit.
-
-  gMarvellTokenSpaceGuid.PcdUtmiPhyRegUsbCfg
-
-Indicates address of USB Configuration register.
-
-  gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiCfg
-
-Indicates address of external UTMI configuration.
-
-  gMarvellTokenSpaceGuid.PcdUtmiPhyUtmiPort
-
-Indicates type of the connected USB port.
-
-Example
--------
-#UtmiPhy
-  gMarvellTokenSpaceGuid.PcdUtmiPhyCount|2
-  gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiUnit|L"0xF2580000;0xF2581000"
-  gMarvellTokenSpaceGuid.PcdUtmiPhyRegUsbCfg|L"0xF2440420;0xF2440420"
-  gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiCfg|L"0xF2440440;0xF2440444"
-  gMarvellTokenSpaceGuid.PcdUtmiPhyUtmiPort|L"0x0;0x1"
diff --git a/Silicon/Marvell/Documentation/Drivers/EepromDriver.txt b/Silicon/Marvell/Documentation/Drivers/EepromDriver.txt
new file mode 100644
index 0000000..d3b3b9f
--- /dev/null
+++ b/Silicon/Marvell/Documentation/Drivers/EepromDriver.txt
@@ -0,0 +1,96 @@
+1. Introduction
+---------------
+**MvEeprom** driver creates MARVELL_EEPROM_PROTOCOL, which
++is used for managing eeprom.
+
+2. MvEeprom driver design
+-------------------------
+Every I2C device driver should implement EFI_DRIVER_BINDING_PROTOCOL and
+consume EFI_I2C_IO_PROTOCOL for transactions on I2C bus. MvEeprom driver
+additionally implements MARVELL_EEPROM_PROTOCOL.
+
+  2.1 EFI_DRIVER_BINDING_PROTOCOL
+  -------------------------------
+  Driver Binding protocol is extensively covered in UEFI documentation, as
+  it is not specific to I2C stack. The only difference is that Supported()
+  function should check if EFI_I2C_IO_PROTOCOL provides valid EFI_GUID and
+  DeviceIndex values.
+  Excerpt from MvEepromSupported():
+
+    Status = gBS->OpenProtocol (
+                    ControllerHandle,
+                    &gEfiI2cIoProtocolGuid,
+                    (VOID **) &TmpI2cIo,
+                    gImageHandle,
+                    ControllerHandle,
+                    EFI_OPEN_PROTOCOL_BY_DRIVER
+                    );
+    if (EFI_ERROR(Status)) {
+      return EFI_UNSUPPORTED;
+    }
+
+    /* get EEPROM devices' addresses from PCD */
+    EepromAddresses = PcdGetPtr (PcdEepromI2cAddresses);
+    if (EepromAddresses == 0) {
+      Status = EFI_UNSUPPORTED;
+      goto out;
+    }
+
+    Status = EFI_UNSUPPORTED;
+    for (i = 0; EepromAddresses[i] != '\0'; i++) {
+      /* I2C guid must fit and valid DeviceIndex must be provided */
+      if (CompareGuid(TmpI2cIo->DeviceGuid, &I2cGuid) &&
+          TmpI2cIo->DeviceIndex == EepromAddresses[i]) {
+        DEBUG((DEBUG_INFO, "A8kEepromSupported: attached to EEPROM device\n"));
+        Status = EFI_SUCCESS;
+        break;
+      }
+    }
+
+  2.2 EFI_I2C_IO_PROTOCOL
+  -----------------------
+  This protocol is provided by generic I2C stack. Multiple drivers can use IO
+  protocol at once, as queueing is implemented.
+
+  QueueRequest is a routine that queues an I2C transaction to the I2C
+  controller for execution on the I2C bus.
+
+  2.3 MARVELL_EEPROM_PROTOCOL
+  -----------------------
+    typedef struct _MARVELL_EEPROM_PROTOCOL MARVELL_EEPROM_PROTOCOL;
+
+    #define EEPROM_READ   0x1
+    #define EEPROM_WRITE  0x0
+    typedef
+    EFI_STATUS
+    (EFIAPI *EFI_EEPROM_TRANSFER) (
+      IN CONST MARVELL_EEPROM_PROTOCOL  *This,
+      IN UINT16                     Address,
+      IN UINT32                     Length,
+      IN UINT8                      *Buffer,
+      IN UINT8                      Operation
+      );
+
+    struct _MARVELL_EEPROM_PROTOCOL {
+      EFI_EEPROM_TRANSFER Transfer;
+      UINT8 Identifier;
+    };
+
+3. Adding new I2C slave device drivers
+--------------------------------------
+In order to support I2C slave device other than EEPROM, new driver should
+be created. Required steps follow.
+
+  1. Create driver directory (Platform/Marvell/Drivers/I2c/Devices/...).
+  2. Create stubs of .inf and .c files (MvEeprom files are a reference),
+     include .inf file in platform .dsc and .fdf files.
+  3. Implement EFI_DRIVER_BINDING_PROTOCOL - Start(), Stop(), Supported()
+     functions' implementation is a must. EFI_DRIVER_BINDING_PROTOCOL
+     should be installed at driver's entry point.
+  4. Add I2C address of device to PcdI2cSlaveAddresses in .dsc file.
+  5. Test available EFI_I2C_IO_PROTOCOLs in Supported() - find instance
+     with valid GUID and DeviceIndex (I2C slave address).
+  6. Open EFI_I2C_IO_PROTOCOL for usage in Start(). After that, QueueRequest
+     function should be available.
+  7. Implement core functionality of driver (using QueueRequest to access I2C).
+  8. (not mandatory) Produce/consume additional protocols.
diff --git a/Silicon/Marvell/Documentation/Drivers/I2cDriver.txt b/Silicon/Marvell/Documentation/Drivers/I2cDriver.txt
new file mode 100644
index 0000000..2f890de
--- /dev/null
+++ b/Silicon/Marvell/Documentation/Drivers/I2cDriver.txt
@@ -0,0 +1,64 @@
+1. Introduction
+---------------
+**MvI2cDxe** is a driver supporting I2C controller on Marvell SOCs boards.
+It is connected through protocols to generic UEFI I2C stack, which exposes
+IO functionality to drivers of specific devices on I2C bus.
+
+2. MvI2cDxe driver design
+--------------------------
+MvI2cDxe produces several protocols from generic I2C stack:
+ - EFI_I2C_MASTER_PROTOCOL,
+ - EFI_I2C_ENUMERATE_PROTOCOL,
+ - EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL
+ - general-purpose EFI_DRIVER_BINDING_PROTOCOL.
+
+  2.1 EFI_I2C_MASTER_PROTOCOL
+  ---------------------------
+  This is the most important protocol produced by MvI2cDxe. Following functions
+  are implemented:
+
+      ///
+      /// Reset the I2C host controller.
+      ///
+      EFI_I2C_MASTER_PROTOCOL_RESET             Reset;
+
+      ///
+      /// Start an I2C transaction in master mode on the host controller.
+      ///
+      EFI_I2C_MASTER_PROTOCOL_START_REQUEST     StartRequest;
+
+    StartRequest and Reset functions are used by I2cHost.
+    These should **not** be used by I2C device drivers - required
+    synchronization is not provided. Instead, members of EFI_I2C_IO_PROTOCOL
+    should be used.
+
+  2.2 EFI_I2C_BUS_CONFIGURATION_MANAGEMENT_PROTOCOL
+  -------------------------------------------------
+  The only function exposed via this protocol is MvI2cEnableConf. It is
+  required by I2C stack in order to allow changing I2C bus configuration from
+  device drivers.
+
+  2.3 EFI_I2C_ENUMERATE_PROTOCOL
+  ------------------------------
+  Provides Enumerate function, which is used by I2cBus code as an iterator over
+  devices on I2C bus.
+
+    typedef
+    EFI_STATUS
+    (EFIAPI *EFI_I2C_ENUMERATE_PROTOCOL_ENUMERATE) (
+      IN CONST EFI_I2C_ENUMERATE_PROTOCOL *This,
+      IN OUT CONST EFI_I2C_DEVICE         **Device
+    );
+
+    ///
+    /// Traverse the set of I2C devices on an I2C bus.  This routine
+    /// returns the next I2C device on an I2C bus.
+    ///
+    EFI_I2C_ENUMERATE_PROTOCOL_ENUMERATE         Enumerate;
+
+  MvI2cDevice creates EFI_I2C_DEVICE structure for every device on the bus.
+  Due to the fact that hardware-based I2C enumeration isn't safe, information
+  about attached devices should be provided through PCDs. After EFI_I2C_DEVICE
+  structure is created and filled properly, it is returned to I2cBus. It is
+  followed by attachment of I2C device driver.
+
diff --git a/Silicon/Marvell/Documentation/Drivers/SpiDriver.txt b/Silicon/Marvell/Documentation/Drivers/SpiDriver.txt
new file mode 100644
index 0000000..42b5e3c
--- /dev/null
+++ b/Silicon/Marvell/Documentation/Drivers/SpiDriver.txt
@@ -0,0 +1,116 @@
+1. Introduction
+---------------
+**SpiDxe** driver implements MARVELL_SPI_MASTER_PROTOCOL in order to manage SPI
+controller on Marvell A8k boards. It exposes below functionalities:
+ - create and setup SPI slaves
+ - raw transfer over SPI bus
+
+2. SpiDxe driver design
+-----------------------
+
+  2.1 MARVELL_SPI_MASTER_PROTOCOL
+  -----------------------
+  First member of SPI_MASTER protocol is Init function, implemented for SPI
+  master controller initialization.
+
+  ->Init()
+
+    //
+    //Initializes the host controller to execute SPI commands.
+    //
+
+    param[IN]   This Pointer to the MARVELL_SPI_MASTER_PROTOCOL instance
+
+    return      EFI_SUCCESS             Opcode initialization on the SPI host
+                                        controller completed.
+    return      EFI_ACCESS_DENIED       The SPI configuration interface is
+                                        locked.
+    return      EFI_OUT_OF_RESOURCES    Not enough resource available to
+                                        initialize the device.
+    return      EFI_DEVICE_ERROR        Device error, operation failed.
+
+  ********
+
+  SPI devices (slaves) do not support any kind of automatic discovery or
+  enumaration, so every device needs manual configuration, which may be done
+  with SetupDevice function.
+
+    ->SetupDevice()
+
+    //
+    //Allocate and zero all fields in the SPI_DEVICE struct. Set the chip
+    //select, max frequency and transfer mode supported by slave device.
+    //
+
+    param[IN]   Cs Chip select ID of the slave chip.
+    param[IN]   MaxFreq Maximum SCK rate in Hz.
+    param[IN]   Mode Clock polarity and clock phase.
+
+    return      *SPI_DEVICE   Pointer to new allocated struct SPI_DEVICE.
+    return      NULL          NULL pointer if any eroor occured.
+
+    ********
+
+  Developers have to destroy all created SPI device structs (with FreeDevice
+  function) in order to prevent from memory leak.
+
+    ->FreeDevice()
+
+    //
+    //Free any memory associated with a SPI device.
+    //
+
+    param[in]   SpiDev                  Pointer to the SPI_DEVICE struct.
+
+    return      EFI_SUCCESS             Memory fried succesfully.
+    return      EFI_DEVICE_ERROR        Device error, operation failed.
+
+    ********
+
+  Transfer function allows write/read raw bytes over SPI bus.
+
+    ->Transfer()
+
+    //
+    //Perform transfer over SPI bus
+    //
+    param[in]     This                  Pointer to the MARVELL_SPI_MASTER_PROTOCOL
+                                        instance.
+    param[in]     Slave                 Pointer to the SPI_DEVICE struct.
+    param[in]     DataByteCount         Number of bytes in the data portion of
+                                        the SPI cycle.
+    param[in]     DataOut               Pointer to caller-allocated buffer
+                                        containing the data to send.
+    param[out]    DataIn                Pointer to caller-allocated buffer
+                                        where received data will be placed.
+    param[in]     Flag                  Flags which indicate state of CS line
+                                        during/after transfer (see file
+                                        Drivers/Spi/Devices/A8kSpiFlash.h)
+
+    return        EFI_SUCCESS           Memory fried succesfully.
+    return        EFI_DEVICE_ERROR      Device error, operation failed.
+
+    *********
+
+  When working with SPI devices it is often necessary to perform "command and
+  address" transactions. It may be done via ReadWrite function.
+
+    ->ReadWrite()
+
+    //
+    //Perform two steps transactions. First write Command, then read/write
+    //buffer
+    //
+
+    param[in]     This                  Pointer to the MARVELL_SPI_MASTER_PROTOCOL
+                                        instance.
+    param[in]     Slave                 Pointer to the SPI_DEVICE struct.
+    param[in]     Cmd                   Pointer to caller-allocated buffer
+                                        containing the command to send.
+    param[in]     CmdSize               Size of command (in bytes).
+    param[in]     DataOut               Pointer to caller-allocated buffer
+                                        containing the data to send.
+    param[out]    DataIn                Pointer to caller-allocated buffer
+                                        where received data will be placed.
+    param[in]     DataSize              Number of bytes in the data portion of
+                                        the SPI cycle.
diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt
new file mode 100644
index 0000000..aa53329
--- /dev/null
+++ b/Silicon/Marvell/Documentation/PortingGuide.txt
@@ -0,0 +1,373 @@
+UEFI Porting Guide
+==================
+
+This document provides instructions for adding support for new Marvell Armada
+board. For the sake of simplicity new Marvell board will be called "new_board".
+
+1. Create configuration files for new target
+	1.1 Create FDF file for new board
+
+	 - Copy and rename edk2-platforms/Platform/Marvell/Armada/Armada70x0.fdf to
+	   edk2-platforms/Platform/Marvell/Armada/new_board.fdf
+	 - Change the first no-comment line:
+	   [FD.Armada70x0_EFI] to [FD.{new_board}_EFI]
+
+	1.2 Create DSC file for new board
+
+	 - Add new_board.dsc file to edk2-platforms/Platform/Marvell/Armada directory
+	 - Insert following [Defines] section to new_board.dsc:
+
+			[Defines]
+			  PLATFORM_NAME                  = {new_board}
+			  PLATFORM_GUID                  = {newly_generated_GUID}
+			  PLATFORM_VERSION               = 0.1
+			  DSC_SPECIFICATION              = 0x00010019
+			  OUTPUT_DIRECTORY               = {output_directory}
+			  SUPPORTED_ARCHITECTURES        = AARCH64
+			  BUILD_TARGETS                  = DEBUG|RELEASE
+			  SKUID_IDENTIFIER               = DEFAULT
+			  FLASH_DEFINITION               = {path_to_fdf_file}
+
+	 - Add "!include Armada.dsc.inc" entry to new_board.dsc
+
+2. Driver support
+ - According to content of files from
+   edk2-platforms/Silicon/Marvell/Documentation/PortingGuide.txt
+   insert PCD entries into new_board.dsc for every needed interface (as listed below).
+
+3. Compilation
+ - Refer to edk2-platforms/Platform/Marvell/Readme.md. Remember to change
+   {platform} to new_board in order to point build system to newly created DSC file.
+
+4. Output file
+ - Output files (and among others FD file, which may be used by ATF) are
+   generated under directory pointed by "OUTPUT_DIRECTORY" entry (see point 1.2).
+
+
+COMPHY configuration
+====================
+In order to configure ComPhy library, following PCDs are available:
+
+  - gMarvellTokenSpaceGuid.PcdComPhyDevices
+
+This array indicates, which ones of the ComPhy chips defined in
+MVHW_COMPHY_DESC template will be configured.
+
+Every ComPhy PCD has <Num> part where <Num> stands for chip ID (order is not
+important, but configuration will be set for first PcdComPhyChipCount chips).
+
+Every chip has 3 ComPhy PCDs and three of them comprise per-board lanes
+settings for this chip. Their format is unicode string, containing settings
+for up to 10 lanes. Setting for each one is separated with semicolon.
+These PCDs together describe outputs of PHY integrated in simple cihp.
+Below is example for the first chip (Chip0).
+
+  - gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes
+	(Unicode string indicating PHY types. Currently supported are:
+
+		{ L"unconnected", L"PCIE0", L"PCIE1", L"PCIE2", L"PCIE3",
+		  L"SATA0", L"SATA1", L"SATA2", L"SATA3", L"SGMII0",
+		  L"SGMII1", L"SGMII2", L"SGMII3", L"QSGMII",
+		  L"USB3_HOST0", L"USB3_HOST1", L"USB3_DEVICE",
+		  L"XAUI0", L"XAUI1", L"XAUI2", L"XAUI3", L"RXAUI0",
+		  L"RXAUI1", L"KR" } )
+
+  - gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds
+	(Indicates PHY speeds in MHz. Currently supported are:
+		{ 1250, 1500, 2500, 3000, 3125, 5000, 6000, 6250, 1031 }  )
+
+  - gMarvellTokenSpaceGuid.PcdChip0ComPhyInvFlags
+	(Indicates lane polarity invert)
+
+Example
+-------
+
+		  #ComPhy
+		  gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x1 }
+		  gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes|L"SGMII1;USB3_HOST0;SFI;SATA1;USB3_HOST1;PCIE2"
+		  gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds|L"1250;5000;10310;5000;5000;5000"
+
+
+PHY Driver configuration
+========================
+MvPhyDxe provides basic initialization and status routines for Marvell PHYs.
+Currently only 1518 series PHYs are supported. Following PCDs are required:
+
+  - gMarvellTokenSpaceGuid.PcdPhyConnectionTypes
+	(list of values corresponding to PHY_CONNECTION enum)
+  - gMarvellTokenSpaceGuid.PcdPhyStartupAutoneg
+	(boolean - if true, driver waits for autonegotiation on startup)
+  - gMarvellTokenSpaceGuid.PcdPhyDeviceIds
+	(list of values corresponding to MV_PHY_DEVICE_ID enum)
+
+PHY_CONNECTION enum type is defined as follows:
+
+		typedef enum {
+			0    PHY_CONNECTION_RGMII,
+			1    PHY_CONNECTION_RGMII_ID,
+			2    PHY_CONNECTION_RGMII_TXID,
+			3    PHY_CONNECTION_RGMII_RXID,
+			4    PHY_CONNECTION_SGMII,
+			5    PHY_CONNECTION_RTBI,
+			6    PHY_CONNECTION_XAUI,
+			7    PHY_CONNECTION_RXAUI
+		} PHY_CONNECTION;
+
+MV_PHY_DEVICE_ID:
+
+		typedef enum {
+			0    MV_PHY_DEVICE_1512,
+		} MV_PHY_DEVICE_ID;
+
+It should be extended when adding support for other PHY models.
+Thus in order to set RGMII for 1st PHY and SGMII for 2nd, PCD should be:
+
+ gMarvellTokenSpaceGuid.PcdPhyConnectionTypes|{ 0x0, 0x4 }
+
+with disabled autonegotiation:
+
+ gMarvellTokenSpaceGuid.PcdPhyStartupAutoneg|FALSE
+
+assuming, that PHY models are 1512:
+
+ gMarvellTokenSpaceGuid.PcdPhyDeviceIds|{ 0x0, 0x0 }
+
+
+MDIO configuration
+==================
+MDIO driver provides access to network PHYs' registers via EFI_MDIO_READ and
+EFI_MDIO_WRITE functions (EFI_MDIO_PROTOCOL). Following PCD is required:
+
+  - gMarvellTokenSpaceGuid.PcdMdioBaseAddress
+	(base address of SMI management register)
+
+
+I2C configuration
+=================
+In order to enable driver on a new platform, following steps need to be taken:
+ - add following line to .dsc file:
+   edk2-platforms/Platform/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
+ - add following line to .fdf file:
+   INF edk2-platforms/Platform/Marvell/Drivers/I2c/MvI2cDxe/MvI2cDxe.inf
+ - add PCDs with relevant values to .dsc file:
+	- gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57 }
+		(addresses of I2C slave devices on bus)
+	- gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0 }
+		(buses to which accoring slaves are attached)
+	- gMarvellTokenSpaceGuid.PcdI2cBusCount|2
+		(number of SoC's I2C buses)
+	- gMarvellTokenSpaceGuid.PcdI2cBaseAddresses|L"0xF2701000;0xF2701100"
+		(base addresses of I2C controller buses)
+	- gMarvellTokenSpaceGuid.PcdI2cClockFrequency|200000000
+		(I2C host controller clock frequency)
+	- gMarvellTokenSpaceGuid.PcdI2cBaudRate|100000
+		(baud rate used in I2C transmission)
+
+
+PciEmulation configuration
+==========================
+Installation of various NonDiscoverable devices via PciEmulation driver is performed
+via set of PCDs. Following are available:
+
+  - gMarvellTokenSpaceGuid.PcdPciEXhci
+	(Indicates, which Xhci devices are used)
+
+  - gMarvellTokenSpaceGuid.PcdPciEAhci
+	(Indicates, which Ahci devices are used)
+
+  - gMarvellTokenSpaceGuid.PcdPciESdhci
+	(Indicates, which Sdhci devices are used)
+
+All above PCD's correspond to hardware description in a dedicated structure:
+
+STATIC PCI_E_PLATFORM_DESC A70x0PlatDescTemplate
+
+in Platform/Marvell/PciEmulation/PciEmulation.c file. It comprises device
+count, base addresses, register region size and DMA-coherency type.
+
+Example
+-------
+
+Assuming we want to enable second XHCI port and one SDHCI port on Armada
+70x0 board, following needs to be declared:
+
+		gMarvellTokenSpaceGuid.PcdPciEXhci|{ 0x0 0x1 }
+		gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1 }
+
+
+SATA configuration
+==================
+There is one additional PCD for AHCI:
+
+  - gMarvellTokenSpaceGuid.PcdSataBaseAddress
+	(Base address of SATA controller register space - used in SATA ComPhy init
+	 sequence)
+
+
+Pp2Dxe configuration
+====================
+Pp2Dxe is driver supporting PP2 NIC on Marvell platforms. Following PCDs
+are required to operate:
+
+  - gMarvellTokenSpaceGuid.PcdPp2Controllers
+	(Array with used controllers
+	 Set to 0x1 for enabled, 0x0 for disabled)
+
+  - gMarvellTokenSpaceGuid.PcdPp2Port2Controller
+	(Array specifying, to which controller the port belongs to)
+
+  - gMarvellTokenSpaceGuid.PcdPhySmiAddresses
+	(Addresses of PHY devices)
+
+  - gMarvellTokenSpaceGuid.PcdPp2PortIds
+	(Identificators of PP2 ports)
+
+  - gMarvellTokenSpaceGuid.PcdPp2GopIndexes
+	(Indexes used in GOP operation)
+
+  - gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp
+	(Set to 0x1 for always-up interface, 0x0 otherwise)
+
+  - gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed
+	(Values corresponding to PHY_SPEED enum.
+	 PHY_SPEED is defined as follows:
+
+		  typedef enum {
+			  0  NO_SPEED,
+			  1  SPEED_10,
+			  2  SPEED_100,
+			  3  SPEED_1000,
+			  4  SPEED_2500,
+			  5  SPEED_10000
+		  } PHY_SPEED;
+
+
+UTMI PHY configuration
+======================
+In order to configure UTMI, following PCDs are available:
+
+  - gMarvellTokenSpaceGuid.PcdUtmiPhyCount
+	(Indicates how many UTMI PHYs are available on platform)
+
+Next four PCDs are in unicode string format containing settings for all devices
+separated with semicolon.
+
+  - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiUnit
+	(Indicates base address of the UTMI unit)
+
+  - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUsbCfg
+	(Indicates address of USB Configuration register)
+
+  - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiCfg
+	(Indicates address of external UTMI configuration)
+
+  - gMarvellTokenSpaceGuid.PcdUtmiPhyUtmiPort
+	(Indicates type of the connected USB port)
+
+Example
+-------
+
+		# UtmiPhy
+		  gMarvellTokenSpaceGuid.PcdUtmiPhyCount|2
+		  gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiUnit|L"0xF2580000;0xF2581000"
+		  gMarvellTokenSpaceGuid.PcdUtmiPhyRegUsbCfg|L"0xF2440420;0xF2440420"
+		  gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiCfg|L"0xF2440440;0xF2440444"
+		  gMarvellTokenSpaceGuid.PcdUtmiPhyUtmiPort|L"0x0;0x1"
+
+
+SPI driver configuration
+========================
+Following PCDs are available for configuration of spi driver:
+
+  - gMarvellTokenSpaceGuid.PcdSpiClockFrequency
+	(Frequency (in Hz) of SPI clock)
+
+  - gMarvellTokenSpaceGuid.PcdSpiMaxFrequency
+	(Max SCLK line frequency (in Hz) (max transfer frequency) )
+
+  - gMarvellTokenSpaceGuid.PcdSpiDefaultMode
+	(default SCLK mode (see SPI_MODE enum in file
+	 edk2-platforms/Platform/Marvell/Drivers/Spi/MvSpi.h) )
+
+
+SpiFlash configuration
+======================
+Folowing PCDs for spi flash driver configuration must be set properly:
+
+  - gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles
+	(Size of SPI flash address in bytes (3 or 4) )
+
+  - gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize
+	(Size of minimal erase block in bytes)
+
+  - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize
+	(Size of SPI flash page)
+
+  - gMarvellTokenSpaceGuid.PcdSpiFlashId
+	(Id of SPI flash)
+
+  - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd
+	(Spi flash polling flag)
+
+
+MPP configuration
+=================
+Multi-Purpose Ports (MPP) are configurable through platform PCDs.
+In order to set desired pin multiplexing, .dsc file needs to be modified.
+(edk2-platforms/Platform/Marvell/Armada/{platform_name}.dsc - please refer to
+Documentation/Build.txt for currently supported {platftorm_name} )
+Following PCDs are available:
+
+  - gMarvellTokenSpaceGuid.PcdMppChipCount
+	(Indicates how many different chips are placed on board. So far up to 4 chips
+	 are supported)
+
+Every MPP PCD has <Num> part where
+ <Num> stands for chip ID (order is not important, but configuration will be
+ set for first PcdMppChipCount chips).
+
+Below is example for the first chip (Chip0).
+
+  - gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag
+	(Indicates that register order is reversed. (Needs to be used only for AP806-Z1) )
+
+  - gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress
+	(This is base address for MPP configuration register)
+
+  - gMarvellTokenSpaceGuid.PcdChip0MppPinCount
+	(Defines how many MPP pins are available)
+
+  - gMarvellTokenSpaceGuid.PcdChip0MppSel0
+  - gMarvellTokenSpaceGuid.PcdChip0MppSel1
+  - gMarvellTokenSpaceGuid.PcdChip0MppSel2
+	(This registers defines functions of 10 pins in ascending order)
+
+Examples
+--------
+
+		# APN806-A0 MPP SET
+		 gMarvellTokenSpaceGuid.PcdChip0MppReverseFlag|FALSE
+		 gMarvellTokenSpaceGuid.PcdChip0MppBaseAddress|0xF06F4000
+		 gMarvellTokenSpaceGuid.PcdChip0MppRegCount|3
+		 gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x0 }
+		 gMarvellTokenSpaceGuid.PcdChip0MppSel1|{ 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }
+
+Set pin 6 and 7 to 0xa function:
+		 gMarvellTokenSpaceGuid.PcdChip0MppSel0|{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xa, 0xa, 0x0, 0x0 }
+
+
+MarvellResetSystemLib configuration
+===================================
+This simple library allows to mask given bits in given reg at UEFI 'reset'
+command call. These variables are configurable through PCDs:
+
+  - gMarvellTokenSpaceGuid.PcdResetRegAddress
+  - gMarvellTokenSpaceGuid.PcdResetRegMask
+
+
+Ramdisk configuration
+=====================
+There is one PCD available for Ramdisk configuration
+
+  - gMarvellTokenSpaceGuid.PcdRamDiskSize
+	(Defines size of Ramdisk)
-- 
1.8.3.1

[platforms: PATCH 02/10] Marvell/Drivers: MvSpiDxe: Log and return correct error

[Marcin Wojtas]

From: Piotr Król <piotr.krol@3mdeb.com>

Make log information clear where it came from and return correct code to
be interpreted by caller.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Piotr Król <piotr.krol@3mdeb.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Drivers/Spi/MvSpiDxe.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c b/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
index aab20fc..0c6b624 100755
--- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
+++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
@@ -240,7 +240,8 @@ MvSpiTransfer (
     }
 
     if (Iterator >= SPI_TIMEOUT) {
-      DEBUG ((DEBUG_ERROR, "Timeout\n"));
+      DEBUG ((DEBUG_ERROR, "%s: Timeout\n", __FUNCTION__));
+      return EFI_TIMEOUT;
     }
   }
 
-- 
1.8.3.1

Re: [platforms: PATCH 02/10] Marvell/Drivers: MvSpiDxe: Log and return correct error

[Leif Lindholm]

On Mon, Sep 25, 2017 at 03:51:51AM +0200, Marcin Wojtas wrote:
> From: Piotr Król <piotr.krol@3mdeb.com>
> 
> Make log information clear where it came from and return correct code to
> be interpreted by caller.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Piotr Król <piotr.krol@3mdeb.com>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  Platform/Marvell/Drivers/Spi/MvSpiDxe.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c b/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
> index aab20fc..0c6b624 100755
> --- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
> +++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
> @@ -240,7 +240,8 @@ MvSpiTransfer (
>      }
>  
>      if (Iterator >= SPI_TIMEOUT) {
> -      DEBUG ((DEBUG_ERROR, "Timeout\n"));
> +      DEBUG ((DEBUG_ERROR, "%s: Timeout\n", __FUNCTION__));

Should this not be %a as per Ard's suggestion, lest the output become
"MSirnfr: ..."? (I can fold in on commit if you can confirm.)

/
    Leif

> +      return EFI_TIMEOUT;
>      }
>    }
>  
> -- 
> 1.8.3.1
> 

[platforms: PATCH 03/10] Marvell/Drivers: MvSpiDxe: Fix write bug

[Marcin Wojtas]

From: Joe Zhou <shjzhou@marvell.com>

This patch prevents possible NULL pointer dereference
during SPI transfers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Joe Zhou <shjzhou@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Platform/Marvell/Drivers/Spi/MvSpiDxe.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c b/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
index 0c6b624..29e1379 100755
--- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
+++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.c
@@ -226,9 +226,8 @@ MvSpiTransfer (
     // Wait for memory ready
     for (Iterator = 0; Iterator < SPI_TIMEOUT; Iterator++) {
       if (MmioRead32 (SpiRegBase + SPI_INT_CAUSE_REG)) {
-        *DataInPtr = MmioRead32 (SpiRegBase + SPI_DATA_IN_REG);
-
         if (DataInPtr != NULL) {
+          *DataInPtr = MmioRead32 (SpiRegBase + SPI_DATA_IN_REG);
           DataInPtr++;
         }
         if (DataOutPtr != NULL) {
-- 
1.8.3.1

[platforms: PATCH 04/10] Marvell/Applications/SpiTool: Enable configurable CS and SCLK mode

[Marcin Wojtas]

Until now transfer SCLK mode and CS were fixed, when using
shell 'sf' command. This patch enables their configuration.
Update porting guide accordingly.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c   |  6 +++++-
 Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf |  2 ++
 Platform/Marvell/Marvell.dec                          |  2 ++
 Silicon/Marvell/Documentation/PortingGuide.txt        | 11 ++++++-----
 4 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c
index 184e3d7..b6dc54f 100644
--- a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c
+++ b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c
@@ -218,6 +218,7 @@ EFI_STATUS              Status;
   CONST CHAR16          *LengthStr = NULL, *FileStr = NULL;
   BOOLEAN               AddrFlag = FALSE, LengthFlag = TRUE, FileFlag = FALSE;
   UINT8                 Flag = 0, CheckFlag = 0;
+  UINT8                 Mode, Cs;
 
   Status = gBS->LocateProtocol (
     &gMarvellSpiFlashProtocolGuid,
@@ -283,8 +284,11 @@ EFI_STATUS              Status;
     }
   }
 
+  Mode = PcdGet32 (PcdSpiFlashMode);
+  Cs = PcdGet32 (PcdSpiFlashCs);
+
   // Setup new spi device
-  Slave = SpiMasterProtocol->SetupDevice (SpiMasterProtocol, 0, 0);
+  Slave = SpiMasterProtocol->SetupDevice (SpiMasterProtocol, Cs, Mode);
     if (Slave == NULL) {
       Print(L"sf: Cannot allocate SPI device!\n");
       return SHELL_ABORTED;
diff --git a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf
index 41b7b7c..887b9a5 100644
--- a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf
+++ b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf
@@ -65,7 +65,9 @@
  FileHandleLib
 
 [Pcd]
+ gMarvellTokenSpaceGuid.PcdSpiFlashCs
  gMarvellTokenSpaceGuid.PcdSpiFlashId
+ gMarvellTokenSpaceGuid.PcdSpiFlashMode
 
 [Protocols]
  gMarvellSpiFlashProtocolGuid
diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec
index 4e2dd6d..869e376 100644
--- a/Platform/Marvell/Marvell.dec
+++ b/Platform/Marvell/Marvell.dec
@@ -128,6 +128,8 @@
   gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|0|UINT64|0x3000054
   gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|0|UINT32|0x3000055
   gMarvellTokenSpaceGuid.PcdSpiFlashId|0|UINT32|0x3000056
+  gMarvellTokenSpaceGuid.PcdSpiFlashCs|0|UINT32|0x3000057
+  gMarvellTokenSpaceGuid.PcdSpiFlashMode|0|UINT32|0x3000058
 
 #ComPhy
   gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x0 }|VOID*|0x30000098
diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt
index aa53329..2be658e 100644
--- a/Silicon/Marvell/Documentation/PortingGuide.txt
+++ b/Silicon/Marvell/Documentation/PortingGuide.txt
@@ -285,11 +285,6 @@ Following PCDs are available for configuration of spi driver:
   - gMarvellTokenSpaceGuid.PcdSpiMaxFrequency
 	(Max SCLK line frequency (in Hz) (max transfer frequency) )
 
-  - gMarvellTokenSpaceGuid.PcdSpiDefaultMode
-	(default SCLK mode (see SPI_MODE enum in file
-	 edk2-platforms/Platform/Marvell/Drivers/Spi/MvSpi.h) )
-
-
 SpiFlash configuration
 ======================
 Folowing PCDs for spi flash driver configuration must be set properly:
@@ -309,6 +304,12 @@ Folowing PCDs for spi flash driver configuration must be set properly:
   - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd
 	(Spi flash polling flag)
 
+  - gMarvellTokenSpaceGuid.PcdSpiFlashMode
+	(Default SCLK mode (see SPI_MODE enum in file
+	 edk2-platforms/Platform/Marvell/Drivers/Spi/MvSpi.h))
+
+  - gMarvellTokenSpaceGuid.PcdSpiFlashCs
+	(Chip select used for communication with the Flash)
 
 MPP configuration
 =================
-- 
1.8.3.1

[platforms: PATCH 05/10] Platform/Marvell/Armada70x0: set CS and SCLK Mode for SPI flash

[Marcin Wojtas]

This patch makes use of recently added SPI configuration
PCDs and sets CS with SCLK mode on Armada 7040 DB.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Platform/Marvell/Armada/Armada70x0.dsc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Armada/Armada70x0.dsc
index caf3840..467dfa3 100644
--- a/Platform/Marvell/Armada/Armada70x0.dsc
+++ b/Platform/Marvell/Armada/Armada70x0.dsc
@@ -95,6 +95,8 @@
   gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|65536
   gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|256
   gMarvellTokenSpaceGuid.PcdSpiFlashId|0x20BA18
+  gMarvellTokenSpaceGuid.PcdSpiFlashMode|3
+  gMarvellTokenSpaceGuid.PcdSpiFlashCs|0
 
   #ComPhy
   gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x1 }
-- 
1.8.3.1

[platforms: PATCH 06/10] Marvell/Applications/SpiTool: Fix bug in error test

[Marcin Wojtas]

From: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Fix a misplaced closing parenthesis.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c
index b6dc54f..e6e1007 100644
--- a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c
+++ b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c
@@ -378,7 +378,7 @@ EFI_STATUS              Status;
       FilePath = (CHAR16 *) FileStr;
       Status = ShellIsFile (FilePath);
       // When read file into flash, file doesn't have to exist
-      if (EFI_ERROR(Status && !(Flag & READ_FILE))) {
+      if (EFI_ERROR (Status) && !(Flag & READ_FILE)) {
         Print (L"sf: Wrong FilePath parameter!\n");
         return SHELL_ABORTED;
       }
-- 
1.8.3.1

[platforms: PATCH 07/10] Marvell/Applications/FirmwareUpdate: Fix 32-bit issues

[Marcin Wojtas]

From: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Fix casting and related issues to make this code build for 32-bit ARM.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c b/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c
index edb6986..664411a 100644
--- a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c
+++ b/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c
@@ -165,7 +165,7 @@ PrepareFirmwareImage (
   IN LIST_ENTRY             *CheckPackage,
   IN OUT SHELL_FILE_HANDLE  *FileHandle,
   IN OUT UINTN              **FileBuffer,
-  IN OUT UINTN              *FileSize
+  IN OUT UINT64             *FileSize
   )
 {
   CONST CHAR16         *FileStr;
@@ -203,7 +203,7 @@ PrepareFirmwareImage (
   // Read Image header into buffer
   Buffer = AllocateZeroPool (*FileSize);
 
-  Status = FileHandleRead (*FileHandle, FileSize, Buffer);
+  Status = FileHandleRead (*FileHandle, (UINTN *)FileSize, Buffer);
   if (EFI_ERROR (Status)) {
     Print (L"%s: Cannot read Image file header\n", CMD_NAME_STRING);
     ShellCloseFile (FileHandle);
@@ -256,7 +256,7 @@ ShellCommandRunFUpdate (
 {
   IN SHELL_FILE_HANDLE    FileHandle;
   SPI_DEVICE              *Slave;
-  UINTN                   FileSize;
+  UINT64                  FileSize;
   UINTN                   *FileBuffer = NULL;
   CHAR16                  *ProblemParam;
   LIST_ENTRY              *CheckPackage;
-- 
1.8.3.1

[platforms: PATCH 08/10] Marvell/Applications/SpiTool: Fix 32-bit issues

[Marcin Wojtas]

From: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Fix casting and related issues to make this code build for 32-bit ARM.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c
index e6e1007..9321f6b 100644
--- a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c
+++ b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c
@@ -211,7 +211,8 @@ EFI_STATUS              Status;
   LIST_ENTRY            *CheckPackage;
   EFI_PHYSICAL_ADDRESS  Address = 0, Offset = 0;
   SHELL_FILE_HANDLE     FileHandle = NULL;
-  UINTN                 ByteCount, FileSize, I;
+  UINTN                 ByteCount, I;
+  UINT64                FileSize;
   UINT8                 *Buffer = NULL, *FileBuffer = NULL;
   CHAR16                *ProblemParam, *FilePath;
   CONST CHAR16          *AddressStr = NULL, *OffsetStr = NULL;
@@ -418,7 +419,7 @@ EFI_STATUS              Status;
     }
   }
 
-  Buffer = (UINT8 *) Address;
+  Buffer = (UINT8 *)(UINTN)Address;
   if (FileFlag) {
     Buffer = FileBuffer;
   }
-- 
1.8.3.1

[platforms: PATCH 09/10] Marvell/Drivers: MvSpiFlash: Fix usage of erase size parameter

[Marcin Wojtas]

Although, hitherto support allowed for using configurable EraseSize,
the erase command was fixed to CMD_ERASE_64K. Also it was
assumed that EraseSize equals SectorSize, which is not true
for some flash devices. Fix both issues by adding new PCD
(gMarvellTokenSpaceGuid.PcdSpiFlashPageSize) and using
this parameter properly in MvSpiFlashUpdate routine instead
of the EraseSize. Also erase command is adjusted to the settings.
Update PortingGuide accordingly.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c   | 26 +++++++++++++++-----
 Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h   |  6 +++++
 Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf |  1 +
 Platform/Marvell/Marvell.dec                        |  1 +
 Silicon/Marvell/Documentation/PortingGuide.txt      |  3 +++
 5 files changed, 31 insertions(+), 6 deletions(-)

diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c
index 9a04493..c411296 100755
--- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c
+++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c
@@ -191,7 +191,21 @@ MvSpiFlashErase (
     return EFI_DEVICE_ERROR;
   }
 
-  Cmd[0] = CMD_ERASE_64K;
+  switch (EraseSize) {
+  case SIZE_4K:
+    Cmd[0] = CMD_ERASE_4K;
+    break;
+  case SIZE_32K:
+    Cmd[0] = CMD_ERASE_32K;
+    break;
+  case SIZE_64K:
+    Cmd[0] = CMD_ERASE_64K;
+    break;
+  default:
+    DEBUG ((DEBUG_ERROR, "MvSpiFlash: Invalid EraseSize parameter\n"));
+    return EFI_INVALID_PARAMETER;
+  }
+
   while (Length) {
     EraseAddr = Offset;
 
@@ -353,14 +367,14 @@ MvSpiFlashUpdate (
   )
 {
   EFI_STATUS Status;
-  UINT64 EraseSize, ToUpdate, Scale = 1;
+  UINT64 SectorSize, ToUpdate, Scale = 1;
   UINT8 *TmpBuf, *End;
 
-  EraseSize = PcdGet64 (PcdSpiFlashEraseSize);
+  SectorSize = PcdGet64 (PcdSpiFlashSectorSize);
 
   End = Buf + ByteCount;
 
-  TmpBuf = (UINT8 *)AllocateZeroPool (EraseSize);
+  TmpBuf = (UINT8 *)AllocateZeroPool (SectorSize);
   if (TmpBuf == NULL) {
     DEBUG((DEBUG_ERROR, "SpiFlash: Cannot allocate memory\n"));
     return EFI_OUT_OF_RESOURCES;
@@ -370,9 +384,9 @@ MvSpiFlashUpdate (
     Scale = (End - Buf) / 100;
 
   for (; Buf < End; Buf += ToUpdate, Offset += ToUpdate) {
-    ToUpdate = MIN((UINT64)(End - Buf), EraseSize);
+    ToUpdate = MIN((UINT64)(End - Buf), SectorSize);
     Print (L"   \rUpdating, %d%%", 100 - (End - Buf) / Scale);
-    Status = MvSpiFlashUpdateBlock (Slave, Offset, ToUpdate, Buf, TmpBuf, EraseSize);
+    Status = MvSpiFlashUpdateBlock (Slave, Offset, ToUpdate, Buf, TmpBuf, SectorSize);
 
     if (EFI_ERROR (Status)) {
       DEBUG((DEBUG_ERROR, "SpiFlash: Error while updating\n"));
diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h
index 3889643..49cce43 100755
--- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h
+++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h
@@ -57,6 +57,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define CMD_READ_ARRAY_FAST             0x0b
 #define CMD_PAGE_PROGRAM                0x02
 #define CMD_BANK_WRITE                  0xc5
+#define CMD_ERASE_4K                    0x20
+#define CMD_ERASE_32K                   0x52
 #define CMD_ERASE_64K                   0xd8
 #define CMD_4B_ADDR_ENABLE              0xb7
 
@@ -66,6 +68,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define SPI_TRANSFER_BEGIN              0x01  // Assert CS before transfer
 #define SPI_TRANSFER_END                0x02  // Deassert CS after transfers
 
+#define SIZE_4K                         4096
+#define SIZE_32K                        32768
+#define SIZE_64K                        65536
+
 #define SPI_FLASH_16MB_BOUN             0x1000000
 
 typedef enum {
diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf
index d035d47..4519b02 100644
--- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf
+++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf
@@ -58,6 +58,7 @@
   gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize
   gMarvellTokenSpaceGuid.PcdSpiFlashPageSize
   gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd
+  gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize
 
 [Protocols]
   gMarvellSpiMasterProtocolGuid
diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec
index 869e376..fc00f1a 100644
--- a/Platform/Marvell/Marvell.dec
+++ b/Platform/Marvell/Marvell.dec
@@ -127,6 +127,7 @@
   gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles|0|UINT32|0x3000053
   gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|0|UINT64|0x3000054
   gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|0|UINT32|0x3000055
+  gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize|65536|UINT64|0x3000059
   gMarvellTokenSpaceGuid.PcdSpiFlashId|0|UINT32|0x3000056
   gMarvellTokenSpaceGuid.PcdSpiFlashCs|0|UINT32|0x3000057
   gMarvellTokenSpaceGuid.PcdSpiFlashMode|0|UINT32|0x3000058
diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt
index 2be658e..83ebe9d 100644
--- a/Silicon/Marvell/Documentation/PortingGuide.txt
+++ b/Silicon/Marvell/Documentation/PortingGuide.txt
@@ -298,6 +298,9 @@ Folowing PCDs for spi flash driver configuration must be set properly:
   - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize
 	(Size of SPI flash page)
 
+  - gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize
+	(Size of SPI flash sector, 65536 bytes by default)
+
   - gMarvellTokenSpaceGuid.PcdSpiFlashId
 	(Id of SPI flash)
 
-- 
1.8.3.1

Re: [platforms: PATCH 09/10] Marvell/Drivers: MvSpiFlash: Fix usage of erase size parameter

[Leif Lindholm]

On Mon, Sep 25, 2017 at 03:51:58AM +0200, Marcin Wojtas wrote:
> Although, hitherto support allowed for using configurable EraseSize,
> the erase command was fixed to CMD_ERASE_64K. Also it was
> assumed that EraseSize equals SectorSize, which is not true
> for some flash devices. Fix both issues by adding new PCD
> (gMarvellTokenSpaceGuid.PcdSpiFlashPageSize) and using
> this parameter properly in MvSpiFlashUpdate routine instead
> of the EraseSize. Also erase command is adjusted to the settings.
> Update PortingGuide accordingly.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c   | 26 +++++++++++++++-----
>  Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h   |  6 +++++
>  Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf |  1 +
>  Platform/Marvell/Marvell.dec                        |  1 +
>  Silicon/Marvell/Documentation/PortingGuide.txt      |  3 +++
>  5 files changed, 31 insertions(+), 6 deletions(-)
> 
> diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c
> index 9a04493..c411296 100755
> --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c
> +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c
> @@ -191,7 +191,21 @@ MvSpiFlashErase (
>      return EFI_DEVICE_ERROR;
>    }
>  
> -  Cmd[0] = CMD_ERASE_64K;
> +  switch (EraseSize) {
> +  case SIZE_4K:
> +    Cmd[0] = CMD_ERASE_4K;
> +    break;
> +  case SIZE_32K:
> +    Cmd[0] = CMD_ERASE_32K;
> +    break;
> +  case SIZE_64K:
> +    Cmd[0] = CMD_ERASE_64K;
> +    break;
> +  default:
> +    DEBUG ((DEBUG_ERROR, "MvSpiFlash: Invalid EraseSize parameter\n"));
> +    return EFI_INVALID_PARAMETER;
> +  }
> +
>    while (Length) {
>      EraseAddr = Offset;
>  
> @@ -353,14 +367,14 @@ MvSpiFlashUpdate (
>    )
>  {
>    EFI_STATUS Status;
> -  UINT64 EraseSize, ToUpdate, Scale = 1;
> +  UINT64 SectorSize, ToUpdate, Scale = 1;
>    UINT8 *TmpBuf, *End;
>  
> -  EraseSize = PcdGet64 (PcdSpiFlashEraseSize);
> +  SectorSize = PcdGet64 (PcdSpiFlashSectorSize);
>  
>    End = Buf + ByteCount;
>  
> -  TmpBuf = (UINT8 *)AllocateZeroPool (EraseSize);
> +  TmpBuf = (UINT8 *)AllocateZeroPool (SectorSize);
>    if (TmpBuf == NULL) {
>      DEBUG((DEBUG_ERROR, "SpiFlash: Cannot allocate memory\n"));
>      return EFI_OUT_OF_RESOURCES;
> @@ -370,9 +384,9 @@ MvSpiFlashUpdate (
>      Scale = (End - Buf) / 100;
>  
>    for (; Buf < End; Buf += ToUpdate, Offset += ToUpdate) {
> -    ToUpdate = MIN((UINT64)(End - Buf), EraseSize);
> +    ToUpdate = MIN((UINT64)(End - Buf), SectorSize);
>      Print (L"   \rUpdating, %d%%", 100 - (End - Buf) / Scale);
> -    Status = MvSpiFlashUpdateBlock (Slave, Offset, ToUpdate, Buf, TmpBuf, EraseSize);
> +    Status = MvSpiFlashUpdateBlock (Slave, Offset, ToUpdate, Buf, TmpBuf, SectorSize);
>  
>      if (EFI_ERROR (Status)) {
>        DEBUG((DEBUG_ERROR, "SpiFlash: Error while updating\n"));
> diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h
> index 3889643..49cce43 100755
> --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h
> +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h
> @@ -57,6 +57,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #define CMD_READ_ARRAY_FAST             0x0b
>  #define CMD_PAGE_PROGRAM                0x02
>  #define CMD_BANK_WRITE                  0xc5
> +#define CMD_ERASE_4K                    0x20
> +#define CMD_ERASE_32K                   0x52
>  #define CMD_ERASE_64K                   0xd8
>  #define CMD_4B_ADDR_ENABLE              0xb7
>  
> @@ -66,6 +68,10 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>  #define SPI_TRANSFER_BEGIN              0x01  // Assert CS before transfer
>  #define SPI_TRANSFER_END                0x02  // Deassert CS after transfers
>  
> +#define SIZE_4K                         4096
> +#define SIZE_32K                        32768
> +#define SIZE_64K                        65536
> +

Sorry, this was me being unclear: my meaning was "please just use the
existing defines from BaseLib".

If deleting this hunk is sufficient to resolve this, I can fold that
in when pushing.

/
    Leif

>  #define SPI_FLASH_16MB_BOUN             0x1000000
>  
>  typedef enum {
> diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf
> index d035d47..4519b02 100644
> --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf
> +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf
> @@ -58,6 +58,7 @@
>    gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize
>    gMarvellTokenSpaceGuid.PcdSpiFlashPageSize
>    gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd
> +  gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize
>  
>  [Protocols]
>    gMarvellSpiMasterProtocolGuid
> diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec
> index 869e376..fc00f1a 100644
> --- a/Platform/Marvell/Marvell.dec
> +++ b/Platform/Marvell/Marvell.dec
> @@ -127,6 +127,7 @@
>    gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles|0|UINT32|0x3000053
>    gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|0|UINT64|0x3000054
>    gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|0|UINT32|0x3000055
> +  gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize|65536|UINT64|0x3000059
>    gMarvellTokenSpaceGuid.PcdSpiFlashId|0|UINT32|0x3000056
>    gMarvellTokenSpaceGuid.PcdSpiFlashCs|0|UINT32|0x3000057
>    gMarvellTokenSpaceGuid.PcdSpiFlashMode|0|UINT32|0x3000058
> diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt
> index 2be658e..83ebe9d 100644
> --- a/Silicon/Marvell/Documentation/PortingGuide.txt
> +++ b/Silicon/Marvell/Documentation/PortingGuide.txt
> @@ -298,6 +298,9 @@ Folowing PCDs for spi flash driver configuration must be set properly:
>    - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize
>  	(Size of SPI flash page)
>  
> +  - gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize
> +	(Size of SPI flash sector, 65536 bytes by default)
> +
>    - gMarvellTokenSpaceGuid.PcdSpiFlashId
>  	(Id of SPI flash)
>  
> -- 
> 1.8.3.1
> 

[platforms: PATCH 10/10] Marvell/Drivers: MvSpiFlash: Minor style fix

[Marcin Wojtas]

This patch correct style of two variables to the camel-case
version.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c
index c411296..c7e0221 100755
--- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c
+++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c
@@ -104,13 +104,13 @@ MvSpiFlashWriteCommon (
   UINT8 CmdStatus = CMD_READ_STATUS;
   UINT8 State;
   UINT32 Counter = 0xFFFFF;
-  UINT8 poll_bit = STATUS_REG_POLL_WIP;
-  UINT8 check_status = 0x0;
+  UINT8 PollBit = STATUS_REG_POLL_WIP;
+  UINT8 CheckStatus = 0x0;
 
   CmdStatus = (UINT8)PcdGet32 (PcdSpiFlashPollCmd);
   if (CmdStatus == CMD_FLAG_STATUS) {
-    poll_bit = STATUS_REG_POLL_PEC;
-    check_status = poll_bit;
+    PollBit = STATUS_REG_POLL_PEC;
+    CheckStatus = PollBit;
   }
 
   // Send command
@@ -127,7 +127,7 @@ MvSpiFlashWriteCommon (
     SpiMasterProtocol->Transfer (SpiMasterProtocol, Slave, 1, NULL, &State,
       0);
     Counter--;
-    if ((State & poll_bit) == check_status)
+    if ((State & PollBit) == CheckStatus)
       break;
   } while (Counter > 0);
   if (Counter == 0) {
-- 
1.8.3.1

Re: [platforms: PATCH 00/10] Armada 70x0/80x0 SPI improvements

[Leif Lindholm]

On Mon, Sep 25, 2017 at 03:51:49AM +0200, Marcin Wojtas wrote:
> Hi,
> 
> Finally I found time to respin SPI patchset. As agreed, I extracted
> style fixes from dynamic flash detection patch, but its main part
> is kept aside for now until FlashId table (and additionally both SPI
> protocols land in the edk2 mainline). A lot of minor fixes were
> implemented, details can be found in the commit logs and changelog
> below.
> 
> Patches are available in the github:
> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/spi-upstream-r20170925
> 
> I'm looking forward to the comments or remarks.

If the two minor changes I have suggested are acceptable - for the series:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

As mentioned, I can fold these in before pushing. Let me know.

/
    Leif

> Best regards,
> Marcin
> 
> Changelog
> v1 -> v2
> Slightly improve commit log prefixes.
> 
> 1/10
> * Move documentation to Silicon/Marvell
> * Update PortingGuide with new paths in edk2-platforms repository
> 
> 2/10
> * Correct error print
> 
> 4/10
> * Sort PCDs
> 
> 7/10
> * Simplify change and remove additional local variable
> 
> 8/10
> * Correct FileSize type and let it really compile for ARM and AARCH64
> 
> 9/10
> * modify macros -> s/SPI_ERASE_SIZE_/SIZE_/
> 
> 10/10
> * New patch
> 
> 3/10, 5/10, 6/10
> * Add Reviewed-by's
> 
> Ard Biesheuvel (3):
>   Marvell/Applications/SpiTool: Fix bug in error test
>   Marvell/Applications/FirmwareUpdate: Fix 32-bit issues
>   Marvell/Applications/SpiTool: Fix 32-bit issues
> 
> Joe Zhou (1):
>   Marvell/Drivers: MvSpiDxe: Fix write bug
> 
> Marcin Wojtas (4):
>   Marvell/Applications/SpiTool: Enable configurable CS and SCLK mode
>   Platform/Marvell/Armada70x0: set CS and SCLK Mode for SPI flash
>   Marvell/Drivers: MvSpiFlash: Fix usage of erase size parameter
>   Marvell/Drivers: MvSpiFlash: Minor style fix
> 
> Nir Erez (1):
>   Silicon/Marvell: Refactor Documentation
> 
> Piotr Król (1):
>   Marvell/Drivers: MvSpiDxe: Log and return correct error
> 
>  Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c       |   6 +-
>  Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c          |  13 +-
>  Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf        |   2 +
>  Platform/Marvell/Armada/Armada70x0.dsc                       |   2 +
>  Platform/Marvell/Documentation/Drivers/EepromDriver.txt      |  96 -----
>  Platform/Marvell/Documentation/Drivers/I2cDriver.txt         |  64 ----
>  Platform/Marvell/Documentation/Drivers/SpiDriver.txt         | 116 ------
>  Platform/Marvell/Documentation/PortingGuide/ComPhy.txt       |  45 ---
>  Platform/Marvell/Documentation/PortingGuide/I2c.txt          |  20 --
>  Platform/Marvell/Documentation/PortingGuide/Mdio.txt         |   7 -
>  Platform/Marvell/Documentation/PortingGuide/Mpp.txt          |  48 ---
>  Platform/Marvell/Documentation/PortingGuide/PciEmulation.txt |  31 --
>  Platform/Marvell/Documentation/PortingGuide/Phy.txt          |  45 ---
>  Platform/Marvell/Documentation/PortingGuide/Pp2.txt          |  35 --
>  Platform/Marvell/Documentation/PortingGuide/Reset.txt        |   7 -
>  Platform/Marvell/Documentation/PortingGuide/Spi.txt          |  16 -
>  Platform/Marvell/Documentation/PortingGuide/SpiFlash.txt     |  23 --
>  Platform/Marvell/Documentation/PortingGuide/Utmi.txt         |  35 --
>  Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c            |  36 +-
>  Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h            |   6 +
>  Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf          |   1 +
>  Platform/Marvell/Drivers/Spi/MvSpiDxe.c                      |   6 +-
>  Platform/Marvell/Marvell.dec                                 |   3 +
>  Silicon/Marvell/Documentation/Drivers/EepromDriver.txt       |  96 +++++
>  Silicon/Marvell/Documentation/Drivers/I2cDriver.txt          |  64 ++++
>  Silicon/Marvell/Documentation/Drivers/SpiDriver.txt          | 116 ++++++
>  Silicon/Marvell/Documentation/PortingGuide.txt               | 377 ++++++++++++++++++++
>  27 files changed, 707 insertions(+), 609 deletions(-)
>  delete mode 100644 Platform/Marvell/Documentation/Drivers/EepromDriver.txt
>  delete mode 100644 Platform/Marvell/Documentation/Drivers/I2cDriver.txt
>  delete mode 100644 Platform/Marvell/Documentation/Drivers/SpiDriver.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/ComPhy.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/I2c.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Mdio.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Mpp.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/PciEmulation.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Phy.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Pp2.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Reset.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Spi.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/SpiFlash.txt
>  delete mode 100644 Platform/Marvell/Documentation/PortingGuide/Utmi.txt
>  create mode 100644 Silicon/Marvell/Documentation/Drivers/EepromDriver.txt
>  create mode 100644 Silicon/Marvell/Documentation/Drivers/I2cDriver.txt
>  create mode 100644 Silicon/Marvell/Documentation/Drivers/SpiDriver.txt
>  create mode 100644 Silicon/Marvell/Documentation/PortingGuide.txt
> 
> -- 
> 1.8.3.1
> 

Re: [platforms: PATCH 00/10] Armada 70x0/80x0 SPI improvements

[Marcin Wojtas]

Hi Leif,

2017-10-05 15:30 GMT+02:00 Leif Lindholm <leif.lindholm@linaro.org>:
>
> On Mon, Sep 25, 2017 at 03:51:49AM +0200, Marcin Wojtas wrote:
> > Hi,
> >
> > Finally I found time to respin SPI patchset. As agreed, I extracted
> > style fixes from dynamic flash detection patch, but its main part
> > is kept aside for now until FlashId table (and additionally both SPI
> > protocols land in the edk2 mainline). A lot of minor fixes were
> > implemented, details can be found in the commit logs and changelog
> > below.
> >
> > Patches are available in the github:
> > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/spi-upstream-r20170925
> >
> > I'm looking forward to the comments or remarks.
>
> If the two minor changes I have suggested are acceptable - for the series:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
> As mentioned, I can fold these in before pushing. Let me know.
>

If that's not a big problem, please do.

Thanks,
Marcin

Re: [platforms: PATCH 00/10] Armada 70x0/80x0 SPI improvements

[Marcin Wojtas]

Leif,

2017-10-05 15:37 GMT+02:00 Marcin Wojtas <mw@semihalf.com>:
> Hi Leif,
>
> 2017-10-05 15:30 GMT+02:00 Leif Lindholm <leif.lindholm@linaro.org>:
>>
>> On Mon, Sep 25, 2017 at 03:51:49AM +0200, Marcin Wojtas wrote:
>> > Hi,
>> >
>> > Finally I found time to respin SPI patchset. As agreed, I extracted
>> > style fixes from dynamic flash detection patch, but its main part
>> > is kept aside for now until FlashId table (and additionally both SPI
>> > protocols land in the edk2 mainline). A lot of minor fixes were
>> > implemented, details can be found in the commit logs and changelog
>> > below.
>> >
>> > Patches are available in the github:
>> > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/spi-upstream-r20170925
>> >
>> > I'm looking forward to the comments or remarks.
>>
>> If the two minor changes I have suggested are acceptable - for the series:
>> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>>
>> As mentioned, I can fold these in before pushing. Let me know.
>>

Here:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/spi-upstream-r20171005

you can find rebased commits, with 2 modifications you pointed (%a and
use BaseLib size types). Added RB's everywhere and tested - working
fine.

Best regards,
Marcin

Re: [platforms: PATCH 00/10] Armada 70x0/80x0 SPI improvements

[Leif Lindholm]

On Thu, Oct 05, 2017 at 04:54:26PM +0200, Marcin Wojtas wrote:
> Leif,
> 
> 2017-10-05 15:37 GMT+02:00 Marcin Wojtas <mw@semihalf.com>:
> > Hi Leif,
> >
> > 2017-10-05 15:30 GMT+02:00 Leif Lindholm <leif.lindholm@linaro.org>:
> >>
> >> On Mon, Sep 25, 2017 at 03:51:49AM +0200, Marcin Wojtas wrote:
> >> > Hi,
> >> >
> >> > Finally I found time to respin SPI patchset. As agreed, I extracted
> >> > style fixes from dynamic flash detection patch, but its main part
> >> > is kept aside for now until FlashId table (and additionally both SPI
> >> > protocols land in the edk2 mainline). A lot of minor fixes were
> >> > implemented, details can be found in the commit logs and changelog
> >> > below.
> >> >
> >> > Patches are available in the github:
> >> > https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/spi-upstream-r20170925
> >> >
> >> > I'm looking forward to the comments or remarks.
> >>
> >> If the two minor changes I have suggested are acceptable - for the series:
> >> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> >>
> >> As mentioned, I can fold these in before pushing. Let me know.
> >>
> 
> Here:
> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/spi-upstream-r20171005
> 
> you can find rebased commits, with 2 modifications you pointed (%a and
> use BaseLib size types). Added RB's everywhere and tested - working
> fine.

Many thanks - pushed as a4591fe0b0..13f15e8113.

/
    Leif